1262569Simp/*
2262569Simp * Copyright (c) 2013, The Linux Foundation. All rights reserved.
3262569Simp *
4262569Simp * This software is licensed under the terms of the GNU General Public
5262569Simp * License version 2, as published by the Free Software Foundation, and
6262569Simp * may be copied, distributed, and modified under those terms.
7262569Simp *
8262569Simp * This program is distributed in the hope that it will be useful,
9262569Simp * but WITHOUT ANY WARRANTY; without even the implied warranty of
10262569Simp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11262569Simp * GNU General Public License for more details.
12262569Simp */
13262569Simp
14262569Simp#ifndef _DT_BINDINGS_RESET_MSM_GCC_8960_H
15262569Simp#define _DT_BINDINGS_RESET_MSM_GCC_8960_H
16262569Simp
17262569Simp#define SFAB_MSS_Q6_SW_RESET				0
18262569Simp#define SFAB_MSS_Q6_FW_RESET				1
19262569Simp#define QDSS_STM_RESET					2
20262569Simp#define AFAB_SMPSS_S_RESET				3
21262569Simp#define AFAB_SMPSS_M1_RESET				4
22262569Simp#define AFAB_SMPSS_M0_RESET				5
23262569Simp#define AFAB_EBI1_CH0_RESET				6
24262569Simp#define AFAB_EBI1_CH1_RESET				7
25262569Simp#define SFAB_ADM0_M0_RESET				8
26262569Simp#define SFAB_ADM0_M1_RESET				9
27262569Simp#define SFAB_ADM0_M2_RESET				10
28262569Simp#define ADM0_C2_RESET					11
29262569Simp#define ADM0_C1_RESET					12
30262569Simp#define ADM0_C0_RESET					13
31262569Simp#define ADM0_PBUS_RESET					14
32262569Simp#define ADM0_RESET					15
33262569Simp#define QDSS_CLKS_SW_RESET				16
34262569Simp#define QDSS_POR_RESET					17
35262569Simp#define QDSS_TSCTR_RESET				18
36262569Simp#define QDSS_HRESET_RESET				19
37262569Simp#define QDSS_AXI_RESET					20
38262569Simp#define QDSS_DBG_RESET					21
39262569Simp#define PCIE_A_RESET					22
40262569Simp#define PCIE_AUX_RESET					23
41262569Simp#define PCIE_H_RESET					24
42262569Simp#define SFAB_PCIE_M_RESET				25
43262569Simp#define SFAB_PCIE_S_RESET				26
44262569Simp#define SFAB_MSS_M_RESET				27
45262569Simp#define SFAB_USB3_M_RESET				28
46262569Simp#define SFAB_RIVA_M_RESET				29
47262569Simp#define SFAB_LPASS_RESET				30
48262569Simp#define SFAB_AFAB_M_RESET				31
49262569Simp#define AFAB_SFAB_M0_RESET				32
50262569Simp#define AFAB_SFAB_M1_RESET				33
51262569Simp#define SFAB_SATA_S_RESET				34
52262569Simp#define SFAB_DFAB_M_RESET				35
53262569Simp#define DFAB_SFAB_M_RESET				36
54262569Simp#define DFAB_SWAY0_RESET				37
55262569Simp#define DFAB_SWAY1_RESET				38
56262569Simp#define DFAB_ARB0_RESET					39
57262569Simp#define DFAB_ARB1_RESET					40
58262569Simp#define PPSS_PROC_RESET					41
59262569Simp#define PPSS_RESET					42
60262569Simp#define DMA_BAM_RESET					43
61270864Simp#define SPS_TIC_H_RESET					44
62262569Simp#define SLIMBUS_H_RESET					45
63262569Simp#define SFAB_CFPB_M_RESET				46
64262569Simp#define SFAB_CFPB_S_RESET				47
65262569Simp#define TSIF_H_RESET					48
66262569Simp#define CE1_H_RESET					49
67262569Simp#define CE1_CORE_RESET					50
68262569Simp#define CE1_SLEEP_RESET					51
69262569Simp#define CE2_H_RESET					52
70262569Simp#define CE2_CORE_RESET					53
71262569Simp#define SFAB_SFPB_M_RESET				54
72262569Simp#define SFAB_SFPB_S_RESET				55
73262569Simp#define RPM_PROC_RESET					56
74262569Simp#define PMIC_SSBI2_RESET				57
75262569Simp#define SDC1_RESET					58
76262569Simp#define SDC2_RESET					59
77262569Simp#define SDC3_RESET					60
78262569Simp#define SDC4_RESET					61
79262569Simp#define SDC5_RESET					62
80262569Simp#define DFAB_A2_RESET					63
81262569Simp#define USB_HS1_RESET					64
82262569Simp#define USB_HSIC_RESET					65
83262569Simp#define USB_FS1_XCVR_RESET				66
84262569Simp#define USB_FS1_RESET					67
85262569Simp#define USB_FS2_XCVR_RESET				68
86262569Simp#define USB_FS2_RESET					69
87262569Simp#define GSBI1_RESET					70
88262569Simp#define GSBI2_RESET					71
89262569Simp#define GSBI3_RESET					72
90262569Simp#define GSBI4_RESET					73
91262569Simp#define GSBI5_RESET					74
92262569Simp#define GSBI6_RESET					75
93262569Simp#define GSBI7_RESET					76
94262569Simp#define GSBI8_RESET					77
95262569Simp#define GSBI9_RESET					78
96262569Simp#define GSBI10_RESET					79
97262569Simp#define GSBI11_RESET					80
98262569Simp#define GSBI12_RESET					81
99262569Simp#define SPDM_RESET					82
100262569Simp#define TLMM_H_RESET					83
101262569Simp#define SFAB_MSS_S_RESET				84
102262569Simp#define MSS_SLP_RESET					85
103262569Simp#define MSS_Q6SW_JTAG_RESET				86
104262569Simp#define MSS_Q6FW_JTAG_RESET				87
105262569Simp#define MSS_RESET					88
106262569Simp#define SATA_H_RESET					89
107262569Simp#define SATA_RXOOB_RESE					90
108262569Simp#define SATA_PMALIVE_RESET				91
109262569Simp#define SATA_SFAB_M_RESET				92
110262569Simp#define TSSC_RESET					93
111262569Simp#define PDM_RESET					94
112262569Simp#define MPM_H_RESET					95
113262569Simp#define MPM_RESET					96
114262569Simp#define SFAB_SMPSS_S_RESET				97
115262569Simp#define PRNG_RESET					98
116262569Simp#define RIVA_RESET					99
117270864Simp#define USB_HS3_RESET					100
118270864Simp#define USB_HS4_RESET					101
119270864Simp#define CE3_RESET					102
120270864Simp#define PCIE_EXT_PCI_RESET				103
121270864Simp#define PCIE_PHY_RESET					104
122270864Simp#define PCIE_PCI_RESET					105
123270864Simp#define PCIE_POR_RESET					106
124270864Simp#define PCIE_HCLK_RESET					107
125270864Simp#define PCIE_ACLK_RESET					108
126270864Simp#define CE3_H_RESET					109
127270864Simp#define SFAB_CE3_M_RESET				110
128270864Simp#define SFAB_CE3_S_RESET				111
129270864Simp#define SATA_RESET					112
130270864Simp#define CE3_SLEEP_RESET					113
131270864Simp#define GSS_SLP_RESET					114
132270864Simp#define GSS_RESET					115
133262569Simp
134262569Simp#endif
135