1270866Simp/* 2270866Simp * Copyright (c) 2013 Samsung Electronics Co., Ltd. 3270866Simp * Author: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 4270866Simp * 5270866Simp * This program is free software; you can redistribute it and/or modify 6270866Simp * it under the terms of the GNU General Public License version 2 as 7270866Simp * published by the Free Software Foundation. 8270866Simp * 9270866Simp * Device Tree binding constants for Samsung S5PV210 clock controller. 10270866Simp */ 11270866Simp 12270866Simp#ifndef _DT_BINDINGS_CLOCK_S5PV210_H 13270866Simp#define _DT_BINDINGS_CLOCK_S5PV210_H 14270866Simp 15270866Simp/* Core clocks. */ 16270866Simp#define FIN_PLL 1 17270866Simp#define FOUT_APLL 2 18270866Simp#define FOUT_MPLL 3 19270866Simp#define FOUT_EPLL 4 20270866Simp#define FOUT_VPLL 5 21270866Simp 22270866Simp/* Muxes. */ 23270866Simp#define MOUT_FLASH 6 24270866Simp#define MOUT_PSYS 7 25270866Simp#define MOUT_DSYS 8 26270866Simp#define MOUT_MSYS 9 27270866Simp#define MOUT_VPLL 10 28270866Simp#define MOUT_EPLL 11 29270866Simp#define MOUT_MPLL 12 30270866Simp#define MOUT_APLL 13 31270866Simp#define MOUT_VPLLSRC 14 32270866Simp#define MOUT_CSIS 15 33270866Simp#define MOUT_FIMD 16 34270866Simp#define MOUT_CAM1 17 35270866Simp#define MOUT_CAM0 18 36270866Simp#define MOUT_DAC 19 37270866Simp#define MOUT_MIXER 20 38270866Simp#define MOUT_HDMI 21 39270866Simp#define MOUT_G2D 22 40270866Simp#define MOUT_MFC 23 41270866Simp#define MOUT_G3D 24 42270866Simp#define MOUT_FIMC2 25 43270866Simp#define MOUT_FIMC1 26 44270866Simp#define MOUT_FIMC0 27 45270866Simp#define MOUT_UART3 28 46270866Simp#define MOUT_UART2 29 47270866Simp#define MOUT_UART1 30 48270866Simp#define MOUT_UART0 31 49270866Simp#define MOUT_MMC3 32 50270866Simp#define MOUT_MMC2 33 51270866Simp#define MOUT_MMC1 34 52270866Simp#define MOUT_MMC0 35 53270866Simp#define MOUT_PWM 36 54270866Simp#define MOUT_SPI0 37 55270866Simp#define MOUT_SPI1 38 56270866Simp#define MOUT_DMC0 39 57270866Simp#define MOUT_PWI 40 58270866Simp#define MOUT_HPM 41 59270866Simp#define MOUT_SPDIF 42 60270866Simp#define MOUT_AUDIO2 43 61270866Simp#define MOUT_AUDIO1 44 62270866Simp#define MOUT_AUDIO0 45 63270866Simp 64270866Simp/* Dividers. */ 65270866Simp#define DOUT_PCLKP 46 66270866Simp#define DOUT_HCLKP 47 67270866Simp#define DOUT_PCLKD 48 68270866Simp#define DOUT_HCLKD 49 69270866Simp#define DOUT_PCLKM 50 70270866Simp#define DOUT_HCLKM 51 71270866Simp#define DOUT_A2M 52 72270866Simp#define DOUT_APLL 53 73270866Simp#define DOUT_CSIS 54 74270866Simp#define DOUT_FIMD 55 75270866Simp#define DOUT_CAM1 56 76270866Simp#define DOUT_CAM0 57 77270866Simp#define DOUT_TBLK 58 78270866Simp#define DOUT_G2D 59 79270866Simp#define DOUT_MFC 60 80270866Simp#define DOUT_G3D 61 81270866Simp#define DOUT_FIMC2 62 82270866Simp#define DOUT_FIMC1 63 83270866Simp#define DOUT_FIMC0 64 84270866Simp#define DOUT_UART3 65 85270866Simp#define DOUT_UART2 66 86270866Simp#define DOUT_UART1 67 87270866Simp#define DOUT_UART0 68 88270866Simp#define DOUT_MMC3 69 89270866Simp#define DOUT_MMC2 70 90270866Simp#define DOUT_MMC1 71 91270866Simp#define DOUT_MMC0 72 92270866Simp#define DOUT_PWM 73 93270866Simp#define DOUT_SPI1 74 94270866Simp#define DOUT_SPI0 75 95270866Simp#define DOUT_DMC0 76 96270866Simp#define DOUT_PWI 77 97270866Simp#define DOUT_HPM 78 98270866Simp#define DOUT_COPY 79 99270866Simp#define DOUT_FLASH 80 100270866Simp#define DOUT_AUDIO2 81 101270866Simp#define DOUT_AUDIO1 82 102270866Simp#define DOUT_AUDIO0 83 103270866Simp#define DOUT_DPM 84 104270866Simp#define DOUT_DVSEM 85 105270866Simp 106270866Simp/* Gates */ 107270866Simp#define SCLK_FIMC 86 108270866Simp#define CLK_CSIS 87 109270866Simp#define CLK_ROTATOR 88 110270866Simp#define CLK_FIMC2 89 111270866Simp#define CLK_FIMC1 90 112270866Simp#define CLK_FIMC0 91 113270866Simp#define CLK_MFC 92 114270866Simp#define CLK_G2D 93 115270866Simp#define CLK_G3D 94 116270866Simp#define CLK_IMEM 95 117270866Simp#define CLK_PDMA1 96 118270866Simp#define CLK_PDMA0 97 119270866Simp#define CLK_MDMA 98 120270866Simp#define CLK_DMC1 99 121270866Simp#define CLK_DMC0 100 122270866Simp#define CLK_NFCON 101 123270866Simp#define CLK_SROMC 102 124270866Simp#define CLK_CFCON 103 125270866Simp#define CLK_NANDXL 104 126270866Simp#define CLK_USB_HOST 105 127270866Simp#define CLK_USB_OTG 106 128270866Simp#define CLK_HDMI 107 129270866Simp#define CLK_TVENC 108 130270866Simp#define CLK_MIXER 109 131270866Simp#define CLK_VP 110 132270866Simp#define CLK_DSIM 111 133270866Simp#define CLK_FIMD 112 134270866Simp#define CLK_TZIC3 113 135270866Simp#define CLK_TZIC2 114 136270866Simp#define CLK_TZIC1 115 137270866Simp#define CLK_TZIC0 116 138270866Simp#define CLK_VIC3 117 139270866Simp#define CLK_VIC2 118 140270866Simp#define CLK_VIC1 119 141270866Simp#define CLK_VIC0 120 142270866Simp#define CLK_TSI 121 143270866Simp#define CLK_HSMMC3 122 144270866Simp#define CLK_HSMMC2 123 145270866Simp#define CLK_HSMMC1 124 146270866Simp#define CLK_HSMMC0 125 147270866Simp#define CLK_JTAG 126 148270866Simp#define CLK_MODEMIF 127 149270866Simp#define CLK_CORESIGHT 128 150270866Simp#define CLK_SDM 129 151270866Simp#define CLK_SECSS 130 152270866Simp#define CLK_PCM2 131 153270866Simp#define CLK_PCM1 132 154270866Simp#define CLK_PCM0 133 155270866Simp#define CLK_SYSCON 134 156270866Simp#define CLK_GPIO 135 157270866Simp#define CLK_TSADC 136 158270866Simp#define CLK_PWM 137 159270866Simp#define CLK_WDT 138 160270866Simp#define CLK_KEYIF 139 161270866Simp#define CLK_UART3 140 162270866Simp#define CLK_UART2 141 163270866Simp#define CLK_UART1 142 164270866Simp#define CLK_UART0 143 165270866Simp#define CLK_SYSTIMER 144 166270866Simp#define CLK_RTC 145 167270866Simp#define CLK_SPI1 146 168270866Simp#define CLK_SPI0 147 169270866Simp#define CLK_I2C_HDMI_PHY 148 170270866Simp#define CLK_I2C1 149 171270866Simp#define CLK_I2C2 150 172270866Simp#define CLK_I2C0 151 173270866Simp#define CLK_I2S1 152 174270866Simp#define CLK_I2S2 153 175270866Simp#define CLK_I2S0 154 176270866Simp#define CLK_AC97 155 177270866Simp#define CLK_SPDIF 156 178270866Simp#define CLK_TZPC3 157 179270866Simp#define CLK_TZPC2 158 180270866Simp#define CLK_TZPC1 159 181270866Simp#define CLK_TZPC0 160 182270866Simp#define CLK_SECKEY 161 183270866Simp#define CLK_IEM_APC 162 184270866Simp#define CLK_IEM_IEC 163 185270866Simp#define CLK_CHIPID 164 186270866Simp#define CLK_JPEG 163 187270866Simp 188270866Simp/* Special clocks*/ 189270866Simp#define SCLK_PWI 164 190270866Simp#define SCLK_SPDIF 165 191270866Simp#define SCLK_AUDIO2 166 192270866Simp#define SCLK_AUDIO1 167 193270866Simp#define SCLK_AUDIO0 168 194270866Simp#define SCLK_PWM 169 195270866Simp#define SCLK_SPI1 170 196270866Simp#define SCLK_SPI0 171 197270866Simp#define SCLK_UART3 172 198270866Simp#define SCLK_UART2 173 199270866Simp#define SCLK_UART1 174 200270866Simp#define SCLK_UART0 175 201270866Simp#define SCLK_MMC3 176 202270866Simp#define SCLK_MMC2 177 203270866Simp#define SCLK_MMC1 178 204270866Simp#define SCLK_MMC0 179 205270866Simp#define SCLK_FINVPLL 180 206270866Simp#define SCLK_CSIS 181 207270866Simp#define SCLK_FIMD 182 208270866Simp#define SCLK_CAM1 183 209270866Simp#define SCLK_CAM0 184 210270866Simp#define SCLK_DAC 185 211270866Simp#define SCLK_MIXER 186 212270866Simp#define SCLK_HDMI 187 213270866Simp#define SCLK_FIMC2 188 214270866Simp#define SCLK_FIMC1 189 215270866Simp#define SCLK_FIMC0 190 216270866Simp#define SCLK_HDMI27M 191 217270866Simp#define SCLK_HDMIPHY 192 218270866Simp#define SCLK_USBPHY0 193 219270866Simp#define SCLK_USBPHY1 194 220270866Simp 221270866Simp/* S5P6442-specific clocks */ 222270866Simp#define MOUT_D0SYNC 195 223270866Simp#define MOUT_D1SYNC 196 224270866Simp#define DOUT_MIXER 197 225270866Simp#define CLK_ETB 198 226270866Simp#define CLK_ETM 199 227270866Simp 228270866Simp/* CLKOUT */ 229270866Simp#define FOUT_APLL_CLKOUT 200 230270866Simp#define FOUT_MPLL_CLKOUT 201 231270866Simp#define DOUT_APLL_CLKOUT 202 232270866Simp#define MOUT_CLKSEL 203 233270866Simp#define DOUT_CLKOUT 204 234270866Simp#define MOUT_CLKOUT 205 235270866Simp 236270866Simp/* Total number of clocks. */ 237270866Simp#define NR_CLKS 206 238270866Simp 239270866Simp#endif /* _DT_BINDINGS_CLOCK_S5PV210_H */ 240