1270866Simp/* 2270866Simp * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 3270866Simp * 4270866Simp * This program is free software; you can redistribute it and/or modify 5270866Simp * it under the terms of the GNU General Public License version 2 as 6270866Simp * published by the Free Software Foundation. 7270866Simp * 8270866Simp */ 9270866Simp 10270866Simp#ifndef __DT_BINDINGS_CLOCK_IMX21_H 11270866Simp#define __DT_BINDINGS_CLOCK_IMX21_H 12270866Simp 13270866Simp#define IMX21_CLK_DUMMY 0 14270866Simp#define IMX21_CLK_CKIL 1 15270866Simp#define IMX21_CLK_CKIH 2 16270866Simp#define IMX21_CLK_FPM 3 17270866Simp#define IMX21_CLK_CKIH_DIV1P5 4 18270866Simp#define IMX21_CLK_MPLL_GATE 5 19270866Simp#define IMX21_CLK_SPLL_GATE 6 20270866Simp#define IMX21_CLK_FPM_GATE 7 21270866Simp#define IMX21_CLK_CKIH_GATE 8 22270866Simp#define IMX21_CLK_MPLL_OSC_SEL 9 23270866Simp#define IMX21_CLK_IPG 10 24270866Simp#define IMX21_CLK_HCLK 11 25270866Simp#define IMX21_CLK_MPLL_SEL 12 26270866Simp#define IMX21_CLK_SPLL_SEL 13 27270866Simp#define IMX21_CLK_SSI1_SEL 14 28270866Simp#define IMX21_CLK_SSI2_SEL 15 29270866Simp#define IMX21_CLK_USB_DIV 16 30270866Simp#define IMX21_CLK_FCLK 17 31270866Simp#define IMX21_CLK_MPLL 18 32270866Simp#define IMX21_CLK_SPLL 19 33270866Simp#define IMX21_CLK_NFC_DIV 20 34270866Simp#define IMX21_CLK_SSI1_DIV 21 35270866Simp#define IMX21_CLK_SSI2_DIV 22 36270866Simp#define IMX21_CLK_PER1 23 37270866Simp#define IMX21_CLK_PER2 24 38270866Simp#define IMX21_CLK_PER3 25 39270866Simp#define IMX21_CLK_PER4 26 40270866Simp#define IMX21_CLK_UART1_IPG_GATE 27 41270866Simp#define IMX21_CLK_UART2_IPG_GATE 28 42270866Simp#define IMX21_CLK_UART3_IPG_GATE 29 43270866Simp#define IMX21_CLK_UART4_IPG_GATE 30 44270866Simp#define IMX21_CLK_CSPI1_IPG_GATE 31 45270866Simp#define IMX21_CLK_CSPI2_IPG_GATE 32 46270866Simp#define IMX21_CLK_SSI1_GATE 33 47270866Simp#define IMX21_CLK_SSI2_GATE 34 48270866Simp#define IMX21_CLK_SDHC1_IPG_GATE 35 49270866Simp#define IMX21_CLK_SDHC2_IPG_GATE 36 50270866Simp#define IMX21_CLK_GPIO_GATE 37 51270866Simp#define IMX21_CLK_I2C_GATE 38 52270866Simp#define IMX21_CLK_DMA_GATE 39 53270866Simp#define IMX21_CLK_USB_GATE 40 54270866Simp#define IMX21_CLK_EMMA_GATE 41 55270866Simp#define IMX21_CLK_SSI2_BAUD_GATE 42 56270866Simp#define IMX21_CLK_SSI1_BAUD_GATE 43 57270866Simp#define IMX21_CLK_LCDC_IPG_GATE 44 58270866Simp#define IMX21_CLK_NFC_GATE 45 59270866Simp#define IMX21_CLK_LCDC_HCLK_GATE 46 60270866Simp#define IMX21_CLK_PER4_GATE 47 61270866Simp#define IMX21_CLK_BMI_GATE 48 62270866Simp#define IMX21_CLK_USB_HCLK_GATE 49 63270866Simp#define IMX21_CLK_SLCDC_GATE 50 64270866Simp#define IMX21_CLK_SLCDC_HCLK_GATE 51 65270866Simp#define IMX21_CLK_EMMA_HCLK_GATE 52 66270866Simp#define IMX21_CLK_BROM_GATE 53 67270866Simp#define IMX21_CLK_DMA_HCLK_GATE 54 68270866Simp#define IMX21_CLK_CSI_HCLK_GATE 55 69270866Simp#define IMX21_CLK_CSPI3_IPG_GATE 56 70270866Simp#define IMX21_CLK_WDOG_GATE 57 71270866Simp#define IMX21_CLK_GPT1_IPG_GATE 58 72270866Simp#define IMX21_CLK_GPT2_IPG_GATE 59 73270866Simp#define IMX21_CLK_GPT3_IPG_GATE 60 74270866Simp#define IMX21_CLK_PWM_IPG_GATE 61 75270866Simp#define IMX21_CLK_RTC_GATE 62 76270866Simp#define IMX21_CLK_KPP_GATE 63 77270866Simp#define IMX21_CLK_OWIRE_GATE 64 78270866Simp#define IMX21_CLK_MAX 65 79270866Simp 80270866Simp#endif 81