1279377Simp/* 2279377Simp * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 3279377Simp * 4279377Simp * This program is free software; you can redistribute it and/or modify 5279377Simp * it under the terms of the GNU General Public License version 2 as 6279377Simp * published by the Free Software Foundation. 7279377Simp */ 8279377Simp 9279377Simp#include <dt-bindings/gpio/gpio.h> 10279377Simp#include <dt-bindings/interrupt-controller/arm-gic.h> 11279377Simp#include <dt-bindings/pinctrl/omap.h> 12279377Simp 13279377Simp#include "skeleton.dtsi" 14279377Simp 15279377Simp/ { 16279377Simp compatible = "ti,omap4430", "ti,omap4"; 17295436Sandrew interrupt-parent = <&wakeupgen>; 18279377Simp 19279377Simp aliases { 20279377Simp i2c0 = &i2c1; 21279377Simp i2c1 = &i2c2; 22279377Simp i2c2 = &i2c3; 23279377Simp i2c3 = &i2c4; 24279377Simp serial0 = &uart1; 25279377Simp serial1 = &uart2; 26279377Simp serial2 = &uart3; 27279377Simp serial3 = &uart4; 28279377Simp }; 29279377Simp 30279377Simp cpus { 31279377Simp #address-cells = <1>; 32279377Simp #size-cells = <0>; 33279377Simp 34279377Simp cpu@0 { 35279377Simp compatible = "arm,cortex-a9"; 36279377Simp device_type = "cpu"; 37279377Simp next-level-cache = <&L2>; 38279377Simp reg = <0x0>; 39279377Simp 40279377Simp clocks = <&dpll_mpu_ck>; 41279377Simp clock-names = "cpu"; 42279377Simp 43279377Simp clock-latency = <300000>; /* From omap-cpufreq driver */ 44279377Simp }; 45279377Simp cpu@1 { 46279377Simp compatible = "arm,cortex-a9"; 47279377Simp device_type = "cpu"; 48279377Simp next-level-cache = <&L2>; 49279377Simp reg = <0x1>; 50279377Simp }; 51279377Simp }; 52279377Simp 53279377Simp gic: interrupt-controller@48241000 { 54279377Simp compatible = "arm,cortex-a9-gic"; 55279377Simp interrupt-controller; 56279377Simp #interrupt-cells = <3>; 57279377Simp reg = <0x48241000 0x1000>, 58279377Simp <0x48240100 0x0100>; 59295436Sandrew interrupt-parent = <&gic>; 60279377Simp }; 61279377Simp 62279377Simp L2: l2-cache-controller@48242000 { 63279377Simp compatible = "arm,pl310-cache"; 64279377Simp reg = <0x48242000 0x1000>; 65279377Simp cache-unified; 66279377Simp cache-level = <2>; 67279377Simp }; 68279377Simp 69279377Simp local-timer@48240600 { 70279377Simp compatible = "arm,cortex-a9-twd-timer"; 71279377Simp clocks = <&mpu_periphclk>; 72279377Simp reg = <0x48240600 0x20>; 73279377Simp interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; 74295436Sandrew interrupt-parent = <&gic>; 75279377Simp }; 76279377Simp 77295436Sandrew wakeupgen: interrupt-controller@48281000 { 78295436Sandrew compatible = "ti,omap4-wugen-mpu"; 79295436Sandrew interrupt-controller; 80295436Sandrew #interrupt-cells = <3>; 81295436Sandrew reg = <0x48281000 0x1000>; 82295436Sandrew interrupt-parent = <&gic>; 83295436Sandrew }; 84295436Sandrew 85279377Simp /* 86279377Simp * The soc node represents the soc top level view. It is used for IPs 87279377Simp * that are not memory mapped in the MPU view or for the MPU itself. 88279377Simp */ 89279377Simp soc { 90279377Simp compatible = "ti,omap-infra"; 91279377Simp mpu { 92279377Simp compatible = "ti,omap4-mpu"; 93279377Simp ti,hwmods = "mpu"; 94279377Simp sram = <&ocmcram>; 95279377Simp }; 96279377Simp 97279377Simp dsp { 98279377Simp compatible = "ti,omap3-c64"; 99279377Simp ti,hwmods = "dsp"; 100279377Simp }; 101279377Simp 102279377Simp iva { 103279377Simp compatible = "ti,ivahd"; 104279377Simp ti,hwmods = "iva"; 105279377Simp }; 106279377Simp }; 107279377Simp 108279377Simp /* 109279377Simp * XXX: Use a flat representation of the OMAP4 interconnect. 110279377Simp * The real OMAP interconnect network is quite complex. 111279377Simp * Since it will not bring real advantage to represent that in DT for 112279377Simp * the moment, just use a fake OCP bus entry to represent the whole bus 113279377Simp * hierarchy. 114279377Simp */ 115279377Simp ocp { 116279377Simp compatible = "ti,omap4-l3-noc", "simple-bus"; 117279377Simp #address-cells = <1>; 118279377Simp #size-cells = <1>; 119279377Simp ranges; 120279377Simp ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; 121279377Simp reg = <0x44000000 0x1000>, 122279377Simp <0x44800000 0x2000>, 123279377Simp <0x45000000 0x1000>; 124279377Simp interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 125279377Simp <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 126279377Simp 127295436Sandrew l4_cfg: l4@4a000000 { 128295436Sandrew compatible = "ti,omap4-l4-cfg", "simple-bus"; 129295436Sandrew #address-cells = <1>; 130295436Sandrew #size-cells = <1>; 131295436Sandrew ranges = <0 0x4a000000 0x1000000>; 132279377Simp 133295436Sandrew cm1: cm1@4000 { 134295436Sandrew compatible = "ti,omap4-cm1"; 135295436Sandrew reg = <0x4000 0x2000>; 136279377Simp 137295436Sandrew cm1_clocks: clocks { 138295436Sandrew #address-cells = <1>; 139295436Sandrew #size-cells = <0>; 140295436Sandrew }; 141295436Sandrew 142295436Sandrew cm1_clockdomains: clockdomains { 143295436Sandrew }; 144279377Simp }; 145279377Simp 146295436Sandrew cm2: cm2@8000 { 147295436Sandrew compatible = "ti,omap4-cm2"; 148295436Sandrew reg = <0x8000 0x3000>; 149279377Simp 150295436Sandrew cm2_clocks: clocks { 151295436Sandrew #address-cells = <1>; 152295436Sandrew #size-cells = <0>; 153295436Sandrew }; 154279377Simp 155295436Sandrew cm2_clockdomains: clockdomains { 156295436Sandrew }; 157279377Simp }; 158279377Simp 159295436Sandrew omap4_scm_core: scm@2000 { 160295436Sandrew compatible = "ti,omap4-scm-core", "simple-bus"; 161295436Sandrew reg = <0x2000 0x1000>; 162279377Simp #address-cells = <1>; 163295436Sandrew #size-cells = <1>; 164295436Sandrew ranges = <0 0x2000 0x1000>; 165279377Simp 166295436Sandrew scm_conf: scm_conf@0 { 167295436Sandrew compatible = "syscon"; 168295436Sandrew reg = <0x0 0x800>; 169295436Sandrew #address-cells = <1>; 170295436Sandrew #size-cells = <1>; 171295436Sandrew }; 172279377Simp }; 173279377Simp 174295436Sandrew omap4_padconf_core: scm@100000 { 175295436Sandrew compatible = "ti,omap4-scm-padconf-core", 176295436Sandrew "simple-bus"; 177279377Simp #address-cells = <1>; 178295436Sandrew #size-cells = <1>; 179295436Sandrew ranges = <0 0x100000 0x1000>; 180279377Simp 181295436Sandrew omap4_pmx_core: pinmux@40 { 182295436Sandrew compatible = "ti,omap4-padconf", 183295436Sandrew "pinctrl-single"; 184295436Sandrew reg = <0x40 0x0196>; 185295436Sandrew #address-cells = <1>; 186295436Sandrew #size-cells = <0>; 187295436Sandrew #interrupt-cells = <1>; 188295436Sandrew interrupt-controller; 189295436Sandrew pinctrl-single,register-width = <16>; 190295436Sandrew pinctrl-single,function-mask = <0x7fff>; 191295436Sandrew }; 192295436Sandrew 193295436Sandrew omap4_padconf_global: omap4_padconf_global@5a0 { 194295436Sandrew compatible = "syscon", 195295436Sandrew "simple-bus"; 196295436Sandrew reg = <0x5a0 0x170>; 197295436Sandrew #address-cells = <1>; 198295436Sandrew #size-cells = <1>; 199295436Sandrew ranges = <0 0x5a0 0x170>; 200295436Sandrew 201295436Sandrew pbias_regulator: pbias_regulator { 202295436Sandrew compatible = "ti,pbias-omap4", "ti,pbias-omap"; 203295436Sandrew reg = <0x60 0x4>; 204295436Sandrew syscon = <&omap4_padconf_global>; 205295436Sandrew pbias_mmc_reg: pbias_mmc_omap4 { 206295436Sandrew regulator-name = "pbias_mmc_omap4"; 207295436Sandrew regulator-min-microvolt = <1800000>; 208295436Sandrew regulator-max-microvolt = <3000000>; 209295436Sandrew }; 210295436Sandrew }; 211295436Sandrew }; 212279377Simp }; 213279377Simp 214295436Sandrew l4_wkup: l4@300000 { 215295436Sandrew compatible = "ti,omap4-l4-wkup", "simple-bus"; 216295436Sandrew #address-cells = <1>; 217295436Sandrew #size-cells = <1>; 218295436Sandrew ranges = <0 0x300000 0x40000>; 219279377Simp 220295436Sandrew counter32k: counter@4000 { 221295436Sandrew compatible = "ti,omap-counter32k"; 222295436Sandrew reg = <0x4000 0x20>; 223295436Sandrew ti,hwmods = "counter_32k"; 224295436Sandrew }; 225279377Simp 226295436Sandrew prm: prm@6000 { 227295436Sandrew compatible = "ti,omap4-prm"; 228295436Sandrew reg = <0x6000 0x3000>; 229295436Sandrew interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 230279377Simp 231295436Sandrew prm_clocks: clocks { 232295436Sandrew #address-cells = <1>; 233295436Sandrew #size-cells = <0>; 234295436Sandrew }; 235295436Sandrew 236295436Sandrew prm_clockdomains: clockdomains { 237295436Sandrew }; 238295436Sandrew }; 239295436Sandrew 240295436Sandrew scrm: scrm@a000 { 241295436Sandrew compatible = "ti,omap4-scrm"; 242295436Sandrew reg = <0xa000 0x2000>; 243295436Sandrew 244295436Sandrew scrm_clocks: clocks { 245295436Sandrew #address-cells = <1>; 246295436Sandrew #size-cells = <0>; 247295436Sandrew }; 248295436Sandrew 249295436Sandrew scrm_clockdomains: clockdomains { 250295436Sandrew }; 251295436Sandrew }; 252295436Sandrew 253295436Sandrew omap4_pmx_wkup: pinmux@1e040 { 254295436Sandrew compatible = "ti,omap4-padconf", 255295436Sandrew "pinctrl-single"; 256295436Sandrew reg = <0x1e040 0x0038>; 257295436Sandrew #address-cells = <1>; 258295436Sandrew #size-cells = <0>; 259295436Sandrew #interrupt-cells = <1>; 260295436Sandrew interrupt-controller; 261295436Sandrew pinctrl-single,register-width = <16>; 262295436Sandrew pinctrl-single,function-mask = <0x7fff>; 263295436Sandrew }; 264279377Simp }; 265279377Simp }; 266279377Simp 267279377Simp ocmcram: ocmcram@40304000 { 268279377Simp compatible = "mmio-sram"; 269279377Simp reg = <0x40304000 0xa000>; /* 40k */ 270279377Simp }; 271279377Simp 272279377Simp sdma: dma-controller@4a056000 { 273279377Simp compatible = "ti,omap4430-sdma"; 274279377Simp reg = <0x4a056000 0x1000>; 275279377Simp interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 276279377Simp <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 277279377Simp <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 278279377Simp <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 279279377Simp #dma-cells = <1>; 280295436Sandrew dma-channels = <32>; 281295436Sandrew dma-requests = <127>; 282279377Simp }; 283279377Simp 284279377Simp gpio1: gpio@4a310000 { 285279377Simp compatible = "ti,omap4-gpio"; 286279377Simp reg = <0x4a310000 0x200>; 287279377Simp interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 288279377Simp ti,hwmods = "gpio1"; 289279377Simp ti,gpio-always-on; 290279377Simp gpio-controller; 291279377Simp #gpio-cells = <2>; 292279377Simp interrupt-controller; 293279377Simp #interrupt-cells = <2>; 294279377Simp }; 295279377Simp 296279377Simp gpio2: gpio@48055000 { 297279377Simp compatible = "ti,omap4-gpio"; 298279377Simp reg = <0x48055000 0x200>; 299279377Simp interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 300279377Simp ti,hwmods = "gpio2"; 301279377Simp gpio-controller; 302279377Simp #gpio-cells = <2>; 303279377Simp interrupt-controller; 304279377Simp #interrupt-cells = <2>; 305279377Simp }; 306279377Simp 307279377Simp gpio3: gpio@48057000 { 308279377Simp compatible = "ti,omap4-gpio"; 309279377Simp reg = <0x48057000 0x200>; 310279377Simp interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 311279377Simp ti,hwmods = "gpio3"; 312279377Simp gpio-controller; 313279377Simp #gpio-cells = <2>; 314279377Simp interrupt-controller; 315279377Simp #interrupt-cells = <2>; 316279377Simp }; 317279377Simp 318279377Simp gpio4: gpio@48059000 { 319279377Simp compatible = "ti,omap4-gpio"; 320279377Simp reg = <0x48059000 0x200>; 321279377Simp interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 322279377Simp ti,hwmods = "gpio4"; 323279377Simp gpio-controller; 324279377Simp #gpio-cells = <2>; 325279377Simp interrupt-controller; 326279377Simp #interrupt-cells = <2>; 327279377Simp }; 328279377Simp 329279377Simp gpio5: gpio@4805b000 { 330279377Simp compatible = "ti,omap4-gpio"; 331279377Simp reg = <0x4805b000 0x200>; 332279377Simp interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 333279377Simp ti,hwmods = "gpio5"; 334279377Simp gpio-controller; 335279377Simp #gpio-cells = <2>; 336279377Simp interrupt-controller; 337279377Simp #interrupt-cells = <2>; 338279377Simp }; 339279377Simp 340279377Simp gpio6: gpio@4805d000 { 341279377Simp compatible = "ti,omap4-gpio"; 342279377Simp reg = <0x4805d000 0x200>; 343279377Simp interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 344279377Simp ti,hwmods = "gpio6"; 345279377Simp gpio-controller; 346279377Simp #gpio-cells = <2>; 347279377Simp interrupt-controller; 348279377Simp #interrupt-cells = <2>; 349279377Simp }; 350279377Simp 351295436Sandrew elm: elm@48078000 { 352295436Sandrew compatible = "ti,am3352-elm"; 353295436Sandrew reg = <0x48078000 0x2000>; 354295436Sandrew interrupts = <4>; 355295436Sandrew ti,hwmods = "elm"; 356295436Sandrew status = "disabled"; 357295436Sandrew }; 358295436Sandrew 359279377Simp gpmc: gpmc@50000000 { 360279377Simp compatible = "ti,omap4430-gpmc"; 361279377Simp reg = <0x50000000 0x1000>; 362279377Simp #address-cells = <2>; 363279377Simp #size-cells = <1>; 364279377Simp interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 365295436Sandrew dmas = <&sdma 4>; 366295436Sandrew dma-names = "rxtx"; 367279377Simp gpmc,num-cs = <8>; 368279377Simp gpmc,num-waitpins = <4>; 369279377Simp ti,hwmods = "gpmc"; 370279377Simp ti,no-idle-on-init; 371279377Simp clocks = <&l3_div_ck>; 372279377Simp clock-names = "fck"; 373279377Simp }; 374279377Simp 375279377Simp uart1: serial@4806a000 { 376279377Simp compatible = "ti,omap4-uart"; 377279377Simp reg = <0x4806a000 0x100>; 378279377Simp interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 379279377Simp ti,hwmods = "uart1"; 380279377Simp clock-frequency = <48000000>; 381279377Simp }; 382279377Simp 383279377Simp uart2: serial@4806c000 { 384279377Simp compatible = "ti,omap4-uart"; 385279377Simp reg = <0x4806c000 0x100>; 386295436Sandrew interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 387279377Simp ti,hwmods = "uart2"; 388279377Simp clock-frequency = <48000000>; 389279377Simp }; 390279377Simp 391279377Simp uart3: serial@48020000 { 392279377Simp compatible = "ti,omap4-uart"; 393279377Simp reg = <0x48020000 0x100>; 394295436Sandrew interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 395279377Simp ti,hwmods = "uart3"; 396279377Simp clock-frequency = <48000000>; 397279377Simp }; 398279377Simp 399279377Simp uart4: serial@4806e000 { 400279377Simp compatible = "ti,omap4-uart"; 401279377Simp reg = <0x4806e000 0x100>; 402295436Sandrew interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 403279377Simp ti,hwmods = "uart4"; 404279377Simp clock-frequency = <48000000>; 405279377Simp }; 406279377Simp 407279377Simp hwspinlock: spinlock@4a0f6000 { 408279377Simp compatible = "ti,omap4-hwspinlock"; 409279377Simp reg = <0x4a0f6000 0x1000>; 410279377Simp ti,hwmods = "spinlock"; 411279377Simp #hwlock-cells = <1>; 412279377Simp }; 413279377Simp 414279377Simp i2c1: i2c@48070000 { 415279377Simp compatible = "ti,omap4-i2c"; 416279377Simp reg = <0x48070000 0x100>; 417279377Simp interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 418279377Simp #address-cells = <1>; 419279377Simp #size-cells = <0>; 420279377Simp ti,hwmods = "i2c1"; 421279377Simp }; 422279377Simp 423279377Simp i2c2: i2c@48072000 { 424279377Simp compatible = "ti,omap4-i2c"; 425279377Simp reg = <0x48072000 0x100>; 426279377Simp interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 427279377Simp #address-cells = <1>; 428279377Simp #size-cells = <0>; 429279377Simp ti,hwmods = "i2c2"; 430279377Simp }; 431279377Simp 432279377Simp i2c3: i2c@48060000 { 433279377Simp compatible = "ti,omap4-i2c"; 434279377Simp reg = <0x48060000 0x100>; 435279377Simp interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 436279377Simp #address-cells = <1>; 437279377Simp #size-cells = <0>; 438279377Simp ti,hwmods = "i2c3"; 439279377Simp }; 440279377Simp 441279377Simp i2c4: i2c@48350000 { 442279377Simp compatible = "ti,omap4-i2c"; 443279377Simp reg = <0x48350000 0x100>; 444279377Simp interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 445279377Simp #address-cells = <1>; 446279377Simp #size-cells = <0>; 447279377Simp ti,hwmods = "i2c4"; 448279377Simp }; 449279377Simp 450279377Simp mcspi1: spi@48098000 { 451279377Simp compatible = "ti,omap4-mcspi"; 452279377Simp reg = <0x48098000 0x200>; 453279377Simp interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 454279377Simp #address-cells = <1>; 455279377Simp #size-cells = <0>; 456279377Simp ti,hwmods = "mcspi1"; 457279377Simp ti,spi-num-cs = <4>; 458279377Simp dmas = <&sdma 35>, 459279377Simp <&sdma 36>, 460279377Simp <&sdma 37>, 461279377Simp <&sdma 38>, 462279377Simp <&sdma 39>, 463279377Simp <&sdma 40>, 464279377Simp <&sdma 41>, 465279377Simp <&sdma 42>; 466279377Simp dma-names = "tx0", "rx0", "tx1", "rx1", 467279377Simp "tx2", "rx2", "tx3", "rx3"; 468279377Simp }; 469279377Simp 470279377Simp mcspi2: spi@4809a000 { 471279377Simp compatible = "ti,omap4-mcspi"; 472279377Simp reg = <0x4809a000 0x200>; 473279377Simp interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 474279377Simp #address-cells = <1>; 475279377Simp #size-cells = <0>; 476279377Simp ti,hwmods = "mcspi2"; 477279377Simp ti,spi-num-cs = <2>; 478279377Simp dmas = <&sdma 43>, 479279377Simp <&sdma 44>, 480279377Simp <&sdma 45>, 481279377Simp <&sdma 46>; 482279377Simp dma-names = "tx0", "rx0", "tx1", "rx1"; 483279377Simp }; 484279377Simp 485279377Simp mcspi3: spi@480b8000 { 486279377Simp compatible = "ti,omap4-mcspi"; 487279377Simp reg = <0x480b8000 0x200>; 488279377Simp interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 489279377Simp #address-cells = <1>; 490279377Simp #size-cells = <0>; 491279377Simp ti,hwmods = "mcspi3"; 492279377Simp ti,spi-num-cs = <2>; 493279377Simp dmas = <&sdma 15>, <&sdma 16>; 494279377Simp dma-names = "tx0", "rx0"; 495279377Simp }; 496279377Simp 497279377Simp mcspi4: spi@480ba000 { 498279377Simp compatible = "ti,omap4-mcspi"; 499279377Simp reg = <0x480ba000 0x200>; 500279377Simp interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 501279377Simp #address-cells = <1>; 502279377Simp #size-cells = <0>; 503279377Simp ti,hwmods = "mcspi4"; 504279377Simp ti,spi-num-cs = <1>; 505279377Simp dmas = <&sdma 70>, <&sdma 71>; 506279377Simp dma-names = "tx0", "rx0"; 507279377Simp }; 508279377Simp 509279377Simp mmc1: mmc@4809c000 { 510279377Simp compatible = "ti,omap4-hsmmc"; 511279377Simp reg = <0x4809c000 0x400>; 512279377Simp interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 513279377Simp ti,hwmods = "mmc1"; 514279377Simp ti,dual-volt; 515279377Simp ti,needs-special-reset; 516279377Simp dmas = <&sdma 61>, <&sdma 62>; 517279377Simp dma-names = "tx", "rx"; 518279377Simp pbias-supply = <&pbias_mmc_reg>; 519279377Simp }; 520279377Simp 521279377Simp mmc2: mmc@480b4000 { 522279377Simp compatible = "ti,omap4-hsmmc"; 523279377Simp reg = <0x480b4000 0x400>; 524279377Simp interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 525279377Simp ti,hwmods = "mmc2"; 526279377Simp ti,needs-special-reset; 527279377Simp dmas = <&sdma 47>, <&sdma 48>; 528279377Simp dma-names = "tx", "rx"; 529279377Simp }; 530279377Simp 531279377Simp mmc3: mmc@480ad000 { 532279377Simp compatible = "ti,omap4-hsmmc"; 533279377Simp reg = <0x480ad000 0x400>; 534279377Simp interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 535279377Simp ti,hwmods = "mmc3"; 536279377Simp ti,needs-special-reset; 537279377Simp dmas = <&sdma 77>, <&sdma 78>; 538279377Simp dma-names = "tx", "rx"; 539279377Simp }; 540279377Simp 541279377Simp mmc4: mmc@480d1000 { 542279377Simp compatible = "ti,omap4-hsmmc"; 543279377Simp reg = <0x480d1000 0x400>; 544279377Simp interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 545279377Simp ti,hwmods = "mmc4"; 546279377Simp ti,needs-special-reset; 547279377Simp dmas = <&sdma 57>, <&sdma 58>; 548279377Simp dma-names = "tx", "rx"; 549279377Simp }; 550279377Simp 551279377Simp mmc5: mmc@480d5000 { 552279377Simp compatible = "ti,omap4-hsmmc"; 553279377Simp reg = <0x480d5000 0x400>; 554279377Simp interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 555279377Simp ti,hwmods = "mmc5"; 556279377Simp ti,needs-special-reset; 557279377Simp dmas = <&sdma 59>, <&sdma 60>; 558279377Simp dma-names = "tx", "rx"; 559279377Simp }; 560279377Simp 561279377Simp mmu_dsp: mmu@4a066000 { 562279377Simp compatible = "ti,omap4-iommu"; 563279377Simp reg = <0x4a066000 0x100>; 564279377Simp interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 565279377Simp ti,hwmods = "mmu_dsp"; 566295436Sandrew #iommu-cells = <0>; 567279377Simp }; 568279377Simp 569279377Simp mmu_ipu: mmu@55082000 { 570279377Simp compatible = "ti,omap4-iommu"; 571279377Simp reg = <0x55082000 0x100>; 572279377Simp interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 573279377Simp ti,hwmods = "mmu_ipu"; 574295436Sandrew #iommu-cells = <0>; 575279377Simp ti,iommu-bus-err-back; 576279377Simp }; 577279377Simp 578279377Simp wdt2: wdt@4a314000 { 579279377Simp compatible = "ti,omap4-wdt", "ti,omap3-wdt"; 580279377Simp reg = <0x4a314000 0x80>; 581279377Simp interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 582279377Simp ti,hwmods = "wd_timer2"; 583279377Simp }; 584279377Simp 585279377Simp mcpdm: mcpdm@40132000 { 586279377Simp compatible = "ti,omap4-mcpdm"; 587279377Simp reg = <0x40132000 0x7f>, /* MPU private access */ 588279377Simp <0x49032000 0x7f>; /* L3 Interconnect */ 589279377Simp reg-names = "mpu", "dma"; 590279377Simp interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 591279377Simp ti,hwmods = "mcpdm"; 592279377Simp dmas = <&sdma 65>, 593279377Simp <&sdma 66>; 594279377Simp dma-names = "up_link", "dn_link"; 595279377Simp status = "disabled"; 596279377Simp }; 597279377Simp 598279377Simp dmic: dmic@4012e000 { 599279377Simp compatible = "ti,omap4-dmic"; 600279377Simp reg = <0x4012e000 0x7f>, /* MPU private access */ 601279377Simp <0x4902e000 0x7f>; /* L3 Interconnect */ 602279377Simp reg-names = "mpu", "dma"; 603279377Simp interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 604279377Simp ti,hwmods = "dmic"; 605279377Simp dmas = <&sdma 67>; 606279377Simp dma-names = "up_link"; 607279377Simp status = "disabled"; 608279377Simp }; 609279377Simp 610279377Simp mcbsp1: mcbsp@40122000 { 611279377Simp compatible = "ti,omap4-mcbsp"; 612279377Simp reg = <0x40122000 0xff>, /* MPU private access */ 613279377Simp <0x49022000 0xff>; /* L3 Interconnect */ 614279377Simp reg-names = "mpu", "dma"; 615279377Simp interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 616279377Simp interrupt-names = "common"; 617279377Simp ti,buffer-size = <128>; 618279377Simp ti,hwmods = "mcbsp1"; 619279377Simp dmas = <&sdma 33>, 620279377Simp <&sdma 34>; 621279377Simp dma-names = "tx", "rx"; 622279377Simp status = "disabled"; 623279377Simp }; 624279377Simp 625279377Simp mcbsp2: mcbsp@40124000 { 626279377Simp compatible = "ti,omap4-mcbsp"; 627279377Simp reg = <0x40124000 0xff>, /* MPU private access */ 628279377Simp <0x49024000 0xff>; /* L3 Interconnect */ 629279377Simp reg-names = "mpu", "dma"; 630279377Simp interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 631279377Simp interrupt-names = "common"; 632279377Simp ti,buffer-size = <128>; 633279377Simp ti,hwmods = "mcbsp2"; 634279377Simp dmas = <&sdma 17>, 635279377Simp <&sdma 18>; 636279377Simp dma-names = "tx", "rx"; 637279377Simp status = "disabled"; 638279377Simp }; 639279377Simp 640279377Simp mcbsp3: mcbsp@40126000 { 641279377Simp compatible = "ti,omap4-mcbsp"; 642279377Simp reg = <0x40126000 0xff>, /* MPU private access */ 643279377Simp <0x49026000 0xff>; /* L3 Interconnect */ 644279377Simp reg-names = "mpu", "dma"; 645279377Simp interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 646279377Simp interrupt-names = "common"; 647279377Simp ti,buffer-size = <128>; 648279377Simp ti,hwmods = "mcbsp3"; 649279377Simp dmas = <&sdma 19>, 650279377Simp <&sdma 20>; 651279377Simp dma-names = "tx", "rx"; 652279377Simp status = "disabled"; 653279377Simp }; 654279377Simp 655279377Simp mcbsp4: mcbsp@48096000 { 656279377Simp compatible = "ti,omap4-mcbsp"; 657279377Simp reg = <0x48096000 0xff>; /* L4 Interconnect */ 658279377Simp reg-names = "mpu"; 659279377Simp interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 660279377Simp interrupt-names = "common"; 661279377Simp ti,buffer-size = <128>; 662279377Simp ti,hwmods = "mcbsp4"; 663279377Simp dmas = <&sdma 31>, 664279377Simp <&sdma 32>; 665279377Simp dma-names = "tx", "rx"; 666279377Simp status = "disabled"; 667279377Simp }; 668279377Simp 669279377Simp keypad: keypad@4a31c000 { 670279377Simp compatible = "ti,omap4-keypad"; 671279377Simp reg = <0x4a31c000 0x80>; 672279377Simp interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 673279377Simp reg-names = "mpu"; 674279377Simp ti,hwmods = "kbd"; 675279377Simp }; 676279377Simp 677279377Simp dmm@4e000000 { 678279377Simp compatible = "ti,omap4-dmm"; 679279377Simp reg = <0x4e000000 0x800>; 680279377Simp interrupts = <0 113 0x4>; 681279377Simp ti,hwmods = "dmm"; 682279377Simp }; 683279377Simp 684279377Simp emif1: emif@4c000000 { 685279377Simp compatible = "ti,emif-4d"; 686279377Simp reg = <0x4c000000 0x100>; 687279377Simp interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 688279377Simp ti,hwmods = "emif1"; 689279377Simp ti,no-idle-on-init; 690279377Simp phy-type = <1>; 691279377Simp hw-caps-read-idle-ctrl; 692279377Simp hw-caps-ll-interface; 693279377Simp hw-caps-temp-alert; 694279377Simp }; 695279377Simp 696279377Simp emif2: emif@4d000000 { 697279377Simp compatible = "ti,emif-4d"; 698279377Simp reg = <0x4d000000 0x100>; 699279377Simp interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 700279377Simp ti,hwmods = "emif2"; 701279377Simp ti,no-idle-on-init; 702279377Simp phy-type = <1>; 703279377Simp hw-caps-read-idle-ctrl; 704279377Simp hw-caps-ll-interface; 705279377Simp hw-caps-temp-alert; 706279377Simp }; 707279377Simp 708279377Simp ocp2scp@4a0ad000 { 709279377Simp compatible = "ti,omap-ocp2scp"; 710279377Simp reg = <0x4a0ad000 0x1f>; 711279377Simp #address-cells = <1>; 712279377Simp #size-cells = <1>; 713279377Simp ranges; 714279377Simp ti,hwmods = "ocp2scp_usb_phy"; 715279377Simp usb2_phy: usb2phy@4a0ad080 { 716279377Simp compatible = "ti,omap-usb2"; 717279377Simp reg = <0x4a0ad080 0x58>; 718279377Simp ctrl-module = <&omap_control_usb2phy>; 719279377Simp clocks = <&usb_phy_cm_clk32k>; 720279377Simp clock-names = "wkupclk"; 721279377Simp #phy-cells = <0>; 722279377Simp }; 723279377Simp }; 724279377Simp 725279377Simp mailbox: mailbox@4a0f4000 { 726279377Simp compatible = "ti,omap4-mailbox"; 727279377Simp reg = <0x4a0f4000 0x200>; 728279377Simp interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 729279377Simp ti,hwmods = "mailbox"; 730279377Simp #mbox-cells = <1>; 731279377Simp ti,mbox-num-users = <3>; 732279377Simp ti,mbox-num-fifos = <8>; 733279377Simp mbox_ipu: mbox_ipu { 734279377Simp ti,mbox-tx = <0 0 0>; 735279377Simp ti,mbox-rx = <1 0 0>; 736279377Simp }; 737279377Simp mbox_dsp: mbox_dsp { 738279377Simp ti,mbox-tx = <3 0 0>; 739279377Simp ti,mbox-rx = <2 0 0>; 740279377Simp }; 741279377Simp }; 742279377Simp 743279377Simp timer1: timer@4a318000 { 744279377Simp compatible = "ti,omap3430-timer"; 745279377Simp reg = <0x4a318000 0x80>; 746279377Simp interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 747279377Simp ti,hwmods = "timer1"; 748279377Simp ti,timer-alwon; 749279377Simp }; 750279377Simp 751279377Simp timer2: timer@48032000 { 752279377Simp compatible = "ti,omap3430-timer"; 753279377Simp reg = <0x48032000 0x80>; 754279377Simp interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 755279377Simp ti,hwmods = "timer2"; 756279377Simp }; 757279377Simp 758279377Simp timer3: timer@48034000 { 759279377Simp compatible = "ti,omap4430-timer"; 760279377Simp reg = <0x48034000 0x80>; 761279377Simp interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 762279377Simp ti,hwmods = "timer3"; 763279377Simp }; 764279377Simp 765279377Simp timer4: timer@48036000 { 766279377Simp compatible = "ti,omap4430-timer"; 767279377Simp reg = <0x48036000 0x80>; 768279377Simp interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 769279377Simp ti,hwmods = "timer4"; 770279377Simp }; 771279377Simp 772279377Simp timer5: timer@40138000 { 773279377Simp compatible = "ti,omap4430-timer"; 774279377Simp reg = <0x40138000 0x80>, 775279377Simp <0x49038000 0x80>; 776279377Simp interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 777279377Simp ti,hwmods = "timer5"; 778279377Simp ti,timer-dsp; 779279377Simp }; 780279377Simp 781279377Simp timer6: timer@4013a000 { 782279377Simp compatible = "ti,omap4430-timer"; 783279377Simp reg = <0x4013a000 0x80>, 784279377Simp <0x4903a000 0x80>; 785279377Simp interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 786279377Simp ti,hwmods = "timer6"; 787279377Simp ti,timer-dsp; 788279377Simp }; 789279377Simp 790279377Simp timer7: timer@4013c000 { 791279377Simp compatible = "ti,omap4430-timer"; 792279377Simp reg = <0x4013c000 0x80>, 793279377Simp <0x4903c000 0x80>; 794279377Simp interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 795279377Simp ti,hwmods = "timer7"; 796279377Simp ti,timer-dsp; 797279377Simp }; 798279377Simp 799279377Simp timer8: timer@4013e000 { 800279377Simp compatible = "ti,omap4430-timer"; 801279377Simp reg = <0x4013e000 0x80>, 802279377Simp <0x4903e000 0x80>; 803279377Simp interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 804279377Simp ti,hwmods = "timer8"; 805279377Simp ti,timer-pwm; 806279377Simp ti,timer-dsp; 807279377Simp }; 808279377Simp 809279377Simp timer9: timer@4803e000 { 810279377Simp compatible = "ti,omap4430-timer"; 811279377Simp reg = <0x4803e000 0x80>; 812279377Simp interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 813279377Simp ti,hwmods = "timer9"; 814279377Simp ti,timer-pwm; 815279377Simp }; 816279377Simp 817279377Simp timer10: timer@48086000 { 818279377Simp compatible = "ti,omap3430-timer"; 819279377Simp reg = <0x48086000 0x80>; 820279377Simp interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 821279377Simp ti,hwmods = "timer10"; 822279377Simp ti,timer-pwm; 823279377Simp }; 824279377Simp 825279377Simp timer11: timer@48088000 { 826279377Simp compatible = "ti,omap4430-timer"; 827279377Simp reg = <0x48088000 0x80>; 828279377Simp interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 829279377Simp ti,hwmods = "timer11"; 830279377Simp ti,timer-pwm; 831279377Simp }; 832279377Simp 833279377Simp usbhstll: usbhstll@4a062000 { 834279377Simp compatible = "ti,usbhs-tll"; 835279377Simp reg = <0x4a062000 0x1000>; 836279377Simp interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 837279377Simp ti,hwmods = "usb_tll_hs"; 838279377Simp }; 839279377Simp 840279377Simp usbhshost: usbhshost@4a064000 { 841279377Simp compatible = "ti,usbhs-host"; 842279377Simp reg = <0x4a064000 0x800>; 843279377Simp ti,hwmods = "usb_host_hs"; 844279377Simp #address-cells = <1>; 845279377Simp #size-cells = <1>; 846279377Simp ranges; 847279377Simp clocks = <&init_60m_fclk>, 848279377Simp <&xclk60mhsp1_ck>, 849279377Simp <&xclk60mhsp2_ck>; 850279377Simp clock-names = "refclk_60m_int", 851279377Simp "refclk_60m_ext_p1", 852279377Simp "refclk_60m_ext_p2"; 853279377Simp 854279377Simp usbhsohci: ohci@4a064800 { 855279377Simp compatible = "ti,ohci-omap3"; 856279377Simp reg = <0x4a064800 0x400>; 857279377Simp interrupt-parent = <&gic>; 858279377Simp interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 859279377Simp }; 860279377Simp 861279377Simp usbhsehci: ehci@4a064c00 { 862279377Simp compatible = "ti,ehci-omap"; 863279377Simp reg = <0x4a064c00 0x400>; 864279377Simp interrupt-parent = <&gic>; 865279377Simp interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 866279377Simp }; 867279377Simp }; 868279377Simp 869279377Simp omap_control_usb2phy: control-phy@4a002300 { 870279377Simp compatible = "ti,control-phy-usb2"; 871279377Simp reg = <0x4a002300 0x4>; 872279377Simp reg-names = "power"; 873279377Simp }; 874279377Simp 875279377Simp omap_control_usbotg: control-phy@4a00233c { 876279377Simp compatible = "ti,control-phy-otghs"; 877279377Simp reg = <0x4a00233c 0x4>; 878279377Simp reg-names = "otghs_control"; 879279377Simp }; 880279377Simp 881279377Simp usb_otg_hs: usb_otg_hs@4a0ab000 { 882279377Simp compatible = "ti,omap4-musb"; 883279377Simp reg = <0x4a0ab000 0x7ff>; 884279377Simp interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 885279377Simp interrupt-names = "mc", "dma"; 886279377Simp ti,hwmods = "usb_otg_hs"; 887279377Simp usb-phy = <&usb2_phy>; 888279377Simp phys = <&usb2_phy>; 889279377Simp phy-names = "usb2-phy"; 890279377Simp multipoint = <1>; 891279377Simp num-eps = <16>; 892279377Simp ram-bits = <12>; 893279377Simp ctrl-module = <&omap_control_usbotg>; 894279377Simp }; 895279377Simp 896279377Simp aes: aes@4b501000 { 897279377Simp compatible = "ti,omap4-aes"; 898279377Simp ti,hwmods = "aes"; 899279377Simp reg = <0x4b501000 0xa0>; 900279377Simp interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 901279377Simp dmas = <&sdma 111>, <&sdma 110>; 902279377Simp dma-names = "tx", "rx"; 903279377Simp }; 904279377Simp 905279377Simp des: des@480a5000 { 906279377Simp compatible = "ti,omap4-des"; 907279377Simp ti,hwmods = "des"; 908279377Simp reg = <0x480a5000 0xa0>; 909279377Simp interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 910279377Simp dmas = <&sdma 117>, <&sdma 116>; 911279377Simp dma-names = "tx", "rx"; 912279377Simp }; 913279377Simp 914279377Simp abb_mpu: regulator-abb-mpu { 915279377Simp compatible = "ti,abb-v2"; 916279377Simp regulator-name = "abb_mpu"; 917279377Simp #address-cells = <0>; 918279377Simp #size-cells = <0>; 919279377Simp ti,tranxdone-status-mask = <0x80>; 920279377Simp clocks = <&sys_clkin_ck>; 921279377Simp ti,settling-time = <50>; 922279377Simp ti,clock-cycles = <16>; 923279377Simp 924279377Simp status = "disabled"; 925279377Simp }; 926279377Simp 927279377Simp abb_iva: regulator-abb-iva { 928279377Simp compatible = "ti,abb-v2"; 929279377Simp regulator-name = "abb_iva"; 930279377Simp #address-cells = <0>; 931279377Simp #size-cells = <0>; 932279377Simp ti,tranxdone-status-mask = <0x80000000>; 933279377Simp clocks = <&sys_clkin_ck>; 934279377Simp ti,settling-time = <50>; 935279377Simp ti,clock-cycles = <16>; 936279377Simp 937279377Simp status = "disabled"; 938279377Simp }; 939279377Simp 940279377Simp dss: dss@58000000 { 941279377Simp compatible = "ti,omap4-dss"; 942279377Simp reg = <0x58000000 0x80>; 943279377Simp status = "disabled"; 944279377Simp ti,hwmods = "dss_core"; 945279377Simp clocks = <&dss_dss_clk>; 946279377Simp clock-names = "fck"; 947279377Simp #address-cells = <1>; 948279377Simp #size-cells = <1>; 949279377Simp ranges; 950279377Simp 951279377Simp dispc@58001000 { 952279377Simp compatible = "ti,omap4-dispc"; 953279377Simp reg = <0x58001000 0x1000>; 954279377Simp interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 955279377Simp ti,hwmods = "dss_dispc"; 956279377Simp clocks = <&dss_dss_clk>; 957279377Simp clock-names = "fck"; 958279377Simp }; 959279377Simp 960279377Simp rfbi: encoder@58002000 { 961279377Simp compatible = "ti,omap4-rfbi"; 962279377Simp reg = <0x58002000 0x1000>; 963279377Simp status = "disabled"; 964279377Simp ti,hwmods = "dss_rfbi"; 965279377Simp clocks = <&dss_dss_clk>, <&l3_div_ck>; 966279377Simp clock-names = "fck", "ick"; 967279377Simp }; 968279377Simp 969279377Simp venc: encoder@58003000 { 970279377Simp compatible = "ti,omap4-venc"; 971279377Simp reg = <0x58003000 0x1000>; 972279377Simp status = "disabled"; 973279377Simp ti,hwmods = "dss_venc"; 974279377Simp clocks = <&dss_tv_clk>; 975279377Simp clock-names = "fck"; 976279377Simp }; 977279377Simp 978279377Simp dsi1: encoder@58004000 { 979279377Simp compatible = "ti,omap4-dsi"; 980279377Simp reg = <0x58004000 0x200>, 981279377Simp <0x58004200 0x40>, 982279377Simp <0x58004300 0x20>; 983279377Simp reg-names = "proto", "phy", "pll"; 984279377Simp interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 985279377Simp status = "disabled"; 986279377Simp ti,hwmods = "dss_dsi1"; 987279377Simp clocks = <&dss_dss_clk>, <&dss_sys_clk>; 988279377Simp clock-names = "fck", "sys_clk"; 989279377Simp }; 990279377Simp 991279377Simp dsi2: encoder@58005000 { 992279377Simp compatible = "ti,omap4-dsi"; 993279377Simp reg = <0x58005000 0x200>, 994279377Simp <0x58005200 0x40>, 995279377Simp <0x58005300 0x20>; 996279377Simp reg-names = "proto", "phy", "pll"; 997279377Simp interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 998279377Simp status = "disabled"; 999279377Simp ti,hwmods = "dss_dsi2"; 1000279377Simp clocks = <&dss_dss_clk>, <&dss_sys_clk>; 1001279377Simp clock-names = "fck", "sys_clk"; 1002279377Simp }; 1003279377Simp 1004279377Simp hdmi: encoder@58006000 { 1005279377Simp compatible = "ti,omap4-hdmi"; 1006279377Simp reg = <0x58006000 0x200>, 1007279377Simp <0x58006200 0x100>, 1008279377Simp <0x58006300 0x100>, 1009279377Simp <0x58006400 0x1000>; 1010279377Simp reg-names = "wp", "pll", "phy", "core"; 1011279377Simp interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1012279377Simp status = "disabled"; 1013279377Simp ti,hwmods = "dss_hdmi"; 1014279377Simp clocks = <&dss_48mhz_clk>, <&dss_sys_clk>; 1015279377Simp clock-names = "fck", "sys_clk"; 1016279377Simp dmas = <&sdma 76>; 1017279377Simp dma-names = "audio_tx"; 1018279377Simp }; 1019279377Simp }; 1020279377Simp }; 1021279377Simp}; 1022279377Simp 1023279377Simp/include/ "omap44xx-clocks.dtsi" 1024