1295011Sandrew/*
2295011Sandrew * Copyright (c) 2015 MediaTek Inc.
3295011Sandrew * Author: Mars.C <mars.cheng@mediatek.com>
4295011Sandrew *
5295011Sandrew * This program is free software; you can redistribute it and/or modify
6295011Sandrew * it under the terms of the GNU General Public License version 2 as
7295011Sandrew * published by the Free Software Foundation.
8295011Sandrew *
9295011Sandrew * This program is distributed in the hope that it will be useful,
10295011Sandrew * but WITHOUT ANY WARRANTY; without even the implied warranty of
11295011Sandrew * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12295011Sandrew * GNU General Public License for more details.
13295011Sandrew */
14295011Sandrew
15295011Sandrew#include <dt-bindings/interrupt-controller/irq.h>
16295011Sandrew#include <dt-bindings/interrupt-controller/arm-gic.h>
17295011Sandrew#include "skeleton.dtsi"
18295011Sandrew
19295011Sandrew/ {
20295011Sandrew	compatible = "mediatek,mt6580";
21295011Sandrew	#address-cells = <1>;
22295011Sandrew	#size-cells = <1>;
23295011Sandrew	interrupt-parent = <&sysirq>;
24295011Sandrew
25295011Sandrew	cpus {
26295011Sandrew		#address-cells = <1>;
27295011Sandrew		#size-cells = <0>;
28295011Sandrew
29295011Sandrew		cpu@0 {
30295011Sandrew			device_type = "cpu";
31295011Sandrew			compatible = "arm,cortex-a7";
32295011Sandrew			reg = <0x0>;
33295011Sandrew		};
34295011Sandrew		cpu@1 {
35295011Sandrew			device_type = "cpu";
36295011Sandrew			compatible = "arm,cortex-a7";
37295011Sandrew			reg = <0x1>;
38295011Sandrew		};
39295011Sandrew		cpu@2 {
40295011Sandrew			device_type = "cpu";
41295011Sandrew			compatible = "arm,cortex-a7";
42295011Sandrew			reg = <0x2>;
43295011Sandrew		};
44295011Sandrew		cpu@3 {
45295011Sandrew			device_type = "cpu";
46295011Sandrew			compatible = "arm,cortex-a7";
47295011Sandrew			reg = <0x3>;
48295011Sandrew		};
49295011Sandrew
50295011Sandrew	};
51295011Sandrew
52295011Sandrew	system_clk: dummy13m {
53295011Sandrew		compatible = "fixed-clock";
54295011Sandrew		clock-frequency = <13000000>;
55295011Sandrew		#clock-cells = <0>;
56295011Sandrew	};
57295011Sandrew
58295011Sandrew	rtc_clk: dummy32k {
59295011Sandrew		compatible = "fixed-clock";
60295011Sandrew		clock-frequency = <32000>;
61295011Sandrew		#clock-cells = <0>;
62295011Sandrew	};
63295011Sandrew
64295011Sandrew	uart_clk: dummy26m {
65295011Sandrew		compatible = "fixed-clock";
66295011Sandrew		clock-frequency = <26000000>;
67295011Sandrew		#clock-cells = <0>;
68295011Sandrew	};
69295011Sandrew
70295011Sandrew	timer: timer@10008000 {
71295011Sandrew		compatible = "mediatek,mt6580-timer",
72295011Sandrew			     "mediatek,mt6577-timer";
73295011Sandrew		reg = <0x10008000 0x80>;
74295011Sandrew		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
75295011Sandrew		clocks = <&system_clk>, <&rtc_clk>;
76295011Sandrew		clock-names = "system-clk", "rtc-clk";
77295011Sandrew	};
78295011Sandrew
79295011Sandrew	sysirq: interrupt-controller@10200100 {
80295011Sandrew		compatible = "mediatek,mt6580-sysirq",
81295011Sandrew			     "mediatek,mt6577-sysirq";
82295011Sandrew		interrupt-controller;
83295011Sandrew		#interrupt-cells = <3>;
84295011Sandrew		interrupt-parent = <&gic>;
85295011Sandrew		reg = <0x10200100 0x1c>;
86295011Sandrew	};
87295011Sandrew
88295011Sandrew	gic: interrupt-controller@10211000 {
89295011Sandrew		compatible = "arm,cortex-a7-gic";
90295011Sandrew		interrupt-controller;
91295011Sandrew		#interrupt-cells = <3>;
92295011Sandrew		interrupt-parent = <&gic>;
93295011Sandrew		reg = <0x10211000 0x1000>,
94295011Sandrew		      <0x10212000 0x1000>,
95295011Sandrew		      <0x10214000 0x2000>,
96295011Sandrew		      <0x10216000 0x2000>;
97295011Sandrew	};
98295011Sandrew
99295011Sandrew	uart0: serial@11005000 {
100295011Sandrew		compatible = "mediatek,mt6580-uart",
101295011Sandrew			     "mediatek,mt6577-uart";
102295011Sandrew		reg = <0x11005000 0x400>;
103295011Sandrew		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
104295011Sandrew		clocks = <&uart_clk>;
105295011Sandrew		status = "disabled";
106295011Sandrew	};
107295011Sandrew
108295011Sandrew	uart1: serial@11006000 {
109295011Sandrew		compatible = "mediatek,mt6580-uart",
110295011Sandrew			     "mediatek,mt6577-uart";
111295011Sandrew		reg = <0x11006000 0x400>;
112295011Sandrew		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>;
113295011Sandrew		clocks = <&uart_clk>;
114295011Sandrew		status = "disabled";
115295011Sandrew	};
116295011Sandrew};
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