imx6q-dmo-edmqmx6.dts revision 270866
1270866Simp/* 2270866Simp * Copyright 2013 Data Modul AG 3270866Simp * 4270866Simp * The code contained herein is licensed under the GNU General Public 5270866Simp * License. You may obtain a copy of the GNU General Public License 6270866Simp * Version 2 or later at the following locations: 7270866Simp * 8270866Simp * http://www.opensource.org/licenses/gpl-license.html 9270866Simp * http://www.gnu.org/copyleft/gpl.html 10270866Simp */ 11270866Simp 12270866Simp/dts-v1/; 13270866Simp 14270866Simp#include <dt-bindings/gpio/gpio.h> 15270866Simp#include "imx6q.dtsi" 16270866Simp 17270866Simp/ { 18270866Simp model = "Data Modul eDM-QMX6 Board"; 19270866Simp compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; 20270866Simp 21270866Simp chosen { 22270866Simp stdout-path = &uart2; 23270866Simp }; 24270866Simp 25270866Simp aliases { 26270866Simp gpio7 = &stmpe_gpio1; 27270866Simp gpio8 = &stmpe_gpio2; 28270866Simp stmpe-i2c0 = &stmpe1; 29270866Simp stmpe-i2c1 = &stmpe2; 30270866Simp }; 31270866Simp 32270866Simp memory { 33270866Simp reg = <0x10000000 0x80000000>; 34270866Simp }; 35270866Simp 36270866Simp regulators { 37270866Simp compatible = "simple-bus"; 38270866Simp #address-cells = <1>; 39270866Simp #size-cells = <0>; 40270866Simp 41270866Simp reg_3p3v: regulator@0 { 42270866Simp compatible = "regulator-fixed"; 43270866Simp reg = <0>; 44270866Simp regulator-name = "3P3V"; 45270866Simp regulator-min-microvolt = <3300000>; 46270866Simp regulator-max-microvolt = <3300000>; 47270866Simp regulator-always-on; 48270866Simp }; 49270866Simp 50270866Simp reg_usb_otg_switch: regulator@1 { 51270866Simp compatible = "regulator-fixed"; 52270866Simp reg = <1>; 53270866Simp regulator-name = "usb_otg_switch"; 54270866Simp regulator-min-microvolt = <5000000>; 55270866Simp regulator-max-microvolt = <5000000>; 56270866Simp gpio = <&gpio7 12 0>; 57270866Simp regulator-boot-on; 58270866Simp regulator-always-on; 59270866Simp }; 60270866Simp 61270866Simp reg_usb_host1: regulator@2 { 62270866Simp compatible = "regulator-fixed"; 63270866Simp reg = <2>; 64270866Simp regulator-name = "usb_host1_en"; 65270866Simp regulator-min-microvolt = <3300000>; 66270866Simp regulator-max-microvolt = <3300000>; 67270866Simp gpio = <&gpio3 31 0>; 68270866Simp enable-active-high; 69270866Simp }; 70270866Simp }; 71270866Simp 72270866Simp gpio-leds { 73270866Simp compatible = "gpio-leds"; 74270866Simp 75270866Simp led-blue { 76270866Simp label = "blue"; 77270866Simp gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>; 78270866Simp linux,default-trigger = "heartbeat"; 79270866Simp }; 80270866Simp 81270866Simp led-green { 82270866Simp label = "green"; 83270866Simp gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>; 84270866Simp }; 85270866Simp 86270866Simp led-pink { 87270866Simp label = "pink"; 88270866Simp gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>; 89270866Simp }; 90270866Simp 91270866Simp led-red { 92270866Simp label = "red"; 93270866Simp gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>; 94270866Simp }; 95270866Simp }; 96270866Simp}; 97270866Simp 98270866Simp&can1 { 99270866Simp pinctrl-names = "default"; 100270866Simp pinctrl-0 = <&pinctrl_can1>; 101270866Simp status = "okay"; 102270866Simp}; 103270866Simp 104270866Simp&ecspi5 { 105270866Simp pinctrl-names = "default"; 106270866Simp pinctrl-0 = <&pinctrl_ecspi5>; 107270866Simp fsl,spi-num-chipselects = <1>; 108270866Simp cs-gpios = <&gpio1 12 0>; 109270866Simp status = "okay"; 110270866Simp 111270866Simp flash: m25p80@0 { 112270866Simp compatible = "m25p80"; 113270866Simp spi-max-frequency = <40000000>; 114270866Simp reg = <0>; 115270866Simp }; 116270866Simp}; 117270866Simp 118270866Simp&fec { 119270866Simp pinctrl-names = "default"; 120270866Simp pinctrl-0 = <&pinctrl_enet>; 121270866Simp phy-mode = "rgmii"; 122270866Simp phy-reset-gpios = <&gpio1 25 0>; 123270866Simp phy-supply = <&vgen2_1v2_eth>; 124270866Simp status = "okay"; 125270866Simp}; 126270866Simp 127270866Simp&i2c1 { 128270866Simp clock-frequency = <100000>; 129270866Simp pinctrl-names = "default"; 130270866Simp pinctrl-0 = <&pinctrl_i2c1>; 131270866Simp status = "okay"; 132270866Simp}; 133270866Simp 134270866Simp&i2c2 { 135270866Simp clock-frequency = <100000>; 136270866Simp pinctrl-names = "default"; 137270866Simp pinctrl-0 = <&pinctrl_i2c2 138270866Simp &pinctrl_stmpe1 139270866Simp &pinctrl_stmpe2 140270866Simp &pinctrl_pfuze>; 141270866Simp status = "okay"; 142270866Simp 143270866Simp pmic: pfuze100@08 { 144270866Simp compatible = "fsl,pfuze100"; 145270866Simp reg = <0x08>; 146270866Simp interrupt-parent = <&gpio3>; 147270866Simp interrupts = <20 8>; 148270866Simp 149270866Simp regulators { 150270866Simp sw1a_reg: sw1ab { 151270866Simp regulator-min-microvolt = <300000>; 152270866Simp regulator-max-microvolt = <1875000>; 153270866Simp regulator-boot-on; 154270866Simp regulator-always-on; 155270866Simp }; 156270866Simp 157270866Simp sw1c_reg: sw1c { 158270866Simp regulator-min-microvolt = <300000>; 159270866Simp regulator-max-microvolt = <1875000>; 160270866Simp regulator-boot-on; 161270866Simp regulator-always-on; 162270866Simp }; 163270866Simp 164270866Simp sw2_reg: sw2 { 165270866Simp regulator-min-microvolt = <800000>; 166270866Simp regulator-max-microvolt = <3300000>; 167270866Simp regulator-boot-on; 168270866Simp regulator-always-on; 169270866Simp }; 170270866Simp 171270866Simp sw3a_reg: sw3a { 172270866Simp regulator-min-microvolt = <400000>; 173270866Simp regulator-max-microvolt = <1975000>; 174270866Simp regulator-boot-on; 175270866Simp regulator-always-on; 176270866Simp }; 177270866Simp 178270866Simp sw3b_reg: sw3b { 179270866Simp regulator-min-microvolt = <400000>; 180270866Simp regulator-max-microvolt = <1975000>; 181270866Simp regulator-boot-on; 182270866Simp regulator-always-on; 183270866Simp }; 184270866Simp 185270866Simp sw4_reg: sw4 { 186270866Simp regulator-min-microvolt = <400000>; 187270866Simp regulator-max-microvolt = <1975000>; 188270866Simp regulator-always-on; 189270866Simp }; 190270866Simp 191270866Simp swbst_reg: swbst { 192270866Simp regulator-min-microvolt = <5000000>; 193270866Simp regulator-max-microvolt = <5150000>; 194270866Simp regulator-always-on; 195270866Simp }; 196270866Simp 197270866Simp snvs_reg: vsnvs { 198270866Simp regulator-min-microvolt = <1000000>; 199270866Simp regulator-max-microvolt = <3000000>; 200270866Simp regulator-boot-on; 201270866Simp regulator-always-on; 202270866Simp }; 203270866Simp 204270866Simp vref_reg: vrefddr { 205270866Simp regulator-boot-on; 206270866Simp regulator-always-on; 207270866Simp }; 208270866Simp 209270866Simp vgen1_reg: vgen1 { 210270866Simp regulator-min-microvolt = <800000>; 211270866Simp regulator-max-microvolt = <1550000>; 212270866Simp }; 213270866Simp 214270866Simp vgen2_1v2_eth: vgen2 { 215270866Simp regulator-min-microvolt = <800000>; 216270866Simp regulator-max-microvolt = <1550000>; 217270866Simp }; 218270866Simp 219270866Simp vdd_high_in: vgen3 { 220270866Simp regulator-min-microvolt = <1800000>; 221270866Simp regulator-max-microvolt = <3300000>; 222270866Simp regulator-boot-on; 223270866Simp regulator-always-on; 224270866Simp }; 225270866Simp 226270866Simp vgen4_reg: vgen4 { 227270866Simp regulator-min-microvolt = <1800000>; 228270866Simp regulator-max-microvolt = <3300000>; 229270866Simp regulator-always-on; 230270866Simp }; 231270866Simp 232270866Simp vgen5_reg: vgen5 { 233270866Simp regulator-min-microvolt = <1800000>; 234270866Simp regulator-max-microvolt = <3300000>; 235270866Simp regulator-always-on; 236270866Simp }; 237270866Simp 238270866Simp vgen6_reg: vgen6 { 239270866Simp regulator-min-microvolt = <1800000>; 240270866Simp regulator-max-microvolt = <3300000>; 241270866Simp regulator-always-on; 242270866Simp }; 243270866Simp }; 244270866Simp }; 245270866Simp 246270866Simp stmpe1: stmpe1601@40 { 247270866Simp compatible = "st,stmpe1601"; 248270866Simp reg = <0x40>; 249270866Simp interrupts = <30 0>; 250270866Simp interrupt-parent = <&gpio3>; 251270866Simp vcc-supply = <&sw2_reg>; 252270866Simp vio-supply = <&sw2_reg>; 253270866Simp 254270866Simp stmpe_gpio1: stmpe_gpio { 255270866Simp #gpio-cells = <2>; 256270866Simp compatible = "st,stmpe-gpio"; 257270866Simp }; 258270866Simp }; 259270866Simp 260270866Simp stmpe2: stmpe1601@44 { 261270866Simp compatible = "st,stmpe1601"; 262270866Simp reg = <0x44>; 263270866Simp interrupts = <2 0>; 264270866Simp interrupt-parent = <&gpio5>; 265270866Simp vcc-supply = <&sw2_reg>; 266270866Simp vio-supply = <&sw2_reg>; 267270866Simp 268270866Simp stmpe_gpio2: stmpe_gpio { 269270866Simp #gpio-cells = <2>; 270270866Simp compatible = "st,stmpe-gpio"; 271270866Simp }; 272270866Simp }; 273270866Simp 274270866Simp temp1: ad7414@4c { 275270866Simp compatible = "ad,ad7414"; 276270866Simp reg = <0x4c>; 277270866Simp }; 278270866Simp 279270866Simp temp2: ad7414@4d { 280270866Simp compatible = "ad,ad7414"; 281270866Simp reg = <0x4d>; 282270866Simp }; 283270866Simp 284270866Simp rtc: m41t62@68 { 285270866Simp compatible = "stm,m41t62"; 286270866Simp reg = <0x68>; 287270866Simp }; 288270866Simp}; 289270866Simp 290270866Simp&i2c3 { 291270866Simp clock-frequency = <100000>; 292270866Simp pinctrl-names = "default"; 293270866Simp pinctrl-0 = <&pinctrl_i2c3>; 294270866Simp status = "okay"; 295270866Simp}; 296270866Simp 297270866Simp&iomuxc { 298270866Simp pinctrl-names = "default"; 299270866Simp pinctrl-0 = <&pinctrl_hog>; 300270866Simp 301270866Simp imx6q-dmo-edmqmx6 { 302270866Simp pinctrl_hog: hoggrp { 303270866Simp fsl,pins = < 304270866Simp MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000 305270866Simp MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000 306270866Simp >; 307270866Simp }; 308270866Simp 309270866Simp pinctrl_can1: can1grp { 310270866Simp fsl,pins = < 311270866Simp MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 312270866Simp MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 313270866Simp >; 314270866Simp }; 315270866Simp 316270866Simp pinctrl_ecspi5: ecspi5rp-1 { 317270866Simp fsl,pins = < 318270866Simp MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000 319270866Simp MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000 320270866Simp MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000 321270866Simp MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000 322270866Simp >; 323270866Simp }; 324270866Simp 325270866Simp pinctrl_enet: enetgrp { 326270866Simp fsl,pins = < 327270866Simp MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 328270866Simp MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 329270866Simp MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 330270866Simp MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 331270866Simp MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 332270866Simp MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 333270866Simp MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 334270866Simp MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 335270866Simp MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 336270866Simp MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 337270866Simp MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 338270866Simp MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 339270866Simp MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 340270866Simp MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 341270866Simp MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 342270866Simp MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 343270866Simp MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 344270866Simp >; 345270866Simp }; 346270866Simp 347270866Simp pinctrl_i2c1: i2c1grp { 348270866Simp fsl,pins = < 349270866Simp MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 350270866Simp MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 351270866Simp >; 352270866Simp }; 353270866Simp 354270866Simp pinctrl_i2c2: i2c2grp { 355270866Simp fsl,pins = < 356270866Simp MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 357270866Simp MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 358270866Simp >; 359270866Simp }; 360270866Simp 361270866Simp pinctrl_i2c3: i2c3grp { 362270866Simp fsl,pins = < 363270866Simp MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 364270866Simp MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 365270866Simp >; 366270866Simp }; 367270866Simp 368270866Simp pinctrl_pcie: pciegrp { 369270866Simp fsl,pins = < 370270866Simp MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1 371270866Simp >; 372270866Simp }; 373270866Simp 374270866Simp pinctrl_pfuze: pfuze100grp1 { 375270866Simp fsl,pins = < 376270866Simp MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 377270866Simp >; 378270866Simp }; 379270866Simp 380270866Simp pinctrl_stmpe1: stmpe1grp { 381270866Simp fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; 382270866Simp }; 383270866Simp 384270866Simp pinctrl_stmpe2: stmpe2grp { 385270866Simp fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>; 386270866Simp }; 387270866Simp 388270866Simp pinctrl_uart1: uart1grp { 389270866Simp fsl,pins = < 390270866Simp MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 391270866Simp MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 392270866Simp >; 393270866Simp }; 394270866Simp 395270866Simp pinctrl_uart2: uart2grp { 396270866Simp fsl,pins = < 397270866Simp MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 398270866Simp MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 399270866Simp >; 400270866Simp }; 401270866Simp 402270866Simp pinctrl_usbotg: usbotggrp { 403270866Simp fsl,pins = < 404270866Simp MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 405270866Simp >; 406270866Simp }; 407270866Simp 408270866Simp pinctrl_usdhc3: usdhc3grp { 409270866Simp fsl,pins = < 410270866Simp MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 411270866Simp MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 412270866Simp MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 413270866Simp MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 414270866Simp MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 415270866Simp MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 416270866Simp >; 417270866Simp }; 418270866Simp 419270866Simp pinctrl_usdhc4: usdhc4grp { 420270866Simp fsl,pins = < 421270866Simp MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 422270866Simp MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 423270866Simp MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 424270866Simp MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 425270866Simp MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 426270866Simp MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 427270866Simp MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 428270866Simp MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 429270866Simp MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 430270866Simp MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 431270866Simp >; 432270866Simp }; 433270866Simp }; 434270866Simp}; 435270866Simp 436270866Simp&pcie { 437270866Simp pinctrl-names = "default"; 438270866Simp pinctrl-0 = <&pinctrl_pcie>; 439270866Simp reset-gpio = <&gpio4 8 0>; 440270866Simp status = "okay"; 441270866Simp}; 442270866Simp 443270866Simp&sata { 444270866Simp status = "okay"; 445270866Simp}; 446270866Simp 447270866Simp&uart1 { 448270866Simp pinctrl-names = "default"; 449270866Simp pinctrl-0 = <&pinctrl_uart1>; 450270866Simp status = "okay"; 451270866Simp}; 452270866Simp 453270866Simp&uart2 { 454270866Simp pinctrl-names = "default"; 455270866Simp pinctrl-0 = <&pinctrl_uart2>; 456270866Simp status = "okay"; 457270866Simp}; 458270866Simp 459270866Simp&usbh1 { 460270866Simp vbus-supply = <®_usb_host1>; 461270866Simp disable-over-current; 462270866Simp dr_mode = "host"; 463270866Simp status = "okay"; 464270866Simp}; 465270866Simp 466270866Simp&usbotg { 467270866Simp pinctrl-names = "default"; 468270866Simp pinctrl-0 = <&pinctrl_usbotg>; 469270866Simp disable-over-current; 470270866Simp status = "okay"; 471270866Simp}; 472270866Simp 473270866Simp&usdhc3 { 474270866Simp pinctrl-names = "default"; 475270866Simp pinctrl-0 = <&pinctrl_usdhc3>; 476270866Simp vmmc-supply = <®_3p3v>; 477270866Simp status = "okay"; 478270866Simp}; 479270866Simp 480270866Simp&usdhc4 { 481270866Simp pinctrl-names = "default"; 482270866Simp pinctrl-0 = <&pinctrl_usdhc4>; 483270866Simp vmmc-supply = <®_3p3v>; 484270866Simp non-removable; 485270866Simp bus-width = <8>; 486270866Simp status = "okay"; 487270866Simp}; 488