1262569Simp/* 2262569Simp * Copyright 2011 Freescale Semiconductor, Inc. 3262569Simp * Copyright 2011 Linaro Ltd. 4262569Simp * 5262569Simp * The code contained herein is licensed under the GNU General Public 6262569Simp * License. You may obtain a copy of the GNU General Public License 7262569Simp * Version 2 or later at the following locations: 8262569Simp * 9262569Simp * http://www.opensource.org/licenses/gpl-license.html 10262569Simp * http://www.gnu.org/copyleft/gpl.html 11262569Simp */ 12262569Simp 13262569Simp#include "skeleton.dtsi" 14262569Simp#include "imx53-pinfunc.h" 15270864Simp#include <dt-bindings/clock/imx5-clock.h> 16270864Simp#include <dt-bindings/gpio/gpio.h> 17270864Simp#include <dt-bindings/input/input.h> 18295436Sandrew#include <dt-bindings/interrupt-controller/irq.h> 19262569Simp 20262569Simp/ { 21262569Simp aliases { 22270864Simp ethernet0 = &fec; 23262569Simp gpio0 = &gpio1; 24262569Simp gpio1 = &gpio2; 25262569Simp gpio2 = &gpio3; 26262569Simp gpio3 = &gpio4; 27262569Simp gpio4 = &gpio5; 28262569Simp gpio5 = &gpio6; 29262569Simp gpio6 = &gpio7; 30262569Simp i2c0 = &i2c1; 31262569Simp i2c1 = &i2c2; 32262569Simp i2c2 = &i2c3; 33270864Simp mmc0 = &esdhc1; 34270864Simp mmc1 = &esdhc2; 35270864Simp mmc2 = &esdhc3; 36270864Simp mmc3 = &esdhc4; 37262569Simp serial0 = &uart1; 38262569Simp serial1 = &uart2; 39262569Simp serial2 = &uart3; 40262569Simp serial3 = &uart4; 41262569Simp serial4 = &uart5; 42262569Simp spi0 = &ecspi1; 43262569Simp spi1 = &ecspi2; 44262569Simp spi2 = &cspi; 45262569Simp }; 46262569Simp 47262569Simp cpus { 48262569Simp #address-cells = <1>; 49262569Simp #size-cells = <0>; 50279385Simp cpu0: cpu@0 { 51262569Simp device_type = "cpu"; 52262569Simp compatible = "arm,cortex-a8"; 53262569Simp reg = <0x0>; 54279385Simp clocks = <&clks IMX5_CLK_ARM>; 55279385Simp clock-latency = <61036>; 56279385Simp voltage-tolerance = <5>; 57279385Simp operating-points = < 58279385Simp /* kHz */ 59279385Simp 166666 850000 60279385Simp 400000 900000 61279385Simp 800000 1050000 62279385Simp 1000000 1200000 63279385Simp 1200000 1300000 64279385Simp >; 65262569Simp }; 66262569Simp }; 67262569Simp 68270864Simp display-subsystem { 69270864Simp compatible = "fsl,imx-display-subsystem"; 70270864Simp ports = <&ipu_di0>, <&ipu_di1>; 71270864Simp }; 72270864Simp 73262569Simp tzic: tz-interrupt-controller@0fffc000 { 74262569Simp compatible = "fsl,imx53-tzic", "fsl,tzic"; 75262569Simp interrupt-controller; 76262569Simp #interrupt-cells = <1>; 77262569Simp reg = <0x0fffc000 0x4000>; 78262569Simp }; 79262569Simp 80262569Simp clocks { 81262569Simp #address-cells = <1>; 82262569Simp #size-cells = <0>; 83262569Simp 84262569Simp ckil { 85262569Simp compatible = "fsl,imx-ckil", "fixed-clock"; 86270864Simp #clock-cells = <0>; 87262569Simp clock-frequency = <32768>; 88262569Simp }; 89262569Simp 90262569Simp ckih1 { 91262569Simp compatible = "fsl,imx-ckih1", "fixed-clock"; 92270864Simp #clock-cells = <0>; 93262569Simp clock-frequency = <22579200>; 94262569Simp }; 95262569Simp 96262569Simp ckih2 { 97262569Simp compatible = "fsl,imx-ckih2", "fixed-clock"; 98270864Simp #clock-cells = <0>; 99262569Simp clock-frequency = <0>; 100262569Simp }; 101262569Simp 102262569Simp osc { 103262569Simp compatible = "fsl,imx-osc", "fixed-clock"; 104270864Simp #clock-cells = <0>; 105262569Simp clock-frequency = <24000000>; 106262569Simp }; 107262569Simp }; 108262569Simp 109262569Simp soc { 110262569Simp #address-cells = <1>; 111262569Simp #size-cells = <1>; 112262569Simp compatible = "simple-bus"; 113262569Simp interrupt-parent = <&tzic>; 114262569Simp ranges; 115262569Simp 116270864Simp sata: sata@10000000 { 117270864Simp compatible = "fsl,imx53-ahci"; 118270864Simp reg = <0x10000000 0x1000>; 119270864Simp interrupts = <28>; 120270864Simp clocks = <&clks IMX5_CLK_SATA_GATE>, 121270864Simp <&clks IMX5_CLK_SATA_REF>, 122270864Simp <&clks IMX5_CLK_AHB>; 123270864Simp clock-names = "sata", "sata_ref", "ahb"; 124270864Simp status = "disabled"; 125270864Simp }; 126270864Simp 127262569Simp ipu: ipu@18000000 { 128270864Simp #address-cells = <1>; 129270864Simp #size-cells = <0>; 130262569Simp compatible = "fsl,imx53-ipu"; 131270864Simp reg = <0x18000000 0x08000000>; 132262569Simp interrupts = <11 10>; 133270864Simp clocks = <&clks IMX5_CLK_IPU_GATE>, 134270864Simp <&clks IMX5_CLK_IPU_DI0_GATE>, 135270864Simp <&clks IMX5_CLK_IPU_DI1_GATE>; 136262569Simp clock-names = "bus", "di0", "di1"; 137262569Simp resets = <&src 2>; 138270864Simp 139270864Simp ipu_di0: port@2 { 140270864Simp #address-cells = <1>; 141270864Simp #size-cells = <0>; 142270864Simp reg = <2>; 143270864Simp 144270864Simp ipu_di0_disp0: endpoint@0 { 145270864Simp reg = <0>; 146270864Simp }; 147270864Simp 148270864Simp ipu_di0_lvds0: endpoint@1 { 149270864Simp reg = <1>; 150270864Simp remote-endpoint = <&lvds0_in>; 151270864Simp }; 152270864Simp }; 153270864Simp 154270864Simp ipu_di1: port@3 { 155270864Simp #address-cells = <1>; 156270864Simp #size-cells = <0>; 157270864Simp reg = <3>; 158270864Simp 159270864Simp ipu_di1_disp1: endpoint@0 { 160270864Simp reg = <0>; 161270864Simp }; 162270864Simp 163270864Simp ipu_di1_lvds1: endpoint@1 { 164270864Simp reg = <1>; 165270864Simp remote-endpoint = <&lvds1_in>; 166270864Simp }; 167270864Simp 168270864Simp ipu_di1_tve: endpoint@2 { 169270864Simp reg = <2>; 170270864Simp remote-endpoint = <&tve_in>; 171270864Simp }; 172270864Simp }; 173262569Simp }; 174262569Simp 175262569Simp aips@50000000 { /* AIPS1 */ 176262569Simp compatible = "fsl,aips-bus", "simple-bus"; 177262569Simp #address-cells = <1>; 178262569Simp #size-cells = <1>; 179262569Simp reg = <0x50000000 0x10000000>; 180262569Simp ranges; 181262569Simp 182262569Simp spba@50000000 { 183262569Simp compatible = "fsl,spba-bus", "simple-bus"; 184262569Simp #address-cells = <1>; 185262569Simp #size-cells = <1>; 186262569Simp reg = <0x50000000 0x40000>; 187262569Simp ranges; 188262569Simp 189262569Simp esdhc1: esdhc@50004000 { 190262569Simp compatible = "fsl,imx53-esdhc"; 191262569Simp reg = <0x50004000 0x4000>; 192262569Simp interrupts = <1>; 193270864Simp clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, 194270864Simp <&clks IMX5_CLK_DUMMY>, 195270864Simp <&clks IMX5_CLK_ESDHC1_PER_GATE>; 196262569Simp clock-names = "ipg", "ahb", "per"; 197262569Simp bus-width = <4>; 198262569Simp status = "disabled"; 199262569Simp }; 200262569Simp 201262569Simp esdhc2: esdhc@50008000 { 202262569Simp compatible = "fsl,imx53-esdhc"; 203262569Simp reg = <0x50008000 0x4000>; 204262569Simp interrupts = <2>; 205270864Simp clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, 206270864Simp <&clks IMX5_CLK_DUMMY>, 207270864Simp <&clks IMX5_CLK_ESDHC2_PER_GATE>; 208262569Simp clock-names = "ipg", "ahb", "per"; 209262569Simp bus-width = <4>; 210262569Simp status = "disabled"; 211262569Simp }; 212262569Simp 213262569Simp uart3: serial@5000c000 { 214262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 215262569Simp reg = <0x5000c000 0x4000>; 216262569Simp interrupts = <33>; 217270864Simp clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, 218270864Simp <&clks IMX5_CLK_UART3_PER_GATE>; 219262569Simp clock-names = "ipg", "per"; 220262569Simp status = "disabled"; 221262569Simp }; 222262569Simp 223262569Simp ecspi1: ecspi@50010000 { 224262569Simp #address-cells = <1>; 225262569Simp #size-cells = <0>; 226262569Simp compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 227262569Simp reg = <0x50010000 0x4000>; 228262569Simp interrupts = <36>; 229270864Simp clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, 230270864Simp <&clks IMX5_CLK_ECSPI1_PER_GATE>; 231262569Simp clock-names = "ipg", "per"; 232262569Simp status = "disabled"; 233262569Simp }; 234262569Simp 235262569Simp ssi2: ssi@50014000 { 236279385Simp #sound-dai-cells = <0>; 237270864Simp compatible = "fsl,imx53-ssi", 238270864Simp "fsl,imx51-ssi", 239270864Simp "fsl,imx21-ssi"; 240262569Simp reg = <0x50014000 0x4000>; 241262569Simp interrupts = <30>; 242279385Simp clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>, 243279385Simp <&clks IMX5_CLK_SSI2_ROOT_GATE>; 244279385Simp clock-names = "ipg", "baud"; 245262569Simp dmas = <&sdma 24 1 0>, 246262569Simp <&sdma 25 1 0>; 247262569Simp dma-names = "rx", "tx"; 248262569Simp fsl,fifo-depth = <15>; 249262569Simp status = "disabled"; 250262569Simp }; 251262569Simp 252262569Simp esdhc3: esdhc@50020000 { 253262569Simp compatible = "fsl,imx53-esdhc"; 254262569Simp reg = <0x50020000 0x4000>; 255262569Simp interrupts = <3>; 256270864Simp clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, 257270864Simp <&clks IMX5_CLK_DUMMY>, 258270864Simp <&clks IMX5_CLK_ESDHC3_PER_GATE>; 259262569Simp clock-names = "ipg", "ahb", "per"; 260262569Simp bus-width = <4>; 261262569Simp status = "disabled"; 262262569Simp }; 263262569Simp 264262569Simp esdhc4: esdhc@50024000 { 265262569Simp compatible = "fsl,imx53-esdhc"; 266262569Simp reg = <0x50024000 0x4000>; 267262569Simp interrupts = <4>; 268270864Simp clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, 269270864Simp <&clks IMX5_CLK_DUMMY>, 270270864Simp <&clks IMX5_CLK_ESDHC4_PER_GATE>; 271262569Simp clock-names = "ipg", "ahb", "per"; 272262569Simp bus-width = <4>; 273262569Simp status = "disabled"; 274262569Simp }; 275262569Simp }; 276262569Simp 277270864Simp aipstz1: bridge@53f00000 { 278270864Simp compatible = "fsl,imx53-aipstz"; 279270864Simp reg = <0x53f00000 0x60>; 280270864Simp }; 281270864Simp 282262569Simp usbphy0: usbphy@0 { 283262569Simp compatible = "usb-nop-xceiv"; 284270864Simp clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; 285262569Simp clock-names = "main_clk"; 286262569Simp status = "okay"; 287262569Simp }; 288262569Simp 289262569Simp usbphy1: usbphy@1 { 290262569Simp compatible = "usb-nop-xceiv"; 291270864Simp clocks = <&clks IMX5_CLK_USB_PHY2_GATE>; 292262569Simp clock-names = "main_clk"; 293262569Simp status = "okay"; 294262569Simp }; 295262569Simp 296262569Simp usbotg: usb@53f80000 { 297262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 298262569Simp reg = <0x53f80000 0x0200>; 299262569Simp interrupts = <18>; 300270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 301262569Simp fsl,usbmisc = <&usbmisc 0>; 302262569Simp fsl,usbphy = <&usbphy0>; 303262569Simp status = "disabled"; 304262569Simp }; 305262569Simp 306262569Simp usbh1: usb@53f80200 { 307262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 308262569Simp reg = <0x53f80200 0x0200>; 309262569Simp interrupts = <14>; 310270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 311262569Simp fsl,usbmisc = <&usbmisc 1>; 312262569Simp fsl,usbphy = <&usbphy1>; 313295436Sandrew dr_mode = "host"; 314262569Simp status = "disabled"; 315262569Simp }; 316262569Simp 317262569Simp usbh2: usb@53f80400 { 318262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 319262569Simp reg = <0x53f80400 0x0200>; 320262569Simp interrupts = <16>; 321270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 322262569Simp fsl,usbmisc = <&usbmisc 2>; 323295436Sandrew dr_mode = "host"; 324262569Simp status = "disabled"; 325262569Simp }; 326262569Simp 327262569Simp usbh3: usb@53f80600 { 328262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 329262569Simp reg = <0x53f80600 0x0200>; 330262569Simp interrupts = <17>; 331270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 332262569Simp fsl,usbmisc = <&usbmisc 3>; 333295436Sandrew dr_mode = "host"; 334262569Simp status = "disabled"; 335262569Simp }; 336262569Simp 337262569Simp usbmisc: usbmisc@53f80800 { 338262569Simp #index-cells = <1>; 339262569Simp compatible = "fsl,imx53-usbmisc"; 340262569Simp reg = <0x53f80800 0x200>; 341270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 342262569Simp }; 343262569Simp 344262569Simp gpio1: gpio@53f84000 { 345262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 346262569Simp reg = <0x53f84000 0x4000>; 347262569Simp interrupts = <50 51>; 348262569Simp gpio-controller; 349262569Simp #gpio-cells = <2>; 350262569Simp interrupt-controller; 351262569Simp #interrupt-cells = <2>; 352262569Simp }; 353262569Simp 354262569Simp gpio2: gpio@53f88000 { 355262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 356262569Simp reg = <0x53f88000 0x4000>; 357262569Simp interrupts = <52 53>; 358262569Simp gpio-controller; 359262569Simp #gpio-cells = <2>; 360262569Simp interrupt-controller; 361262569Simp #interrupt-cells = <2>; 362262569Simp }; 363262569Simp 364262569Simp gpio3: gpio@53f8c000 { 365262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 366262569Simp reg = <0x53f8c000 0x4000>; 367262569Simp interrupts = <54 55>; 368262569Simp gpio-controller; 369262569Simp #gpio-cells = <2>; 370262569Simp interrupt-controller; 371262569Simp #interrupt-cells = <2>; 372262569Simp }; 373262569Simp 374262569Simp gpio4: gpio@53f90000 { 375262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 376262569Simp reg = <0x53f90000 0x4000>; 377262569Simp interrupts = <56 57>; 378262569Simp gpio-controller; 379262569Simp #gpio-cells = <2>; 380262569Simp interrupt-controller; 381262569Simp #interrupt-cells = <2>; 382262569Simp }; 383262569Simp 384270864Simp kpp: kpp@53f94000 { 385270864Simp compatible = "fsl,imx53-kpp", "fsl,imx21-kpp"; 386270864Simp reg = <0x53f94000 0x4000>; 387270864Simp interrupts = <60>; 388270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 389270864Simp status = "disabled"; 390270864Simp }; 391270864Simp 392262569Simp wdog1: wdog@53f98000 { 393262569Simp compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 394262569Simp reg = <0x53f98000 0x4000>; 395262569Simp interrupts = <58>; 396270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 397262569Simp }; 398262569Simp 399262569Simp wdog2: wdog@53f9c000 { 400262569Simp compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 401262569Simp reg = <0x53f9c000 0x4000>; 402262569Simp interrupts = <59>; 403270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 404262569Simp status = "disabled"; 405262569Simp }; 406262569Simp 407262569Simp gpt: timer@53fa0000 { 408262569Simp compatible = "fsl,imx53-gpt", "fsl,imx31-gpt"; 409262569Simp reg = <0x53fa0000 0x4000>; 410262569Simp interrupts = <39>; 411270864Simp clocks = <&clks IMX5_CLK_GPT_IPG_GATE>, 412270864Simp <&clks IMX5_CLK_GPT_HF_GATE>; 413262569Simp clock-names = "ipg", "per"; 414262569Simp }; 415262569Simp 416262569Simp iomuxc: iomuxc@53fa8000 { 417262569Simp compatible = "fsl,imx53-iomuxc"; 418262569Simp reg = <0x53fa8000 0x4000>; 419262569Simp }; 420262569Simp 421262569Simp gpr: iomuxc-gpr@53fa8000 { 422262569Simp compatible = "fsl,imx53-iomuxc-gpr", "syscon"; 423262569Simp reg = <0x53fa8000 0xc>; 424262569Simp }; 425262569Simp 426262569Simp ldb: ldb@53fa8008 { 427262569Simp #address-cells = <1>; 428262569Simp #size-cells = <0>; 429262569Simp compatible = "fsl,imx53-ldb"; 430262569Simp reg = <0x53fa8008 0x4>; 431262569Simp gpr = <&gpr>; 432270864Simp clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, 433270864Simp <&clks IMX5_CLK_LDB_DI1_SEL>, 434270864Simp <&clks IMX5_CLK_IPU_DI0_SEL>, 435270864Simp <&clks IMX5_CLK_IPU_DI1_SEL>, 436270864Simp <&clks IMX5_CLK_LDB_DI0_GATE>, 437270864Simp <&clks IMX5_CLK_LDB_DI1_GATE>; 438262569Simp clock-names = "di0_pll", "di1_pll", 439262569Simp "di0_sel", "di1_sel", 440262569Simp "di0", "di1"; 441262569Simp status = "disabled"; 442262569Simp 443262569Simp lvds-channel@0 { 444279385Simp #address-cells = <1>; 445279385Simp #size-cells = <0>; 446262569Simp reg = <0>; 447262569Simp status = "disabled"; 448270864Simp 449279385Simp port@0 { 450279385Simp reg = <0>; 451279385Simp 452270864Simp lvds0_in: endpoint { 453270864Simp remote-endpoint = <&ipu_di0_lvds0>; 454270864Simp }; 455270864Simp }; 456262569Simp }; 457262569Simp 458262569Simp lvds-channel@1 { 459279385Simp #address-cells = <1>; 460279385Simp #size-cells = <0>; 461262569Simp reg = <1>; 462262569Simp status = "disabled"; 463270864Simp 464279385Simp port@1 { 465279385Simp reg = <1>; 466279385Simp 467270864Simp lvds1_in: endpoint { 468270864Simp remote-endpoint = <&ipu_di1_lvds1>; 469270864Simp }; 470270864Simp }; 471262569Simp }; 472262569Simp }; 473262569Simp 474262569Simp pwm1: pwm@53fb4000 { 475262569Simp #pwm-cells = <2>; 476262569Simp compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; 477262569Simp reg = <0x53fb4000 0x4000>; 478270864Simp clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, 479270864Simp <&clks IMX5_CLK_PWM1_HF_GATE>; 480262569Simp clock-names = "ipg", "per"; 481262569Simp interrupts = <61>; 482262569Simp }; 483262569Simp 484262569Simp pwm2: pwm@53fb8000 { 485262569Simp #pwm-cells = <2>; 486262569Simp compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; 487262569Simp reg = <0x53fb8000 0x4000>; 488270864Simp clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, 489270864Simp <&clks IMX5_CLK_PWM2_HF_GATE>; 490262569Simp clock-names = "ipg", "per"; 491262569Simp interrupts = <94>; 492262569Simp }; 493262569Simp 494262569Simp uart1: serial@53fbc000 { 495262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 496262569Simp reg = <0x53fbc000 0x4000>; 497262569Simp interrupts = <31>; 498270864Simp clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, 499270864Simp <&clks IMX5_CLK_UART1_PER_GATE>; 500262569Simp clock-names = "ipg", "per"; 501262569Simp status = "disabled"; 502262569Simp }; 503262569Simp 504262569Simp uart2: serial@53fc0000 { 505262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 506262569Simp reg = <0x53fc0000 0x4000>; 507262569Simp interrupts = <32>; 508270864Simp clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, 509270864Simp <&clks IMX5_CLK_UART2_PER_GATE>; 510262569Simp clock-names = "ipg", "per"; 511262569Simp status = "disabled"; 512262569Simp }; 513262569Simp 514262569Simp can1: can@53fc8000 { 515262569Simp compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 516262569Simp reg = <0x53fc8000 0x4000>; 517262569Simp interrupts = <82>; 518270864Simp clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, 519270864Simp <&clks IMX5_CLK_CAN1_SERIAL_GATE>; 520262569Simp clock-names = "ipg", "per"; 521262569Simp status = "disabled"; 522262569Simp }; 523262569Simp 524262569Simp can2: can@53fcc000 { 525262569Simp compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 526262569Simp reg = <0x53fcc000 0x4000>; 527262569Simp interrupts = <83>; 528270864Simp clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>, 529270864Simp <&clks IMX5_CLK_CAN2_SERIAL_GATE>; 530262569Simp clock-names = "ipg", "per"; 531262569Simp status = "disabled"; 532262569Simp }; 533262569Simp 534262569Simp src: src@53fd0000 { 535262569Simp compatible = "fsl,imx53-src", "fsl,imx51-src"; 536262569Simp reg = <0x53fd0000 0x4000>; 537262569Simp #reset-cells = <1>; 538262569Simp }; 539262569Simp 540262569Simp clks: ccm@53fd4000{ 541262569Simp compatible = "fsl,imx53-ccm"; 542262569Simp reg = <0x53fd4000 0x4000>; 543262569Simp interrupts = <0 71 0x04 0 72 0x04>; 544262569Simp #clock-cells = <1>; 545262569Simp }; 546262569Simp 547262569Simp gpio5: gpio@53fdc000 { 548262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 549262569Simp reg = <0x53fdc000 0x4000>; 550262569Simp interrupts = <103 104>; 551262569Simp gpio-controller; 552262569Simp #gpio-cells = <2>; 553262569Simp interrupt-controller; 554262569Simp #interrupt-cells = <2>; 555262569Simp }; 556262569Simp 557262569Simp gpio6: gpio@53fe0000 { 558262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 559262569Simp reg = <0x53fe0000 0x4000>; 560262569Simp interrupts = <105 106>; 561262569Simp gpio-controller; 562262569Simp #gpio-cells = <2>; 563262569Simp interrupt-controller; 564262569Simp #interrupt-cells = <2>; 565262569Simp }; 566262569Simp 567262569Simp gpio7: gpio@53fe4000 { 568262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 569262569Simp reg = <0x53fe4000 0x4000>; 570262569Simp interrupts = <107 108>; 571262569Simp gpio-controller; 572262569Simp #gpio-cells = <2>; 573262569Simp interrupt-controller; 574262569Simp #interrupt-cells = <2>; 575262569Simp }; 576262569Simp 577262569Simp i2c3: i2c@53fec000 { 578262569Simp #address-cells = <1>; 579262569Simp #size-cells = <0>; 580262569Simp compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 581262569Simp reg = <0x53fec000 0x4000>; 582262569Simp interrupts = <64>; 583270864Simp clocks = <&clks IMX5_CLK_I2C3_GATE>; 584262569Simp status = "disabled"; 585262569Simp }; 586262569Simp 587262569Simp uart4: serial@53ff0000 { 588262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 589262569Simp reg = <0x53ff0000 0x4000>; 590262569Simp interrupts = <13>; 591270864Simp clocks = <&clks IMX5_CLK_UART4_IPG_GATE>, 592270864Simp <&clks IMX5_CLK_UART4_PER_GATE>; 593262569Simp clock-names = "ipg", "per"; 594262569Simp status = "disabled"; 595262569Simp }; 596262569Simp }; 597262569Simp 598262569Simp aips@60000000 { /* AIPS2 */ 599262569Simp compatible = "fsl,aips-bus", "simple-bus"; 600262569Simp #address-cells = <1>; 601262569Simp #size-cells = <1>; 602262569Simp reg = <0x60000000 0x10000000>; 603262569Simp ranges; 604262569Simp 605270864Simp aipstz2: bridge@63f00000 { 606270864Simp compatible = "fsl,imx53-aipstz"; 607270864Simp reg = <0x63f00000 0x60>; 608270864Simp }; 609270864Simp 610262569Simp iim: iim@63f98000 { 611262569Simp compatible = "fsl,imx53-iim", "fsl,imx27-iim"; 612262569Simp reg = <0x63f98000 0x4000>; 613262569Simp interrupts = <69>; 614270864Simp clocks = <&clks IMX5_CLK_IIM_GATE>; 615262569Simp }; 616262569Simp 617262569Simp uart5: serial@63f90000 { 618262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 619262569Simp reg = <0x63f90000 0x4000>; 620262569Simp interrupts = <86>; 621270864Simp clocks = <&clks IMX5_CLK_UART5_IPG_GATE>, 622270864Simp <&clks IMX5_CLK_UART5_PER_GATE>; 623262569Simp clock-names = "ipg", "per"; 624262569Simp status = "disabled"; 625262569Simp }; 626262569Simp 627262569Simp owire: owire@63fa4000 { 628262569Simp compatible = "fsl,imx53-owire", "fsl,imx21-owire"; 629262569Simp reg = <0x63fa4000 0x4000>; 630270864Simp clocks = <&clks IMX5_CLK_OWIRE_GATE>; 631262569Simp status = "disabled"; 632262569Simp }; 633262569Simp 634262569Simp ecspi2: ecspi@63fac000 { 635262569Simp #address-cells = <1>; 636262569Simp #size-cells = <0>; 637262569Simp compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 638262569Simp reg = <0x63fac000 0x4000>; 639262569Simp interrupts = <37>; 640270864Simp clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, 641270864Simp <&clks IMX5_CLK_ECSPI2_PER_GATE>; 642262569Simp clock-names = "ipg", "per"; 643262569Simp status = "disabled"; 644262569Simp }; 645262569Simp 646262569Simp sdma: sdma@63fb0000 { 647262569Simp compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 648262569Simp reg = <0x63fb0000 0x4000>; 649262569Simp interrupts = <6>; 650270864Simp clocks = <&clks IMX5_CLK_SDMA_GATE>, 651270864Simp <&clks IMX5_CLK_SDMA_GATE>; 652262569Simp clock-names = "ipg", "ahb"; 653262569Simp #dma-cells = <3>; 654262569Simp fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; 655262569Simp }; 656262569Simp 657262569Simp cspi: cspi@63fc0000 { 658262569Simp #address-cells = <1>; 659262569Simp #size-cells = <0>; 660262569Simp compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 661262569Simp reg = <0x63fc0000 0x4000>; 662262569Simp interrupts = <38>; 663270864Simp clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>, 664270864Simp <&clks IMX5_CLK_CSPI_IPG_GATE>; 665262569Simp clock-names = "ipg", "per"; 666262569Simp status = "disabled"; 667262569Simp }; 668262569Simp 669262569Simp i2c2: i2c@63fc4000 { 670262569Simp #address-cells = <1>; 671262569Simp #size-cells = <0>; 672262569Simp compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 673262569Simp reg = <0x63fc4000 0x4000>; 674262569Simp interrupts = <63>; 675270864Simp clocks = <&clks IMX5_CLK_I2C2_GATE>; 676262569Simp status = "disabled"; 677262569Simp }; 678262569Simp 679262569Simp i2c1: i2c@63fc8000 { 680262569Simp #address-cells = <1>; 681262569Simp #size-cells = <0>; 682262569Simp compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 683262569Simp reg = <0x63fc8000 0x4000>; 684262569Simp interrupts = <62>; 685270864Simp clocks = <&clks IMX5_CLK_I2C1_GATE>; 686262569Simp status = "disabled"; 687262569Simp }; 688262569Simp 689262569Simp ssi1: ssi@63fcc000 { 690279385Simp #sound-dai-cells = <0>; 691270864Simp compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", 692270864Simp "fsl,imx21-ssi"; 693262569Simp reg = <0x63fcc000 0x4000>; 694262569Simp interrupts = <29>; 695279385Simp clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>, 696279385Simp <&clks IMX5_CLK_SSI1_ROOT_GATE>; 697279385Simp clock-names = "ipg", "baud"; 698262569Simp dmas = <&sdma 28 0 0>, 699262569Simp <&sdma 29 0 0>; 700262569Simp dma-names = "rx", "tx"; 701262569Simp fsl,fifo-depth = <15>; 702262569Simp status = "disabled"; 703262569Simp }; 704262569Simp 705262569Simp audmux: audmux@63fd0000 { 706262569Simp compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; 707262569Simp reg = <0x63fd0000 0x4000>; 708262569Simp status = "disabled"; 709262569Simp }; 710262569Simp 711262569Simp nfc: nand@63fdb000 { 712262569Simp compatible = "fsl,imx53-nand"; 713262569Simp reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; 714262569Simp interrupts = <8>; 715270864Simp clocks = <&clks IMX5_CLK_NFC_GATE>; 716262569Simp status = "disabled"; 717262569Simp }; 718262569Simp 719262569Simp ssi3: ssi@63fe8000 { 720279385Simp #sound-dai-cells = <0>; 721270864Simp compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", 722270864Simp "fsl,imx21-ssi"; 723262569Simp reg = <0x63fe8000 0x4000>; 724262569Simp interrupts = <96>; 725279385Simp clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>, 726279385Simp <&clks IMX5_CLK_SSI3_ROOT_GATE>; 727279385Simp clock-names = "ipg", "baud"; 728262569Simp dmas = <&sdma 46 0 0>, 729262569Simp <&sdma 47 0 0>; 730262569Simp dma-names = "rx", "tx"; 731262569Simp fsl,fifo-depth = <15>; 732262569Simp status = "disabled"; 733262569Simp }; 734262569Simp 735262569Simp fec: ethernet@63fec000 { 736262569Simp compatible = "fsl,imx53-fec", "fsl,imx25-fec"; 737262569Simp reg = <0x63fec000 0x4000>; 738262569Simp interrupts = <87>; 739270864Simp clocks = <&clks IMX5_CLK_FEC_GATE>, 740270864Simp <&clks IMX5_CLK_FEC_GATE>, 741270864Simp <&clks IMX5_CLK_FEC_GATE>; 742262569Simp clock-names = "ipg", "ahb", "ptp"; 743262569Simp status = "disabled"; 744262569Simp }; 745262569Simp 746262569Simp tve: tve@63ff0000 { 747262569Simp compatible = "fsl,imx53-tve"; 748262569Simp reg = <0x63ff0000 0x1000>; 749262569Simp interrupts = <92>; 750270864Simp clocks = <&clks IMX5_CLK_TVE_GATE>, 751270864Simp <&clks IMX5_CLK_IPU_DI1_SEL>; 752262569Simp clock-names = "tve", "di_sel"; 753262569Simp status = "disabled"; 754270864Simp 755270864Simp port { 756270864Simp tve_in: endpoint { 757270864Simp remote-endpoint = <&ipu_di1_tve>; 758270864Simp }; 759270864Simp }; 760262569Simp }; 761262569Simp 762262569Simp vpu: vpu@63ff4000 { 763279385Simp compatible = "fsl,imx53-vpu", "cnm,coda7541"; 764262569Simp reg = <0x63ff4000 0x1000>; 765262569Simp interrupts = <9>; 766270864Simp clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, 767270864Simp <&clks IMX5_CLK_VPU_GATE>; 768262569Simp clock-names = "per", "ahb"; 769270864Simp resets = <&src 1>; 770262569Simp iram = <&ocram>; 771262569Simp }; 772279385Simp 773279385Simp sahara: crypto@63ff8000 { 774279385Simp compatible = "fsl,imx53-sahara"; 775279385Simp reg = <0x63ff8000 0x4000>; 776279385Simp interrupts = <19 20>; 777279385Simp clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, 778279385Simp <&clks IMX5_CLK_SAHARA_IPG_GATE>; 779279385Simp clock-names = "ipg", "ahb"; 780279385Simp }; 781262569Simp }; 782262569Simp 783262569Simp ocram: sram@f8000000 { 784262569Simp compatible = "mmio-sram"; 785262569Simp reg = <0xf8000000 0x20000>; 786270864Simp clocks = <&clks IMX5_CLK_OCRAM>; 787262569Simp }; 788279385Simp 789279385Simp pmu { 790279385Simp compatible = "arm,cortex-a8-pmu"; 791279385Simp interrupts = <77>; 792279385Simp }; 793262569Simp }; 794262569Simp}; 795