1262569Simp/* 2262569Simp * Copyright 2011 Freescale Semiconductor, Inc. 3262569Simp * Copyright 2011 Linaro Ltd. 4262569Simp * 5262569Simp * The code contained herein is licensed under the GNU General Public 6262569Simp * License. You may obtain a copy of the GNU General Public License 7262569Simp * Version 2 or later at the following locations: 8262569Simp * 9262569Simp * http://www.opensource.org/licenses/gpl-license.html 10262569Simp * http://www.gnu.org/copyleft/gpl.html 11262569Simp */ 12262569Simp 13262569Simp/dts-v1/; 14262569Simp#include "imx51.dtsi" 15262569Simp 16262569Simp/ { 17262569Simp model = "Freescale i.MX51 Babbage Board"; 18262569Simp compatible = "fsl,imx51-babbage", "fsl,imx51"; 19262569Simp 20270864Simp chosen { 21270864Simp stdout-path = &uart1; 22270864Simp }; 23270864Simp 24262569Simp memory { 25262569Simp reg = <0x90000000 0x20000000>; 26262569Simp }; 27262569Simp 28270864Simp clocks { 29270864Simp ckih1 { 30270864Simp clock-frequency = <22579200>; 31270864Simp }; 32270864Simp 33270864Simp clk_26M: codec_clock { 34270864Simp compatible = "fixed-clock"; 35270864Simp reg=<0>; 36270864Simp #clock-cells = <0>; 37270864Simp clock-frequency = <26000000>; 38270864Simp gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; 39270864Simp }; 40270864Simp }; 41270864Simp 42270864Simp display0: display@di0 { 43262569Simp compatible = "fsl,imx-parallel-display"; 44262569Simp interface-pix-fmt = "rgb24"; 45262569Simp pinctrl-names = "default"; 46270864Simp pinctrl-0 = <&pinctrl_ipu_disp1>; 47262569Simp display-timings { 48262569Simp native-mode = <&timing0>; 49262569Simp timing0: dvi { 50262569Simp clock-frequency = <65000000>; 51262569Simp hactive = <1024>; 52262569Simp vactive = <768>; 53262569Simp hback-porch = <220>; 54262569Simp hfront-porch = <40>; 55262569Simp vback-porch = <21>; 56262569Simp vfront-porch = <7>; 57262569Simp hsync-len = <60>; 58262569Simp vsync-len = <10>; 59262569Simp }; 60262569Simp }; 61270864Simp 62270864Simp port { 63270864Simp display0_in: endpoint { 64270864Simp remote-endpoint = <&ipu_di0_disp0>; 65270864Simp }; 66270864Simp }; 67262569Simp }; 68262569Simp 69270864Simp display1: display@di1 { 70262569Simp compatible = "fsl,imx-parallel-display"; 71262569Simp interface-pix-fmt = "rgb565"; 72262569Simp pinctrl-names = "default"; 73270864Simp pinctrl-0 = <&pinctrl_ipu_disp2>; 74262569Simp status = "disabled"; 75262569Simp display-timings { 76262569Simp native-mode = <&timing1>; 77262569Simp timing1: claawvga { 78262569Simp clock-frequency = <27000000>; 79262569Simp hactive = <800>; 80262569Simp vactive = <480>; 81262569Simp hback-porch = <40>; 82262569Simp hfront-porch = <60>; 83262569Simp vback-porch = <10>; 84262569Simp vfront-porch = <10>; 85262569Simp hsync-len = <20>; 86262569Simp vsync-len = <10>; 87262569Simp hsync-active = <0>; 88262569Simp vsync-active = <0>; 89262569Simp de-active = <1>; 90262569Simp pixelclk-active = <0>; 91262569Simp }; 92262569Simp }; 93270864Simp 94270864Simp port { 95270864Simp display1_in: endpoint { 96270864Simp remote-endpoint = <&ipu_di1_disp1>; 97270864Simp }; 98270864Simp }; 99262569Simp }; 100262569Simp 101262569Simp gpio-keys { 102262569Simp compatible = "gpio-keys"; 103270864Simp pinctrl-names = "default"; 104270864Simp pinctrl-0 = <&pinctrl_gpio_keys>; 105262569Simp 106262569Simp power { 107262569Simp label = "Power Button"; 108270864Simp gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; 109270864Simp linux,code = <KEY_POWER>; 110262569Simp gpio-key,wakeup; 111262569Simp }; 112262569Simp }; 113262569Simp 114270864Simp leds { 115270864Simp compatible = "gpio-leds"; 116270864Simp pinctrl-names = "default"; 117270864Simp pinctrl-0 = <&pinctrl_gpio_leds>; 118270864Simp 119270864Simp led-diagnostic { 120270864Simp label = "diagnostic"; 121270864Simp gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; 122270864Simp }; 123270864Simp }; 124270864Simp 125270864Simp regulators { 126270864Simp compatible = "simple-bus"; 127270864Simp #address-cells = <1>; 128270864Simp #size-cells = <0>; 129270864Simp 130279385Simp reg_hub_reset: regulator@0 { 131270864Simp compatible = "regulator-fixed"; 132270864Simp pinctrl-names = "default"; 133279385Simp pinctrl-0 = <&pinctrl_usbotgreg>; 134270864Simp reg = <0>; 135279385Simp regulator-name = "hub_reset"; 136270864Simp regulator-min-microvolt = <5000000>; 137270864Simp regulator-max-microvolt = <5000000>; 138270864Simp gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; 139270864Simp enable-active-high; 140270864Simp }; 141270864Simp }; 142270864Simp 143262569Simp sound { 144262569Simp compatible = "fsl,imx51-babbage-sgtl5000", 145262569Simp "fsl,imx-audio-sgtl5000"; 146262569Simp model = "imx51-babbage-sgtl5000"; 147262569Simp ssi-controller = <&ssi2>; 148262569Simp audio-codec = <&sgtl5000>; 149262569Simp audio-routing = 150262569Simp "MIC_IN", "Mic Jack", 151262569Simp "Mic Jack", "Mic Bias", 152262569Simp "Headphone Jack", "HP_OUT"; 153262569Simp mux-int-port = <2>; 154262569Simp mux-ext-port = <3>; 155262569Simp }; 156262569Simp 157270864Simp usbphy { 158270864Simp #address-cells = <1>; 159270864Simp #size-cells = <0>; 160270864Simp compatible = "simple-bus"; 161262569Simp 162270864Simp usbh1phy: usbh1phy@0 { 163270864Simp compatible = "usb-nop-xceiv"; 164270864Simp reg = <0>; 165270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 166270864Simp clock-names = "main_clk"; 167279385Simp reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; 168262569Simp }; 169262569Simp }; 170262569Simp}; 171262569Simp 172270864Simp&audmux { 173262569Simp pinctrl-names = "default"; 174270864Simp pinctrl-0 = <&pinctrl_audmux>; 175262569Simp status = "okay"; 176262569Simp}; 177262569Simp 178262569Simp&ecspi1 { 179262569Simp pinctrl-names = "default"; 180270864Simp pinctrl-0 = <&pinctrl_ecspi1>; 181262569Simp fsl,spi-num-chipselects = <2>; 182270864Simp cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>, 183270864Simp <&gpio4 25 GPIO_ACTIVE_LOW>; 184262569Simp status = "okay"; 185262569Simp 186262569Simp pmic: mc13892@0 { 187262569Simp compatible = "fsl,mc13892"; 188270864Simp pinctrl-names = "default"; 189270864Simp pinctrl-0 = <&pinctrl_pmic>; 190262569Simp spi-max-frequency = <6000000>; 191262569Simp spi-cs-high; 192262569Simp reg = <0>; 193262569Simp interrupt-parent = <&gpio1>; 194270864Simp interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 195270864Simp fsl,mc13xxx-uses-rtc; 196262569Simp 197262569Simp regulators { 198262569Simp sw1_reg: sw1 { 199262569Simp regulator-min-microvolt = <600000>; 200262569Simp regulator-max-microvolt = <1375000>; 201262569Simp regulator-boot-on; 202262569Simp regulator-always-on; 203262569Simp }; 204262569Simp 205262569Simp sw2_reg: sw2 { 206262569Simp regulator-min-microvolt = <900000>; 207262569Simp regulator-max-microvolt = <1850000>; 208262569Simp regulator-boot-on; 209262569Simp regulator-always-on; 210262569Simp }; 211262569Simp 212262569Simp sw3_reg: sw3 { 213262569Simp regulator-min-microvolt = <1100000>; 214262569Simp regulator-max-microvolt = <1850000>; 215262569Simp regulator-boot-on; 216262569Simp regulator-always-on; 217262569Simp }; 218262569Simp 219262569Simp sw4_reg: sw4 { 220262569Simp regulator-min-microvolt = <1100000>; 221262569Simp regulator-max-microvolt = <1850000>; 222262569Simp regulator-boot-on; 223262569Simp regulator-always-on; 224262569Simp }; 225262569Simp 226262569Simp vpll_reg: vpll { 227262569Simp regulator-min-microvolt = <1050000>; 228262569Simp regulator-max-microvolt = <1800000>; 229262569Simp regulator-boot-on; 230262569Simp regulator-always-on; 231262569Simp }; 232262569Simp 233262569Simp vdig_reg: vdig { 234262569Simp regulator-min-microvolt = <1650000>; 235262569Simp regulator-max-microvolt = <1650000>; 236262569Simp regulator-boot-on; 237262569Simp }; 238262569Simp 239262569Simp vsd_reg: vsd { 240262569Simp regulator-min-microvolt = <1800000>; 241262569Simp regulator-max-microvolt = <3150000>; 242262569Simp }; 243262569Simp 244262569Simp vusb2_reg: vusb2 { 245262569Simp regulator-min-microvolt = <2400000>; 246262569Simp regulator-max-microvolt = <2775000>; 247262569Simp regulator-boot-on; 248262569Simp regulator-always-on; 249262569Simp }; 250262569Simp 251262569Simp vvideo_reg: vvideo { 252262569Simp regulator-min-microvolt = <2775000>; 253262569Simp regulator-max-microvolt = <2775000>; 254262569Simp }; 255262569Simp 256262569Simp vaudio_reg: vaudio { 257262569Simp regulator-min-microvolt = <2300000>; 258262569Simp regulator-max-microvolt = <3000000>; 259262569Simp }; 260262569Simp 261262569Simp vcam_reg: vcam { 262262569Simp regulator-min-microvolt = <2500000>; 263262569Simp regulator-max-microvolt = <3000000>; 264262569Simp }; 265262569Simp 266262569Simp vgen1_reg: vgen1 { 267262569Simp regulator-min-microvolt = <1200000>; 268262569Simp regulator-max-microvolt = <1200000>; 269262569Simp }; 270262569Simp 271262569Simp vgen2_reg: vgen2 { 272262569Simp regulator-min-microvolt = <1200000>; 273262569Simp regulator-max-microvolt = <3150000>; 274262569Simp regulator-always-on; 275262569Simp }; 276262569Simp 277262569Simp vgen3_reg: vgen3 { 278262569Simp regulator-min-microvolt = <1800000>; 279262569Simp regulator-max-microvolt = <2900000>; 280262569Simp regulator-always-on; 281262569Simp }; 282262569Simp }; 283262569Simp }; 284262569Simp 285262569Simp flash: at45db321d@1 { 286262569Simp #address-cells = <1>; 287262569Simp #size-cells = <1>; 288262569Simp compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash"; 289262569Simp spi-max-frequency = <25000000>; 290262569Simp reg = <1>; 291262569Simp 292262569Simp partition@0 { 293262569Simp label = "U-Boot"; 294262569Simp reg = <0x0 0x40000>; 295262569Simp read-only; 296262569Simp }; 297262569Simp 298262569Simp partition@40000 { 299262569Simp label = "Kernel"; 300262569Simp reg = <0x40000 0x3c0000>; 301262569Simp }; 302262569Simp }; 303262569Simp}; 304262569Simp 305270864Simp&esdhc1 { 306270864Simp pinctrl-names = "default"; 307270864Simp pinctrl-0 = <&pinctrl_esdhc1>; 308270864Simp cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 309270864Simp wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; 310262569Simp status = "okay"; 311262569Simp}; 312262569Simp 313270864Simp&esdhc2 { 314262569Simp pinctrl-names = "default"; 315270864Simp pinctrl-0 = <&pinctrl_esdhc2>; 316270864Simp cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; 317270864Simp wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 318270864Simp status = "okay"; 319262569Simp}; 320262569Simp 321270864Simp&fec { 322262569Simp pinctrl-names = "default"; 323270864Simp pinctrl-0 = <&pinctrl_fec>; 324270864Simp phy-mode = "mii"; 325270864Simp phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; 326270864Simp phy-reset-duration = <1>; 327262569Simp status = "okay"; 328262569Simp}; 329262569Simp 330270864Simp&i2c1 { 331262569Simp pinctrl-names = "default"; 332270864Simp pinctrl-0 = <&pinctrl_i2c1>; 333262569Simp status = "okay"; 334262569Simp}; 335262569Simp 336262569Simp&i2c2 { 337262569Simp pinctrl-names = "default"; 338270864Simp pinctrl-0 = <&pinctrl_i2c2>; 339262569Simp status = "okay"; 340262569Simp 341262569Simp sgtl5000: codec@0a { 342262569Simp compatible = "fsl,sgtl5000"; 343270864Simp pinctrl-names = "default"; 344270864Simp pinctrl-0 = <&pinctrl_clkcodec>; 345262569Simp reg = <0x0a>; 346262569Simp clocks = <&clk_26M>; 347262569Simp VDDA-supply = <&vdig_reg>; 348262569Simp VDDIO-supply = <&vvideo_reg>; 349262569Simp }; 350262569Simp}; 351262569Simp 352270864Simp&ipu_di0_disp0 { 353270864Simp remote-endpoint = <&display0_in>; 354270864Simp}; 355270864Simp 356270864Simp&ipu_di1_disp1 { 357270864Simp remote-endpoint = <&display1_in>; 358270864Simp}; 359270864Simp 360270864Simp&kpp { 361262569Simp pinctrl-names = "default"; 362270864Simp pinctrl-0 = <&pinctrl_kpp>; 363270864Simp linux,keymap = < 364270864Simp MATRIX_KEY(0, 0, KEY_UP) 365270864Simp MATRIX_KEY(0, 1, KEY_DOWN) 366270864Simp MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) 367270864Simp MATRIX_KEY(0, 3, KEY_HOME) 368270864Simp MATRIX_KEY(1, 0, KEY_RIGHT) 369270864Simp MATRIX_KEY(1, 1, KEY_LEFT) 370270864Simp MATRIX_KEY(1, 2, KEY_ENTER) 371270864Simp MATRIX_KEY(1, 3, KEY_VOLUMEUP) 372270864Simp MATRIX_KEY(2, 0, KEY_F6) 373270864Simp MATRIX_KEY(2, 1, KEY_F8) 374270864Simp MATRIX_KEY(2, 2, KEY_F9) 375270864Simp MATRIX_KEY(2, 3, KEY_F10) 376270864Simp MATRIX_KEY(3, 0, KEY_F1) 377270864Simp MATRIX_KEY(3, 1, KEY_F2) 378270864Simp MATRIX_KEY(3, 2, KEY_F3) 379270864Simp MATRIX_KEY(3, 3, KEY_POWER) 380270864Simp >; 381262569Simp status = "okay"; 382262569Simp}; 383262569Simp 384270864Simp&ssi2 { 385270864Simp status = "okay"; 386270864Simp}; 387270864Simp 388270864Simp&uart1 { 389262569Simp pinctrl-names = "default"; 390270864Simp pinctrl-0 = <&pinctrl_uart1>; 391270864Simp fsl,uart-has-rtscts; 392262569Simp status = "okay"; 393262569Simp}; 394262569Simp 395270864Simp&uart2 { 396262569Simp pinctrl-names = "default"; 397270864Simp pinctrl-0 = <&pinctrl_uart2>; 398262569Simp status = "okay"; 399262569Simp}; 400270864Simp 401270864Simp&uart3 { 402270864Simp pinctrl-names = "default"; 403270864Simp pinctrl-0 = <&pinctrl_uart3>; 404270864Simp fsl,uart-has-rtscts; 405270864Simp status = "okay"; 406270864Simp}; 407270864Simp 408270864Simp&usbh1 { 409270864Simp pinctrl-names = "default"; 410270864Simp pinctrl-0 = <&pinctrl_usbh1>; 411279385Simp vbus-supply = <®_hub_reset>; 412270864Simp fsl,usbphy = <&usbh1phy>; 413270864Simp phy_type = "ulpi"; 414270864Simp status = "okay"; 415270864Simp}; 416270864Simp 417270864Simp&usbotg { 418270864Simp dr_mode = "otg"; 419270864Simp disable-over-current; 420270864Simp phy_type = "utmi_wide"; 421270864Simp status = "okay"; 422270864Simp}; 423270864Simp 424270864Simp&iomuxc { 425270864Simp imx51-babbage { 426270864Simp pinctrl_audmux: audmuxgrp { 427270864Simp fsl,pins = < 428270864Simp MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000 429270864Simp MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000 430270864Simp MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000 431270864Simp MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000 432270864Simp >; 433270864Simp }; 434270864Simp 435270864Simp pinctrl_clkcodec: clkcodecgrp { 436270864Simp fsl,pins = < 437270864Simp MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 438270864Simp >; 439270864Simp }; 440270864Simp 441270864Simp pinctrl_ecspi1: ecspi1grp { 442270864Simp fsl,pins = < 443270864Simp MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 444270864Simp MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 445270864Simp MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 446270864Simp MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */ 447270864Simp MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 /* CS1 */ 448270864Simp >; 449270864Simp }; 450270864Simp 451270864Simp pinctrl_esdhc1: esdhc1grp { 452270864Simp fsl,pins = < 453270864Simp MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5 454270864Simp MX51_PAD_SD1_CLK__SD1_CLK 0x20d5 455270864Simp MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5 456270864Simp MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 457270864Simp MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 458270864Simp MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 459270864Simp MX51_PAD_GPIO1_0__GPIO1_0 0x100 460270864Simp MX51_PAD_GPIO1_1__GPIO1_1 0x100 461270864Simp >; 462270864Simp }; 463270864Simp 464270864Simp pinctrl_esdhc2: esdhc2grp { 465270864Simp fsl,pins = < 466270864Simp MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5 467270864Simp MX51_PAD_SD2_CLK__SD2_CLK 0x20d5 468270864Simp MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5 469270864Simp MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 470270864Simp MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 471270864Simp MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 472270864Simp MX51_PAD_GPIO1_5__GPIO1_5 0x100 /* WP */ 473270864Simp MX51_PAD_GPIO1_6__GPIO1_6 0x100 /* CD */ 474270864Simp >; 475270864Simp }; 476270864Simp 477270864Simp pinctrl_fec: fecgrp { 478270864Simp fsl,pins = < 479270864Simp MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5 480270864Simp MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085 481270864Simp MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085 482270864Simp MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085 483270864Simp MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180 484270864Simp MX51_PAD_EIM_CS5__FEC_CRS 0x00000180 485270864Simp MX51_PAD_NANDF_RB2__FEC_COL 0x00000180 486270864Simp MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x00000180 487270864Simp MX51_PAD_NANDF_D9__FEC_RDATA0 0x00002180 488270864Simp MX51_PAD_NANDF_D8__FEC_TDATA0 0x00002004 489270864Simp MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004 490270864Simp MX51_PAD_NANDF_CS3__FEC_MDC 0x00002004 491270864Simp MX51_PAD_NANDF_CS4__FEC_TDATA1 0x00002004 492270864Simp MX51_PAD_NANDF_CS5__FEC_TDATA2 0x00002004 493270864Simp MX51_PAD_NANDF_CS6__FEC_TDATA3 0x00002004 494270864Simp MX51_PAD_NANDF_CS7__FEC_TX_EN 0x00002004 495270864Simp MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x00002180 496270864Simp MX51_PAD_NANDF_D11__FEC_RX_DV 0x000020a4 497270864Simp MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */ 498270864Simp >; 499270864Simp }; 500270864Simp 501270864Simp pinctrl_gpio_keys: gpiokeysgrp { 502270864Simp fsl,pins = < 503270864Simp MX51_PAD_EIM_A27__GPIO2_21 0x5 504270864Simp >; 505270864Simp }; 506270864Simp 507270864Simp pinctrl_gpio_leds: gpioledsgrp { 508270864Simp fsl,pins = < 509270864Simp MX51_PAD_EIM_D22__GPIO2_6 0x80000000 510270864Simp >; 511270864Simp }; 512270864Simp 513270864Simp pinctrl_i2c1: i2c1grp { 514270864Simp fsl,pins = < 515270864Simp MX51_PAD_EIM_D19__I2C1_SCL 0x400001ed 516270864Simp MX51_PAD_EIM_D16__I2C1_SDA 0x400001ed 517270864Simp >; 518270864Simp }; 519270864Simp 520270864Simp pinctrl_i2c2: i2c2grp { 521270864Simp fsl,pins = < 522270864Simp MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed 523270864Simp MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed 524270864Simp >; 525270864Simp }; 526270864Simp 527270864Simp pinctrl_ipu_disp1: ipudisp1grp { 528270864Simp fsl,pins = < 529270864Simp MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 530270864Simp MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 531270864Simp MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 532270864Simp MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 533270864Simp MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 534270864Simp MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5 535270864Simp MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5 536270864Simp MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5 537270864Simp MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5 538270864Simp MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5 539270864Simp MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5 540270864Simp MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5 541270864Simp MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5 542270864Simp MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5 543270864Simp MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5 544270864Simp MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5 545270864Simp MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5 546270864Simp MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5 547270864Simp MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5 548270864Simp MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5 549270864Simp MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5 550270864Simp MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5 551270864Simp MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5 552270864Simp MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5 553270864Simp MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 554270864Simp MX51_PAD_DI1_PIN3__DI1_PIN3 0x5 555270864Simp >; 556270864Simp }; 557270864Simp 558270864Simp pinctrl_ipu_disp2: ipudisp2grp { 559270864Simp fsl,pins = < 560270864Simp MX51_PAD_DISP2_DAT0__DISP2_DAT0 0x5 561270864Simp MX51_PAD_DISP2_DAT1__DISP2_DAT1 0x5 562270864Simp MX51_PAD_DISP2_DAT2__DISP2_DAT2 0x5 563270864Simp MX51_PAD_DISP2_DAT3__DISP2_DAT3 0x5 564270864Simp MX51_PAD_DISP2_DAT4__DISP2_DAT4 0x5 565270864Simp MX51_PAD_DISP2_DAT5__DISP2_DAT5 0x5 566270864Simp MX51_PAD_DISP2_DAT6__DISP2_DAT6 0x5 567270864Simp MX51_PAD_DISP2_DAT7__DISP2_DAT7 0x5 568270864Simp MX51_PAD_DISP2_DAT8__DISP2_DAT8 0x5 569270864Simp MX51_PAD_DISP2_DAT9__DISP2_DAT9 0x5 570270864Simp MX51_PAD_DISP2_DAT10__DISP2_DAT10 0x5 571270864Simp MX51_PAD_DISP2_DAT11__DISP2_DAT11 0x5 572270864Simp MX51_PAD_DISP2_DAT12__DISP2_DAT12 0x5 573270864Simp MX51_PAD_DISP2_DAT13__DISP2_DAT13 0x5 574270864Simp MX51_PAD_DISP2_DAT14__DISP2_DAT14 0x5 575270864Simp MX51_PAD_DISP2_DAT15__DISP2_DAT15 0x5 576270864Simp MX51_PAD_DI2_PIN2__DI2_PIN2 0x5 577270864Simp MX51_PAD_DI2_PIN3__DI2_PIN3 0x5 578270864Simp MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5 579270864Simp MX51_PAD_DI_GP4__DI2_PIN15 0x5 580270864Simp >; 581270864Simp }; 582270864Simp 583270864Simp pinctrl_kpp: kppgrp { 584270864Simp fsl,pins = < 585270864Simp MX51_PAD_KEY_ROW0__KEY_ROW0 0xe0 586270864Simp MX51_PAD_KEY_ROW1__KEY_ROW1 0xe0 587270864Simp MX51_PAD_KEY_ROW2__KEY_ROW2 0xe0 588270864Simp MX51_PAD_KEY_ROW3__KEY_ROW3 0xe0 589270864Simp MX51_PAD_KEY_COL0__KEY_COL0 0xe8 590270864Simp MX51_PAD_KEY_COL1__KEY_COL1 0xe8 591270864Simp MX51_PAD_KEY_COL2__KEY_COL2 0xe8 592270864Simp MX51_PAD_KEY_COL3__KEY_COL3 0xe8 593270864Simp >; 594270864Simp }; 595270864Simp 596270864Simp pinctrl_pmic: pmicgrp { 597270864Simp fsl,pins = < 598270864Simp MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */ 599270864Simp >; 600270864Simp }; 601270864Simp 602270864Simp pinctrl_uart1: uart1grp { 603270864Simp fsl,pins = < 604270864Simp MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 605270864Simp MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 606270864Simp MX51_PAD_UART1_RTS__UART1_RTS 0x1c5 607270864Simp MX51_PAD_UART1_CTS__UART1_CTS 0x1c5 608270864Simp >; 609270864Simp }; 610270864Simp 611270864Simp pinctrl_uart2: uart2grp { 612270864Simp fsl,pins = < 613270864Simp MX51_PAD_UART2_RXD__UART2_RXD 0x1c5 614270864Simp MX51_PAD_UART2_TXD__UART2_TXD 0x1c5 615270864Simp >; 616270864Simp }; 617270864Simp 618270864Simp pinctrl_uart3: uart3grp { 619270864Simp fsl,pins = < 620270864Simp MX51_PAD_EIM_D25__UART3_RXD 0x1c5 621270864Simp MX51_PAD_EIM_D26__UART3_TXD 0x1c5 622270864Simp MX51_PAD_EIM_D27__UART3_RTS 0x1c5 623270864Simp MX51_PAD_EIM_D24__UART3_CTS 0x1c5 624270864Simp >; 625270864Simp }; 626270864Simp 627270864Simp pinctrl_usbh1: usbh1grp { 628270864Simp fsl,pins = < 629270864Simp MX51_PAD_USBH1_CLK__USBH1_CLK 0x80000000 630270864Simp MX51_PAD_USBH1_DIR__USBH1_DIR 0x80000000 631270864Simp MX51_PAD_USBH1_NXT__USBH1_NXT 0x80000000 632270864Simp MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x80000000 633270864Simp MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x80000000 634270864Simp MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x80000000 635270864Simp MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x80000000 636270864Simp MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x80000000 637270864Simp MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x80000000 638270864Simp MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x80000000 639270864Simp MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x80000000 640270864Simp >; 641270864Simp }; 642270864Simp 643270864Simp pinctrl_usbh1reg: usbh1reggrp { 644270864Simp fsl,pins = < 645270864Simp MX51_PAD_EIM_D21__GPIO2_5 0x85 646270864Simp >; 647270864Simp }; 648270864Simp 649270864Simp pinctrl_usbotgreg: usbotgreggrp { 650270864Simp fsl,pins = < 651270864Simp MX51_PAD_GPIO1_7__GPIO1_7 0x85 652270864Simp >; 653270864Simp }; 654270864Simp }; 655270864Simp}; 656