1279377Simp/* 2279377Simp * Copyright 2012 Sascha Hauer, Pengutronix 3279377Simp * 4279377Simp * The code contained herein is licensed under the GNU General Public 5279377Simp * License. You may obtain a copy of the GNU General Public License 6279377Simp * Version 2 or later at the following locations: 7279377Simp * 8279377Simp * http://www.opensource.org/licenses/gpl-license.html 9279377Simp * http://www.gnu.org/copyleft/gpl.html 10279377Simp */ 11279377Simp 12279377Simp#include "skeleton.dtsi" 13279377Simp#include "imx27-pinfunc.h" 14279377Simp 15279377Simp#include <dt-bindings/clock/imx27-clock.h> 16279377Simp#include <dt-bindings/gpio/gpio.h> 17279377Simp#include <dt-bindings/input/input.h> 18279377Simp#include <dt-bindings/interrupt-controller/irq.h> 19279377Simp 20279377Simp/ { 21279377Simp aliases { 22279377Simp ethernet0 = &fec; 23279377Simp gpio0 = &gpio1; 24279377Simp gpio1 = &gpio2; 25279377Simp gpio2 = &gpio3; 26279377Simp gpio3 = &gpio4; 27279377Simp gpio4 = &gpio5; 28279377Simp gpio5 = &gpio6; 29279377Simp i2c0 = &i2c1; 30279377Simp i2c1 = &i2c2; 31279377Simp serial0 = &uart1; 32279377Simp serial1 = &uart2; 33279377Simp serial2 = &uart3; 34279377Simp serial3 = &uart4; 35279377Simp serial4 = &uart5; 36279377Simp serial5 = &uart6; 37279377Simp spi0 = &cspi1; 38279377Simp spi1 = &cspi2; 39279377Simp spi2 = &cspi3; 40279377Simp }; 41279377Simp 42279377Simp aitc: aitc-interrupt-controller@e0000000 { 43279377Simp compatible = "fsl,imx27-aitc", "fsl,avic"; 44279377Simp interrupt-controller; 45279377Simp #interrupt-cells = <1>; 46279377Simp reg = <0x10040000 0x1000>; 47279377Simp }; 48279377Simp 49279377Simp clocks { 50279377Simp #address-cells = <1>; 51279377Simp #size-cells = <0>; 52279377Simp 53279377Simp osc26m { 54279377Simp compatible = "fsl,imx-osc26m", "fixed-clock"; 55279377Simp #clock-cells = <0>; 56279377Simp clock-frequency = <26000000>; 57279377Simp }; 58279377Simp }; 59279377Simp 60279377Simp cpus { 61279377Simp #size-cells = <0>; 62279377Simp #address-cells = <1>; 63279377Simp 64279377Simp cpu: cpu@0 { 65279377Simp device_type = "cpu"; 66279377Simp compatible = "arm,arm926ej-s"; 67279377Simp operating-points = < 68279377Simp /* kHz uV */ 69279377Simp 266000 1300000 70279377Simp 399000 1450000 71279377Simp >; 72279377Simp clock-latency = <62500>; 73279377Simp clocks = <&clks IMX27_CLK_CPU_DIV>; 74279377Simp voltage-tolerance = <5>; 75279377Simp }; 76279377Simp }; 77279377Simp 78279377Simp soc { 79279377Simp #address-cells = <1>; 80279377Simp #size-cells = <1>; 81279377Simp compatible = "simple-bus"; 82279377Simp interrupt-parent = <&aitc>; 83279377Simp ranges; 84279377Simp 85279377Simp aipi@10000000 { /* AIPI1 */ 86279377Simp compatible = "fsl,aipi-bus", "simple-bus"; 87279377Simp #address-cells = <1>; 88279377Simp #size-cells = <1>; 89279377Simp reg = <0x10000000 0x20000>; 90279377Simp ranges; 91279377Simp 92279377Simp dma: dma@10001000 { 93279377Simp compatible = "fsl,imx27-dma"; 94279377Simp reg = <0x10001000 0x1000>; 95279377Simp interrupts = <32>; 96279377Simp clocks = <&clks IMX27_CLK_DMA_IPG_GATE>, 97279377Simp <&clks IMX27_CLK_DMA_AHB_GATE>; 98279377Simp clock-names = "ipg", "ahb"; 99279377Simp #dma-cells = <1>; 100279377Simp #dma-channels = <16>; 101279377Simp }; 102279377Simp 103279377Simp wdog: wdog@10002000 { 104279377Simp compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; 105279377Simp reg = <0x10002000 0x1000>; 106279377Simp interrupts = <27>; 107279377Simp clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>; 108279377Simp }; 109279377Simp 110279377Simp gpt1: timer@10003000 { 111295436Sandrew compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 112279377Simp reg = <0x10003000 0x1000>; 113279377Simp interrupts = <26>; 114279377Simp clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>, 115279377Simp <&clks IMX27_CLK_PER1_GATE>; 116279377Simp clock-names = "ipg", "per"; 117279377Simp }; 118279377Simp 119279377Simp gpt2: timer@10004000 { 120295436Sandrew compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 121279377Simp reg = <0x10004000 0x1000>; 122279377Simp interrupts = <25>; 123279377Simp clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>, 124279377Simp <&clks IMX27_CLK_PER1_GATE>; 125279377Simp clock-names = "ipg", "per"; 126279377Simp }; 127279377Simp 128279377Simp gpt3: timer@10005000 { 129295436Sandrew compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 130279377Simp reg = <0x10005000 0x1000>; 131279377Simp interrupts = <24>; 132279377Simp clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>, 133279377Simp <&clks IMX27_CLK_PER1_GATE>; 134279377Simp clock-names = "ipg", "per"; 135279377Simp }; 136279377Simp 137279377Simp pwm: pwm@10006000 { 138279377Simp #pwm-cells = <2>; 139279377Simp compatible = "fsl,imx27-pwm"; 140279377Simp reg = <0x10006000 0x1000>; 141279377Simp interrupts = <23>; 142279377Simp clocks = <&clks IMX27_CLK_PWM_IPG_GATE>, 143279377Simp <&clks IMX27_CLK_PER1_GATE>; 144279377Simp clock-names = "ipg", "per"; 145279377Simp }; 146279377Simp 147295436Sandrew rtc: rtc@10007000 { 148295436Sandrew compatible = "fsl,imx21-rtc"; 149295436Sandrew reg = <0x10007000 0x1000>; 150295436Sandrew interrupts = <22>; 151295436Sandrew clocks = <&clks IMX27_CLK_CKIL>, 152295436Sandrew <&clks IMX27_CLK_RTC_IPG_GATE>; 153295436Sandrew clock-names = "ref", "ipg"; 154295436Sandrew }; 155295436Sandrew 156279377Simp kpp: kpp@10008000 { 157279377Simp compatible = "fsl,imx27-kpp", "fsl,imx21-kpp"; 158279377Simp reg = <0x10008000 0x1000>; 159279377Simp interrupts = <21>; 160279377Simp clocks = <&clks IMX27_CLK_KPP_IPG_GATE>; 161279377Simp status = "disabled"; 162279377Simp }; 163279377Simp 164279377Simp owire: owire@10009000 { 165279377Simp compatible = "fsl,imx27-owire", "fsl,imx21-owire"; 166279377Simp reg = <0x10009000 0x1000>; 167279377Simp clocks = <&clks IMX27_CLK_OWIRE_IPG_GATE>; 168279377Simp status = "disabled"; 169279377Simp }; 170279377Simp 171279377Simp uart1: serial@1000a000 { 172279377Simp compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 173279377Simp reg = <0x1000a000 0x1000>; 174279377Simp interrupts = <20>; 175279377Simp clocks = <&clks IMX27_CLK_UART1_IPG_GATE>, 176279377Simp <&clks IMX27_CLK_PER1_GATE>; 177279377Simp clock-names = "ipg", "per"; 178279377Simp status = "disabled"; 179279377Simp }; 180279377Simp 181279377Simp uart2: serial@1000b000 { 182279377Simp compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 183279377Simp reg = <0x1000b000 0x1000>; 184279377Simp interrupts = <19>; 185279377Simp clocks = <&clks IMX27_CLK_UART2_IPG_GATE>, 186279377Simp <&clks IMX27_CLK_PER1_GATE>; 187279377Simp clock-names = "ipg", "per"; 188279377Simp status = "disabled"; 189279377Simp }; 190279377Simp 191279377Simp uart3: serial@1000c000 { 192279377Simp compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 193279377Simp reg = <0x1000c000 0x1000>; 194279377Simp interrupts = <18>; 195279377Simp clocks = <&clks IMX27_CLK_UART3_IPG_GATE>, 196279377Simp <&clks IMX27_CLK_PER1_GATE>; 197279377Simp clock-names = "ipg", "per"; 198279377Simp status = "disabled"; 199279377Simp }; 200279377Simp 201279377Simp uart4: serial@1000d000 { 202279377Simp compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 203279377Simp reg = <0x1000d000 0x1000>; 204279377Simp interrupts = <17>; 205279377Simp clocks = <&clks IMX27_CLK_UART4_IPG_GATE>, 206279377Simp <&clks IMX27_CLK_PER1_GATE>; 207279377Simp clock-names = "ipg", "per"; 208279377Simp status = "disabled"; 209279377Simp }; 210279377Simp 211279377Simp cspi1: cspi@1000e000 { 212279377Simp #address-cells = <1>; 213279377Simp #size-cells = <0>; 214279377Simp compatible = "fsl,imx27-cspi"; 215279377Simp reg = <0x1000e000 0x1000>; 216279377Simp interrupts = <16>; 217279377Simp clocks = <&clks IMX27_CLK_CSPI1_IPG_GATE>, 218279377Simp <&clks IMX27_CLK_PER2_GATE>; 219279377Simp clock-names = "ipg", "per"; 220279377Simp status = "disabled"; 221279377Simp }; 222279377Simp 223279377Simp cspi2: cspi@1000f000 { 224279377Simp #address-cells = <1>; 225279377Simp #size-cells = <0>; 226279377Simp compatible = "fsl,imx27-cspi"; 227279377Simp reg = <0x1000f000 0x1000>; 228279377Simp interrupts = <15>; 229279377Simp clocks = <&clks IMX27_CLK_CSPI2_IPG_GATE>, 230279377Simp <&clks IMX27_CLK_PER2_GATE>; 231279377Simp clock-names = "ipg", "per"; 232279377Simp status = "disabled"; 233279377Simp }; 234279377Simp 235279377Simp ssi1: ssi@10010000 { 236279377Simp #sound-dai-cells = <0>; 237279377Simp compatible = "fsl,imx27-ssi", "fsl,imx21-ssi"; 238279377Simp reg = <0x10010000 0x1000>; 239279377Simp interrupts = <14>; 240279377Simp clocks = <&clks IMX27_CLK_SSI1_IPG_GATE>; 241279377Simp dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>; 242279377Simp dma-names = "rx0", "tx0", "rx1", "tx1"; 243279377Simp fsl,fifo-depth = <8>; 244279377Simp status = "disabled"; 245279377Simp }; 246279377Simp 247279377Simp ssi2: ssi@10011000 { 248279377Simp #sound-dai-cells = <0>; 249279377Simp compatible = "fsl,imx27-ssi", "fsl,imx21-ssi"; 250279377Simp reg = <0x10011000 0x1000>; 251279377Simp interrupts = <13>; 252279377Simp clocks = <&clks IMX27_CLK_SSI2_IPG_GATE>; 253279377Simp dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>; 254279377Simp dma-names = "rx0", "tx0", "rx1", "tx1"; 255279377Simp fsl,fifo-depth = <8>; 256279377Simp status = "disabled"; 257279377Simp }; 258279377Simp 259279377Simp i2c1: i2c@10012000 { 260279377Simp #address-cells = <1>; 261279377Simp #size-cells = <0>; 262279377Simp compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; 263279377Simp reg = <0x10012000 0x1000>; 264279377Simp interrupts = <12>; 265279377Simp clocks = <&clks IMX27_CLK_I2C1_IPG_GATE>; 266279377Simp status = "disabled"; 267279377Simp }; 268279377Simp 269279377Simp sdhci1: sdhci@10013000 { 270279377Simp compatible = "fsl,imx27-mmc", "fsl,imx21-mmc"; 271279377Simp reg = <0x10013000 0x1000>; 272279377Simp interrupts = <11>; 273279377Simp clocks = <&clks IMX27_CLK_SDHC1_IPG_GATE>, 274279377Simp <&clks IMX27_CLK_PER2_GATE>; 275279377Simp clock-names = "ipg", "per"; 276279377Simp dmas = <&dma 7>; 277279377Simp dma-names = "rx-tx"; 278279377Simp status = "disabled"; 279279377Simp }; 280279377Simp 281279377Simp sdhci2: sdhci@10014000 { 282279377Simp compatible = "fsl,imx27-mmc", "fsl,imx21-mmc"; 283279377Simp reg = <0x10014000 0x1000>; 284279377Simp interrupts = <10>; 285279377Simp clocks = <&clks IMX27_CLK_SDHC2_IPG_GATE>, 286279377Simp <&clks IMX27_CLK_PER2_GATE>; 287279377Simp clock-names = "ipg", "per"; 288279377Simp dmas = <&dma 6>; 289279377Simp dma-names = "rx-tx"; 290279377Simp status = "disabled"; 291279377Simp }; 292279377Simp 293279377Simp iomuxc: iomuxc@10015000 { 294279377Simp compatible = "fsl,imx27-iomuxc"; 295279377Simp reg = <0x10015000 0x600>; 296279377Simp #address-cells = <1>; 297279377Simp #size-cells = <1>; 298279377Simp ranges; 299279377Simp 300279377Simp gpio1: gpio@10015000 { 301279377Simp compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 302279377Simp reg = <0x10015000 0x100>; 303279377Simp clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 304279377Simp interrupts = <8>; 305279377Simp gpio-controller; 306279377Simp #gpio-cells = <2>; 307279377Simp interrupt-controller; 308279377Simp #interrupt-cells = <2>; 309279377Simp }; 310279377Simp 311279377Simp gpio2: gpio@10015100 { 312279377Simp compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 313279377Simp reg = <0x10015100 0x100>; 314279377Simp clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 315279377Simp interrupts = <8>; 316279377Simp gpio-controller; 317279377Simp #gpio-cells = <2>; 318279377Simp interrupt-controller; 319279377Simp #interrupt-cells = <2>; 320279377Simp }; 321279377Simp 322279377Simp gpio3: gpio@10015200 { 323279377Simp compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 324279377Simp reg = <0x10015200 0x100>; 325279377Simp clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 326279377Simp interrupts = <8>; 327279377Simp gpio-controller; 328279377Simp #gpio-cells = <2>; 329279377Simp interrupt-controller; 330279377Simp #interrupt-cells = <2>; 331279377Simp }; 332279377Simp 333279377Simp gpio4: gpio@10015300 { 334279377Simp compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 335279377Simp reg = <0x10015300 0x100>; 336279377Simp clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 337279377Simp interrupts = <8>; 338279377Simp gpio-controller; 339279377Simp #gpio-cells = <2>; 340279377Simp interrupt-controller; 341279377Simp #interrupt-cells = <2>; 342279377Simp }; 343279377Simp 344279377Simp gpio5: gpio@10015400 { 345279377Simp compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 346279377Simp reg = <0x10015400 0x100>; 347279377Simp clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 348279377Simp interrupts = <8>; 349279377Simp gpio-controller; 350279377Simp #gpio-cells = <2>; 351279377Simp interrupt-controller; 352279377Simp #interrupt-cells = <2>; 353279377Simp }; 354279377Simp 355279377Simp gpio6: gpio@10015500 { 356279377Simp compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 357279377Simp reg = <0x10015500 0x100>; 358279377Simp clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 359279377Simp interrupts = <8>; 360279377Simp gpio-controller; 361279377Simp #gpio-cells = <2>; 362279377Simp interrupt-controller; 363279377Simp #interrupt-cells = <2>; 364279377Simp }; 365279377Simp }; 366279377Simp 367279377Simp audmux: audmux@10016000 { 368279377Simp compatible = "fsl,imx27-audmux", "fsl,imx21-audmux"; 369279377Simp reg = <0x10016000 0x1000>; 370279377Simp clocks = <&clks IMX27_CLK_DUMMY>; 371279377Simp clock-names = "audmux"; 372279377Simp status = "disabled"; 373279377Simp }; 374279377Simp 375279377Simp cspi3: cspi@10017000 { 376279377Simp #address-cells = <1>; 377279377Simp #size-cells = <0>; 378279377Simp compatible = "fsl,imx27-cspi"; 379279377Simp reg = <0x10017000 0x1000>; 380279377Simp interrupts = <6>; 381279377Simp clocks = <&clks IMX27_CLK_CSPI3_IPG_GATE>, 382279377Simp <&clks IMX27_CLK_PER2_GATE>; 383279377Simp clock-names = "ipg", "per"; 384279377Simp status = "disabled"; 385279377Simp }; 386279377Simp 387279377Simp gpt4: timer@10019000 { 388295436Sandrew compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 389279377Simp reg = <0x10019000 0x1000>; 390279377Simp interrupts = <4>; 391279377Simp clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>, 392279377Simp <&clks IMX27_CLK_PER1_GATE>; 393279377Simp clock-names = "ipg", "per"; 394279377Simp }; 395279377Simp 396279377Simp gpt5: timer@1001a000 { 397295436Sandrew compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 398279377Simp reg = <0x1001a000 0x1000>; 399279377Simp interrupts = <3>; 400279377Simp clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>, 401279377Simp <&clks IMX27_CLK_PER1_GATE>; 402279377Simp clock-names = "ipg", "per"; 403279377Simp }; 404279377Simp 405279377Simp uart5: serial@1001b000 { 406279377Simp compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 407279377Simp reg = <0x1001b000 0x1000>; 408279377Simp interrupts = <49>; 409279377Simp clocks = <&clks IMX27_CLK_UART5_IPG_GATE>, 410279377Simp <&clks IMX27_CLK_PER1_GATE>; 411279377Simp clock-names = "ipg", "per"; 412279377Simp status = "disabled"; 413279377Simp }; 414279377Simp 415279377Simp uart6: serial@1001c000 { 416279377Simp compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 417279377Simp reg = <0x1001c000 0x1000>; 418279377Simp interrupts = <48>; 419279377Simp clocks = <&clks IMX27_CLK_UART6_IPG_GATE>, 420279377Simp <&clks IMX27_CLK_PER1_GATE>; 421279377Simp clock-names = "ipg", "per"; 422279377Simp status = "disabled"; 423279377Simp }; 424279377Simp 425279377Simp i2c2: i2c@1001d000 { 426279377Simp #address-cells = <1>; 427279377Simp #size-cells = <0>; 428279377Simp compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; 429279377Simp reg = <0x1001d000 0x1000>; 430279377Simp interrupts = <1>; 431279377Simp clocks = <&clks IMX27_CLK_I2C2_IPG_GATE>; 432279377Simp status = "disabled"; 433279377Simp }; 434279377Simp 435279377Simp sdhci3: sdhci@1001e000 { 436279377Simp compatible = "fsl,imx27-mmc", "fsl,imx21-mmc"; 437279377Simp reg = <0x1001e000 0x1000>; 438279377Simp interrupts = <9>; 439279377Simp clocks = <&clks IMX27_CLK_SDHC3_IPG_GATE>, 440279377Simp <&clks IMX27_CLK_PER2_GATE>; 441279377Simp clock-names = "ipg", "per"; 442279377Simp dmas = <&dma 36>; 443279377Simp dma-names = "rx-tx"; 444279377Simp status = "disabled"; 445279377Simp }; 446279377Simp 447279377Simp gpt6: timer@1001f000 { 448295436Sandrew compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 449279377Simp reg = <0x1001f000 0x1000>; 450279377Simp interrupts = <2>; 451279377Simp clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>, 452279377Simp <&clks IMX27_CLK_PER1_GATE>; 453279377Simp clock-names = "ipg", "per"; 454279377Simp }; 455279377Simp }; 456279377Simp 457279377Simp aipi@10020000 { /* AIPI2 */ 458279377Simp compatible = "fsl,aipi-bus", "simple-bus"; 459279377Simp #address-cells = <1>; 460279377Simp #size-cells = <1>; 461279377Simp reg = <0x10020000 0x20000>; 462279377Simp ranges; 463279377Simp 464279377Simp fb: fb@10021000 { 465279377Simp compatible = "fsl,imx27-fb", "fsl,imx21-fb"; 466279377Simp interrupts = <61>; 467279377Simp reg = <0x10021000 0x1000>; 468279377Simp clocks = <&clks IMX27_CLK_LCDC_IPG_GATE>, 469279377Simp <&clks IMX27_CLK_LCDC_AHB_GATE>, 470279377Simp <&clks IMX27_CLK_PER3_GATE>; 471279377Simp clock-names = "ipg", "ahb", "per"; 472279377Simp status = "disabled"; 473279377Simp }; 474279377Simp 475279377Simp coda: coda@10023000 { 476279377Simp compatible = "fsl,imx27-vpu", "cnm,codadx6"; 477279377Simp reg = <0x10023000 0x0200>; 478279377Simp interrupts = <53>; 479279377Simp clocks = <&clks IMX27_CLK_VPU_BAUD_GATE>, 480279377Simp <&clks IMX27_CLK_VPU_AHB_GATE>; 481279377Simp clock-names = "per", "ahb"; 482279377Simp iram = <&iram>; 483279377Simp }; 484279377Simp 485279377Simp usbotg: usb@10024000 { 486279377Simp compatible = "fsl,imx27-usb"; 487279377Simp reg = <0x10024000 0x200>; 488279377Simp interrupts = <56>; 489295436Sandrew clocks = <&clks IMX27_CLK_USB_IPG_GATE>, 490295436Sandrew <&clks IMX27_CLK_USB_AHB_GATE>, 491295436Sandrew <&clks IMX27_CLK_USB_DIV>; 492295436Sandrew clock-names = "ipg", "ahb", "per"; 493279377Simp fsl,usbmisc = <&usbmisc 0>; 494279377Simp status = "disabled"; 495279377Simp }; 496279377Simp 497279377Simp usbh1: usb@10024200 { 498279377Simp compatible = "fsl,imx27-usb"; 499279377Simp reg = <0x10024200 0x200>; 500279377Simp interrupts = <54>; 501295436Sandrew clocks = <&clks IMX27_CLK_USB_IPG_GATE>, 502295436Sandrew <&clks IMX27_CLK_USB_AHB_GATE>, 503295436Sandrew <&clks IMX27_CLK_USB_DIV>; 504295436Sandrew clock-names = "ipg", "ahb", "per"; 505279377Simp fsl,usbmisc = <&usbmisc 1>; 506295436Sandrew dr_mode = "host"; 507279377Simp status = "disabled"; 508279377Simp }; 509279377Simp 510279377Simp usbh2: usb@10024400 { 511279377Simp compatible = "fsl,imx27-usb"; 512279377Simp reg = <0x10024400 0x200>; 513279377Simp interrupts = <55>; 514295436Sandrew clocks = <&clks IMX27_CLK_USB_IPG_GATE>, 515295436Sandrew <&clks IMX27_CLK_USB_AHB_GATE>, 516295436Sandrew <&clks IMX27_CLK_USB_DIV>; 517295436Sandrew clock-names = "ipg", "ahb", "per"; 518279377Simp fsl,usbmisc = <&usbmisc 2>; 519295436Sandrew dr_mode = "host"; 520279377Simp status = "disabled"; 521279377Simp }; 522279377Simp 523279377Simp usbmisc: usbmisc@10024600 { 524279377Simp #index-cells = <1>; 525279377Simp compatible = "fsl,imx27-usbmisc"; 526279377Simp reg = <0x10024600 0x200>; 527279377Simp }; 528279377Simp 529279377Simp sahara2: sahara@10025000 { 530279377Simp compatible = "fsl,imx27-sahara"; 531279377Simp reg = <0x10025000 0x1000>; 532279377Simp interrupts = <59>; 533279377Simp clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>, 534279377Simp <&clks IMX27_CLK_SAHARA_AHB_GATE>; 535279377Simp clock-names = "ipg", "ahb"; 536279377Simp }; 537279377Simp 538279377Simp clks: ccm@10027000{ 539279377Simp compatible = "fsl,imx27-ccm"; 540279377Simp reg = <0x10027000 0x1000>; 541279377Simp #clock-cells = <1>; 542279377Simp }; 543279377Simp 544279377Simp iim: iim@10028000 { 545279377Simp compatible = "fsl,imx27-iim"; 546279377Simp reg = <0x10028000 0x1000>; 547279377Simp interrupts = <62>; 548279377Simp clocks = <&clks IMX27_CLK_IIM_IPG_GATE>; 549279377Simp }; 550279377Simp 551279377Simp fec: ethernet@1002b000 { 552279377Simp compatible = "fsl,imx27-fec"; 553295436Sandrew reg = <0x1002b000 0x1000>; 554279377Simp interrupts = <50>; 555279377Simp clocks = <&clks IMX27_CLK_FEC_IPG_GATE>, 556279377Simp <&clks IMX27_CLK_FEC_AHB_GATE>; 557279377Simp clock-names = "ipg", "ahb"; 558279377Simp status = "disabled"; 559279377Simp }; 560279377Simp }; 561279377Simp 562279377Simp nfc: nand@d8000000 { 563279377Simp #address-cells = <1>; 564279377Simp #size-cells = <1>; 565279377Simp compatible = "fsl,imx27-nand"; 566279377Simp reg = <0xd8000000 0x1000>; 567279377Simp interrupts = <29>; 568279377Simp clocks = <&clks IMX27_CLK_NFC_BAUD_GATE>; 569279377Simp status = "disabled"; 570279377Simp }; 571279377Simp 572279377Simp weim: weim@d8002000 { 573279377Simp #address-cells = <2>; 574279377Simp #size-cells = <1>; 575279377Simp compatible = "fsl,imx27-weim"; 576279377Simp reg = <0xd8002000 0x1000>; 577279377Simp clocks = <&clks IMX27_CLK_EMI_AHB_GATE>; 578279377Simp ranges = < 579279377Simp 0 0 0xc0000000 0x08000000 580279377Simp 1 0 0xc8000000 0x08000000 581279377Simp 2 0 0xd0000000 0x02000000 582279377Simp 3 0 0xd2000000 0x02000000 583279377Simp 4 0 0xd4000000 0x02000000 584279377Simp 5 0 0xd6000000 0x02000000 585279377Simp >; 586279377Simp status = "disabled"; 587279377Simp }; 588279377Simp 589279377Simp iram: iram@ffff4c00 { 590279377Simp compatible = "mmio-sram"; 591279377Simp reg = <0xffff4c00 0xb400>; 592279377Simp }; 593279377Simp }; 594279377Simp}; 595