exynos5.dtsi revision 279377
1279377Simp/* 2279377Simp * Samsung's Exynos5 SoC series common device tree source 3279377Simp * 4279377Simp * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 5279377Simp * http://www.samsung.com 6279377Simp * 7279377Simp * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular 8279377Simp * SoCs from Exynos5 series can include this file and provide values for SoCs 9279377Simp * specfic bindings. 10279377Simp * 11279377Simp * This program is free software; you can redistribute it and/or modify 12279377Simp * it under the terms of the GNU General Public License version 2 as 13279377Simp * published by the Free Software Foundation. 14279377Simp */ 15279377Simp 16279377Simp#include "skeleton.dtsi" 17279377Simp 18279377Simp/ { 19279377Simp interrupt-parent = <&gic>; 20279377Simp 21279377Simp aliases { 22279377Simp serial0 = &serial_0; 23279377Simp serial1 = &serial_1; 24279377Simp serial2 = &serial_2; 25279377Simp serial3 = &serial_3; 26279377Simp }; 27279377Simp 28279377Simp chipid@10000000 { 29279377Simp compatible = "samsung,exynos4210-chipid"; 30279377Simp reg = <0x10000000 0x100>; 31279377Simp }; 32279377Simp 33279377Simp combiner: interrupt-controller@10440000 { 34279377Simp compatible = "samsung,exynos4210-combiner"; 35279377Simp #interrupt-cells = <2>; 36279377Simp interrupt-controller; 37279377Simp samsung,combiner-nr = <32>; 38279377Simp reg = <0x10440000 0x1000>; 39279377Simp interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 40279377Simp <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 41279377Simp <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, 42279377Simp <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, 43279377Simp <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 44279377Simp <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, 45279377Simp <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 46279377Simp <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 47279377Simp }; 48279377Simp 49279377Simp gic: interrupt-controller@10481000 { 50279377Simp compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 51279377Simp #interrupt-cells = <3>; 52279377Simp interrupt-controller; 53279377Simp reg = <0x10481000 0x1000>, 54279377Simp <0x10482000 0x1000>, 55279377Simp <0x10484000 0x2000>, 56279377Simp <0x10486000 0x2000>; 57279377Simp interrupts = <1 9 0xf04>; 58279377Simp }; 59279377Simp 60279377Simp serial_0: serial@12C00000 { 61279377Simp compatible = "samsung,exynos4210-uart"; 62279377Simp reg = <0x12C00000 0x100>; 63279377Simp interrupts = <0 51 0>; 64279377Simp }; 65279377Simp 66279377Simp serial_1: serial@12C10000 { 67279377Simp compatible = "samsung,exynos4210-uart"; 68279377Simp reg = <0x12C10000 0x100>; 69279377Simp interrupts = <0 52 0>; 70279377Simp }; 71279377Simp 72279377Simp serial_2: serial@12C20000 { 73279377Simp compatible = "samsung,exynos4210-uart"; 74279377Simp reg = <0x12C20000 0x100>; 75279377Simp interrupts = <0 53 0>; 76279377Simp }; 77279377Simp 78279377Simp serial_3: serial@12C30000 { 79279377Simp compatible = "samsung,exynos4210-uart"; 80279377Simp reg = <0x12C30000 0x100>; 81279377Simp interrupts = <0 54 0>; 82279377Simp }; 83279377Simp 84279377Simp rtc@101E0000 { 85279377Simp compatible = "samsung,s3c6410-rtc"; 86279377Simp reg = <0x101E0000 0x100>; 87279377Simp interrupts = <0 43 0>, <0 44 0>; 88279377Simp status = "disabled"; 89279377Simp }; 90279377Simp 91279377Simp fimd@14400000 { 92279377Simp compatible = "samsung,exynos5250-fimd"; 93279377Simp interrupt-parent = <&combiner>; 94279377Simp reg = <0x14400000 0x40000>; 95279377Simp interrupt-names = "fifo", "vsync", "lcd_sys"; 96279377Simp interrupts = <18 4>, <18 5>, <18 6>; 97279377Simp samsung,sysreg = <&sysreg_system_controller>; 98279377Simp status = "disabled"; 99279377Simp }; 100279377Simp 101279377Simp dp-controller@145B0000 { 102279377Simp compatible = "samsung,exynos5-dp"; 103279377Simp reg = <0x145B0000 0x1000>; 104279377Simp interrupts = <10 3>; 105279377Simp interrupt-parent = <&combiner>; 106279377Simp #address-cells = <1>; 107279377Simp #size-cells = <0>; 108279377Simp status = "disabled"; 109279377Simp }; 110279377Simp}; 111