exynos4.dtsi revision 295436
1279377Simp/* 2279377Simp * Samsung's Exynos4 SoC series common device tree source 3279377Simp * 4279377Simp * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 5279377Simp * http://www.samsung.com 6279377Simp * Copyright (c) 2010-2011 Linaro Ltd. 7279377Simp * www.linaro.org 8279377Simp * 9279377Simp * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular 10279377Simp * SoCs from Exynos4 series can include this file and provide values for SoCs 11279377Simp * specfic bindings. 12279377Simp * 13279377Simp * Note: This file does not include device nodes for all the controllers in 14279377Simp * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional 15279377Simp * nodes can be added to this file. 16279377Simp * 17279377Simp * This program is free software; you can redistribute it and/or modify 18279377Simp * it under the terms of the GNU General Public License version 2 as 19279377Simp * published by the Free Software Foundation. 20279377Simp */ 21279377Simp 22279377Simp#include <dt-bindings/clock/exynos4.h> 23279377Simp#include <dt-bindings/clock/exynos-audss-clk.h> 24279377Simp#include "skeleton.dtsi" 25279377Simp 26279377Simp/ { 27279377Simp interrupt-parent = <&gic>; 28279377Simp 29279377Simp aliases { 30279377Simp spi0 = &spi_0; 31279377Simp spi1 = &spi_1; 32279377Simp spi2 = &spi_2; 33279377Simp i2c0 = &i2c_0; 34279377Simp i2c1 = &i2c_1; 35279377Simp i2c2 = &i2c_2; 36279377Simp i2c3 = &i2c_3; 37279377Simp i2c4 = &i2c_4; 38279377Simp i2c5 = &i2c_5; 39279377Simp i2c6 = &i2c_6; 40279377Simp i2c7 = &i2c_7; 41295436Sandrew i2c8 = &i2c_8; 42279377Simp csis0 = &csis_0; 43279377Simp csis1 = &csis_1; 44279377Simp fimc0 = &fimc_0; 45279377Simp fimc1 = &fimc_1; 46279377Simp fimc2 = &fimc_2; 47279377Simp fimc3 = &fimc_3; 48279377Simp serial0 = &serial_0; 49279377Simp serial1 = &serial_1; 50279377Simp serial2 = &serial_2; 51279377Simp serial3 = &serial_3; 52279377Simp }; 53279377Simp 54279377Simp clock_audss: clock-controller@03810000 { 55279377Simp compatible = "samsung,exynos4210-audss-clock"; 56279377Simp reg = <0x03810000 0x0C>; 57279377Simp #clock-cells = <1>; 58279377Simp }; 59279377Simp 60279377Simp i2s0: i2s@03830000 { 61279377Simp compatible = "samsung,s5pv210-i2s"; 62279377Simp reg = <0x03830000 0x100>; 63279377Simp clocks = <&clock_audss EXYNOS_I2S_BUS>; 64279377Simp clock-names = "iis"; 65279377Simp #clock-cells = <1>; 66279377Simp clock-output-names = "i2s_cdclk0"; 67279377Simp dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>; 68279377Simp dma-names = "tx", "rx", "tx-sec"; 69279377Simp samsung,idma-addr = <0x03000000>; 70279377Simp #sound-dai-cells = <1>; 71279377Simp status = "disabled"; 72279377Simp }; 73279377Simp 74279377Simp chipid@10000000 { 75279377Simp compatible = "samsung,exynos4210-chipid"; 76279377Simp reg = <0x10000000 0x100>; 77279377Simp }; 78279377Simp 79279377Simp mipi_phy: video-phy@10020710 { 80279377Simp compatible = "samsung,s5pv210-mipi-video-phy"; 81279377Simp #phy-cells = <1>; 82279377Simp syscon = <&pmu_system_controller>; 83279377Simp }; 84279377Simp 85279377Simp pd_mfc: mfc-power-domain@10023C40 { 86279377Simp compatible = "samsung,exynos4210-pd"; 87279377Simp reg = <0x10023C40 0x20>; 88279377Simp #power-domain-cells = <0>; 89279377Simp }; 90279377Simp 91279377Simp pd_g3d: g3d-power-domain@10023C60 { 92279377Simp compatible = "samsung,exynos4210-pd"; 93279377Simp reg = <0x10023C60 0x20>; 94279377Simp #power-domain-cells = <0>; 95279377Simp }; 96279377Simp 97279377Simp pd_lcd0: lcd0-power-domain@10023C80 { 98279377Simp compatible = "samsung,exynos4210-pd"; 99279377Simp reg = <0x10023C80 0x20>; 100279377Simp #power-domain-cells = <0>; 101279377Simp }; 102279377Simp 103279377Simp pd_tv: tv-power-domain@10023C20 { 104279377Simp compatible = "samsung,exynos4210-pd"; 105279377Simp reg = <0x10023C20 0x20>; 106279377Simp #power-domain-cells = <0>; 107295436Sandrew power-domains = <&pd_lcd0>; 108279377Simp }; 109279377Simp 110279377Simp pd_cam: cam-power-domain@10023C00 { 111279377Simp compatible = "samsung,exynos4210-pd"; 112279377Simp reg = <0x10023C00 0x20>; 113279377Simp #power-domain-cells = <0>; 114279377Simp }; 115279377Simp 116279377Simp pd_gps: gps-power-domain@10023CE0 { 117279377Simp compatible = "samsung,exynos4210-pd"; 118279377Simp reg = <0x10023CE0 0x20>; 119279377Simp #power-domain-cells = <0>; 120279377Simp }; 121279377Simp 122279377Simp pd_gps_alive: gps-alive-power-domain@10023D00 { 123279377Simp compatible = "samsung,exynos4210-pd"; 124279377Simp reg = <0x10023D00 0x20>; 125279377Simp #power-domain-cells = <0>; 126279377Simp }; 127279377Simp 128279377Simp gic: interrupt-controller@10490000 { 129279377Simp compatible = "arm,cortex-a9-gic"; 130279377Simp #interrupt-cells = <3>; 131279377Simp interrupt-controller; 132279377Simp reg = <0x10490000 0x10000>, <0x10480000 0x10000>; 133279377Simp }; 134279377Simp 135279377Simp combiner: interrupt-controller@10440000 { 136279377Simp compatible = "samsung,exynos4210-combiner"; 137279377Simp #interrupt-cells = <2>; 138279377Simp interrupt-controller; 139279377Simp reg = <0x10440000 0x1000>; 140279377Simp }; 141279377Simp 142279377Simp pmu { 143279377Simp compatible = "arm,cortex-a9-pmu"; 144279377Simp interrupt-parent = <&combiner>; 145279377Simp interrupts = <2 2>, <3 2>; 146279377Simp }; 147279377Simp 148279377Simp sys_reg: syscon@10010000 { 149279377Simp compatible = "samsung,exynos4-sysreg", "syscon"; 150279377Simp reg = <0x10010000 0x400>; 151279377Simp }; 152279377Simp 153279377Simp pmu_system_controller: system-controller@10020000 { 154279377Simp compatible = "samsung,exynos4210-pmu", "syscon"; 155279377Simp reg = <0x10020000 0x4000>; 156295436Sandrew interrupt-controller; 157295436Sandrew #interrupt-cells = <3>; 158295436Sandrew interrupt-parent = <&gic>; 159279377Simp }; 160279377Simp 161295436Sandrew poweroff: syscon-poweroff { 162295436Sandrew compatible = "syscon-poweroff"; 163295436Sandrew regmap = <&pmu_system_controller>; 164295436Sandrew offset = <0x330C>; /* PS_HOLD_CONTROL */ 165295436Sandrew mask = <0x5200>; /* reset value */ 166295436Sandrew }; 167295436Sandrew 168295436Sandrew reboot: syscon-reboot { 169295436Sandrew compatible = "syscon-reboot"; 170295436Sandrew regmap = <&pmu_system_controller>; 171295436Sandrew offset = <0x0400>; /* SWRESET */ 172295436Sandrew mask = <0x1>; 173295436Sandrew }; 174295436Sandrew 175279377Simp dsi_0: dsi@11C80000 { 176279377Simp compatible = "samsung,exynos4210-mipi-dsi"; 177279377Simp reg = <0x11C80000 0x10000>; 178279377Simp interrupts = <0 79 0>; 179279377Simp power-domains = <&pd_lcd0>; 180279377Simp phys = <&mipi_phy 1>; 181279377Simp phy-names = "dsim"; 182279377Simp clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; 183295436Sandrew clock-names = "bus_clk", "sclk_mipi"; 184279377Simp status = "disabled"; 185279377Simp #address-cells = <1>; 186279377Simp #size-cells = <0>; 187279377Simp }; 188279377Simp 189279377Simp camera { 190279377Simp compatible = "samsung,fimc", "simple-bus"; 191279377Simp status = "disabled"; 192279377Simp #address-cells = <1>; 193279377Simp #size-cells = <1>; 194279377Simp #clock-cells = <1>; 195279377Simp clock-output-names = "cam_a_clkout", "cam_b_clkout"; 196279377Simp ranges; 197279377Simp 198279377Simp fimc_0: fimc@11800000 { 199279377Simp compatible = "samsung,exynos4210-fimc"; 200279377Simp reg = <0x11800000 0x1000>; 201279377Simp interrupts = <0 84 0>; 202279377Simp clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; 203279377Simp clock-names = "fimc", "sclk_fimc"; 204279377Simp power-domains = <&pd_cam>; 205279377Simp samsung,sysreg = <&sys_reg>; 206295436Sandrew iommus = <&sysmmu_fimc0>; 207279377Simp status = "disabled"; 208279377Simp }; 209279377Simp 210279377Simp fimc_1: fimc@11810000 { 211279377Simp compatible = "samsung,exynos4210-fimc"; 212279377Simp reg = <0x11810000 0x1000>; 213279377Simp interrupts = <0 85 0>; 214279377Simp clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; 215279377Simp clock-names = "fimc", "sclk_fimc"; 216279377Simp power-domains = <&pd_cam>; 217279377Simp samsung,sysreg = <&sys_reg>; 218295436Sandrew iommus = <&sysmmu_fimc1>; 219279377Simp status = "disabled"; 220279377Simp }; 221279377Simp 222279377Simp fimc_2: fimc@11820000 { 223279377Simp compatible = "samsung,exynos4210-fimc"; 224279377Simp reg = <0x11820000 0x1000>; 225279377Simp interrupts = <0 86 0>; 226279377Simp clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; 227279377Simp clock-names = "fimc", "sclk_fimc"; 228279377Simp power-domains = <&pd_cam>; 229279377Simp samsung,sysreg = <&sys_reg>; 230295436Sandrew iommus = <&sysmmu_fimc2>; 231279377Simp status = "disabled"; 232279377Simp }; 233279377Simp 234279377Simp fimc_3: fimc@11830000 { 235279377Simp compatible = "samsung,exynos4210-fimc"; 236279377Simp reg = <0x11830000 0x1000>; 237279377Simp interrupts = <0 87 0>; 238279377Simp clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; 239279377Simp clock-names = "fimc", "sclk_fimc"; 240279377Simp power-domains = <&pd_cam>; 241279377Simp samsung,sysreg = <&sys_reg>; 242295436Sandrew iommus = <&sysmmu_fimc3>; 243279377Simp status = "disabled"; 244279377Simp }; 245279377Simp 246279377Simp csis_0: csis@11880000 { 247279377Simp compatible = "samsung,exynos4210-csis"; 248279377Simp reg = <0x11880000 0x4000>; 249279377Simp interrupts = <0 78 0>; 250279377Simp clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; 251279377Simp clock-names = "csis", "sclk_csis"; 252279377Simp bus-width = <4>; 253279377Simp power-domains = <&pd_cam>; 254279377Simp phys = <&mipi_phy 0>; 255279377Simp phy-names = "csis"; 256279377Simp status = "disabled"; 257279377Simp #address-cells = <1>; 258279377Simp #size-cells = <0>; 259279377Simp }; 260279377Simp 261279377Simp csis_1: csis@11890000 { 262279377Simp compatible = "samsung,exynos4210-csis"; 263279377Simp reg = <0x11890000 0x4000>; 264279377Simp interrupts = <0 80 0>; 265279377Simp clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; 266279377Simp clock-names = "csis", "sclk_csis"; 267279377Simp bus-width = <2>; 268279377Simp power-domains = <&pd_cam>; 269279377Simp phys = <&mipi_phy 2>; 270279377Simp phy-names = "csis"; 271279377Simp status = "disabled"; 272279377Simp #address-cells = <1>; 273279377Simp #size-cells = <0>; 274279377Simp }; 275279377Simp }; 276279377Simp 277295436Sandrew watchdog: watchdog@10060000 { 278279377Simp compatible = "samsung,s3c2410-wdt"; 279279377Simp reg = <0x10060000 0x100>; 280279377Simp interrupts = <0 43 0>; 281279377Simp clocks = <&clock CLK_WDT>; 282279377Simp clock-names = "watchdog"; 283279377Simp status = "disabled"; 284279377Simp }; 285279377Simp 286295436Sandrew rtc: rtc@10070000 { 287279377Simp compatible = "samsung,s3c6410-rtc"; 288279377Simp reg = <0x10070000 0x100>; 289295436Sandrew interrupt-parent = <&pmu_system_controller>; 290279377Simp interrupts = <0 44 0>, <0 45 0>; 291279377Simp clocks = <&clock CLK_RTC>; 292279377Simp clock-names = "rtc"; 293279377Simp status = "disabled"; 294279377Simp }; 295279377Simp 296295436Sandrew keypad: keypad@100A0000 { 297279377Simp compatible = "samsung,s5pv210-keypad"; 298279377Simp reg = <0x100A0000 0x100>; 299279377Simp interrupts = <0 109 0>; 300279377Simp clocks = <&clock CLK_KEYIF>; 301279377Simp clock-names = "keypad"; 302279377Simp status = "disabled"; 303279377Simp }; 304279377Simp 305295436Sandrew sdhci_0: sdhci@12510000 { 306279377Simp compatible = "samsung,exynos4210-sdhci"; 307279377Simp reg = <0x12510000 0x100>; 308279377Simp interrupts = <0 73 0>; 309279377Simp clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; 310279377Simp clock-names = "hsmmc", "mmc_busclk.2"; 311279377Simp status = "disabled"; 312279377Simp }; 313279377Simp 314295436Sandrew sdhci_1: sdhci@12520000 { 315279377Simp compatible = "samsung,exynos4210-sdhci"; 316279377Simp reg = <0x12520000 0x100>; 317279377Simp interrupts = <0 74 0>; 318279377Simp clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; 319279377Simp clock-names = "hsmmc", "mmc_busclk.2"; 320279377Simp status = "disabled"; 321279377Simp }; 322279377Simp 323295436Sandrew sdhci_2: sdhci@12530000 { 324279377Simp compatible = "samsung,exynos4210-sdhci"; 325279377Simp reg = <0x12530000 0x100>; 326279377Simp interrupts = <0 75 0>; 327279377Simp clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; 328279377Simp clock-names = "hsmmc", "mmc_busclk.2"; 329279377Simp status = "disabled"; 330279377Simp }; 331279377Simp 332295436Sandrew sdhci_3: sdhci@12540000 { 333279377Simp compatible = "samsung,exynos4210-sdhci"; 334279377Simp reg = <0x12540000 0x100>; 335279377Simp interrupts = <0 76 0>; 336279377Simp clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; 337279377Simp clock-names = "hsmmc", "mmc_busclk.2"; 338279377Simp status = "disabled"; 339279377Simp }; 340279377Simp 341279377Simp exynos_usbphy: exynos-usbphy@125B0000 { 342279377Simp compatible = "samsung,exynos4210-usb2-phy"; 343279377Simp reg = <0x125B0000 0x100>; 344279377Simp samsung,pmureg-phandle = <&pmu_system_controller>; 345279377Simp clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>; 346279377Simp clock-names = "phy", "ref"; 347279377Simp #phy-cells = <1>; 348279377Simp status = "disabled"; 349279377Simp }; 350279377Simp 351295436Sandrew hsotg: hsotg@12480000 { 352279377Simp compatible = "samsung,s3c6400-hsotg"; 353279377Simp reg = <0x12480000 0x20000>; 354279377Simp interrupts = <0 71 0>; 355279377Simp clocks = <&clock CLK_USB_DEVICE>; 356279377Simp clock-names = "otg"; 357279377Simp phys = <&exynos_usbphy 0>; 358279377Simp phy-names = "usb2-phy"; 359279377Simp status = "disabled"; 360279377Simp }; 361279377Simp 362295436Sandrew ehci: ehci@12580000 { 363279377Simp compatible = "samsung,exynos4210-ehci"; 364279377Simp reg = <0x12580000 0x100>; 365279377Simp interrupts = <0 70 0>; 366279377Simp clocks = <&clock CLK_USB_HOST>; 367279377Simp clock-names = "usbhost"; 368279377Simp status = "disabled"; 369279377Simp #address-cells = <1>; 370279377Simp #size-cells = <0>; 371279377Simp port@0 { 372279377Simp reg = <0>; 373279377Simp phys = <&exynos_usbphy 1>; 374279377Simp status = "disabled"; 375279377Simp }; 376279377Simp port@1 { 377279377Simp reg = <1>; 378279377Simp phys = <&exynos_usbphy 2>; 379279377Simp status = "disabled"; 380279377Simp }; 381279377Simp port@2 { 382279377Simp reg = <2>; 383279377Simp phys = <&exynos_usbphy 3>; 384279377Simp status = "disabled"; 385279377Simp }; 386279377Simp }; 387279377Simp 388295436Sandrew ohci: ohci@12590000 { 389279377Simp compatible = "samsung,exynos4210-ohci"; 390279377Simp reg = <0x12590000 0x100>; 391279377Simp interrupts = <0 70 0>; 392279377Simp clocks = <&clock CLK_USB_HOST>; 393279377Simp clock-names = "usbhost"; 394279377Simp status = "disabled"; 395279377Simp #address-cells = <1>; 396279377Simp #size-cells = <0>; 397279377Simp port@0 { 398279377Simp reg = <0>; 399279377Simp phys = <&exynos_usbphy 1>; 400279377Simp status = "disabled"; 401279377Simp }; 402279377Simp }; 403279377Simp 404279377Simp i2s1: i2s@13960000 { 405279377Simp compatible = "samsung,s3c6410-i2s"; 406279377Simp reg = <0x13960000 0x100>; 407279377Simp clocks = <&clock CLK_I2S1>; 408279377Simp clock-names = "iis"; 409279377Simp #clock-cells = <1>; 410279377Simp clock-output-names = "i2s_cdclk1"; 411279377Simp dmas = <&pdma1 12>, <&pdma1 11>; 412279377Simp dma-names = "tx", "rx"; 413279377Simp #sound-dai-cells = <1>; 414279377Simp status = "disabled"; 415279377Simp }; 416279377Simp 417279377Simp i2s2: i2s@13970000 { 418279377Simp compatible = "samsung,s3c6410-i2s"; 419279377Simp reg = <0x13970000 0x100>; 420279377Simp clocks = <&clock CLK_I2S2>; 421279377Simp clock-names = "iis"; 422279377Simp #clock-cells = <1>; 423279377Simp clock-output-names = "i2s_cdclk2"; 424279377Simp dmas = <&pdma0 14>, <&pdma0 13>; 425279377Simp dma-names = "tx", "rx"; 426279377Simp #sound-dai-cells = <1>; 427279377Simp status = "disabled"; 428279377Simp }; 429279377Simp 430279377Simp mfc: codec@13400000 { 431279377Simp compatible = "samsung,mfc-v5"; 432279377Simp reg = <0x13400000 0x10000>; 433279377Simp interrupts = <0 94 0>; 434279377Simp power-domains = <&pd_mfc>; 435279377Simp clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; 436279377Simp clock-names = "mfc", "sclk_mfc"; 437295436Sandrew iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>; 438295436Sandrew iommu-names = "left", "right"; 439279377Simp status = "disabled"; 440279377Simp }; 441279377Simp 442279377Simp serial_0: serial@13800000 { 443279377Simp compatible = "samsung,exynos4210-uart"; 444279377Simp reg = <0x13800000 0x100>; 445279377Simp interrupts = <0 52 0>; 446279377Simp clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; 447279377Simp clock-names = "uart", "clk_uart_baud0"; 448295436Sandrew dmas = <&pdma0 15>, <&pdma0 16>; 449295436Sandrew dma-names = "rx", "tx"; 450279377Simp status = "disabled"; 451279377Simp }; 452279377Simp 453279377Simp serial_1: serial@13810000 { 454279377Simp compatible = "samsung,exynos4210-uart"; 455279377Simp reg = <0x13810000 0x100>; 456279377Simp interrupts = <0 53 0>; 457279377Simp clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; 458279377Simp clock-names = "uart", "clk_uart_baud0"; 459295436Sandrew dmas = <&pdma1 15>, <&pdma1 16>; 460295436Sandrew dma-names = "rx", "tx"; 461279377Simp status = "disabled"; 462279377Simp }; 463279377Simp 464279377Simp serial_2: serial@13820000 { 465279377Simp compatible = "samsung,exynos4210-uart"; 466279377Simp reg = <0x13820000 0x100>; 467279377Simp interrupts = <0 54 0>; 468279377Simp clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; 469279377Simp clock-names = "uart", "clk_uart_baud0"; 470295436Sandrew dmas = <&pdma0 17>, <&pdma0 18>; 471295436Sandrew dma-names = "rx", "tx"; 472279377Simp status = "disabled"; 473279377Simp }; 474279377Simp 475279377Simp serial_3: serial@13830000 { 476279377Simp compatible = "samsung,exynos4210-uart"; 477279377Simp reg = <0x13830000 0x100>; 478279377Simp interrupts = <0 55 0>; 479279377Simp clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; 480279377Simp clock-names = "uart", "clk_uart_baud0"; 481295436Sandrew dmas = <&pdma1 17>, <&pdma1 18>; 482295436Sandrew dma-names = "rx", "tx"; 483279377Simp status = "disabled"; 484279377Simp }; 485279377Simp 486279377Simp i2c_0: i2c@13860000 { 487279377Simp #address-cells = <1>; 488279377Simp #size-cells = <0>; 489279377Simp compatible = "samsung,s3c2440-i2c"; 490279377Simp reg = <0x13860000 0x100>; 491279377Simp interrupts = <0 58 0>; 492279377Simp clocks = <&clock CLK_I2C0>; 493279377Simp clock-names = "i2c"; 494279377Simp pinctrl-names = "default"; 495279377Simp pinctrl-0 = <&i2c0_bus>; 496279377Simp status = "disabled"; 497279377Simp }; 498279377Simp 499279377Simp i2c_1: i2c@13870000 { 500279377Simp #address-cells = <1>; 501279377Simp #size-cells = <0>; 502279377Simp compatible = "samsung,s3c2440-i2c"; 503279377Simp reg = <0x13870000 0x100>; 504279377Simp interrupts = <0 59 0>; 505279377Simp clocks = <&clock CLK_I2C1>; 506279377Simp clock-names = "i2c"; 507279377Simp pinctrl-names = "default"; 508279377Simp pinctrl-0 = <&i2c1_bus>; 509279377Simp status = "disabled"; 510279377Simp }; 511279377Simp 512279377Simp i2c_2: i2c@13880000 { 513279377Simp #address-cells = <1>; 514279377Simp #size-cells = <0>; 515279377Simp compatible = "samsung,s3c2440-i2c"; 516279377Simp reg = <0x13880000 0x100>; 517279377Simp interrupts = <0 60 0>; 518279377Simp clocks = <&clock CLK_I2C2>; 519279377Simp clock-names = "i2c"; 520279377Simp pinctrl-names = "default"; 521279377Simp pinctrl-0 = <&i2c2_bus>; 522279377Simp status = "disabled"; 523279377Simp }; 524279377Simp 525279377Simp i2c_3: i2c@13890000 { 526279377Simp #address-cells = <1>; 527279377Simp #size-cells = <0>; 528279377Simp compatible = "samsung,s3c2440-i2c"; 529279377Simp reg = <0x13890000 0x100>; 530279377Simp interrupts = <0 61 0>; 531279377Simp clocks = <&clock CLK_I2C3>; 532279377Simp clock-names = "i2c"; 533279377Simp pinctrl-names = "default"; 534279377Simp pinctrl-0 = <&i2c3_bus>; 535279377Simp status = "disabled"; 536279377Simp }; 537279377Simp 538279377Simp i2c_4: i2c@138A0000 { 539279377Simp #address-cells = <1>; 540279377Simp #size-cells = <0>; 541279377Simp compatible = "samsung,s3c2440-i2c"; 542279377Simp reg = <0x138A0000 0x100>; 543279377Simp interrupts = <0 62 0>; 544279377Simp clocks = <&clock CLK_I2C4>; 545279377Simp clock-names = "i2c"; 546279377Simp pinctrl-names = "default"; 547279377Simp pinctrl-0 = <&i2c4_bus>; 548279377Simp status = "disabled"; 549279377Simp }; 550279377Simp 551279377Simp i2c_5: i2c@138B0000 { 552279377Simp #address-cells = <1>; 553279377Simp #size-cells = <0>; 554279377Simp compatible = "samsung,s3c2440-i2c"; 555279377Simp reg = <0x138B0000 0x100>; 556279377Simp interrupts = <0 63 0>; 557279377Simp clocks = <&clock CLK_I2C5>; 558279377Simp clock-names = "i2c"; 559279377Simp pinctrl-names = "default"; 560279377Simp pinctrl-0 = <&i2c5_bus>; 561279377Simp status = "disabled"; 562279377Simp }; 563279377Simp 564279377Simp i2c_6: i2c@138C0000 { 565279377Simp #address-cells = <1>; 566279377Simp #size-cells = <0>; 567279377Simp compatible = "samsung,s3c2440-i2c"; 568279377Simp reg = <0x138C0000 0x100>; 569279377Simp interrupts = <0 64 0>; 570279377Simp clocks = <&clock CLK_I2C6>; 571279377Simp clock-names = "i2c"; 572279377Simp pinctrl-names = "default"; 573279377Simp pinctrl-0 = <&i2c6_bus>; 574279377Simp status = "disabled"; 575279377Simp }; 576279377Simp 577279377Simp i2c_7: i2c@138D0000 { 578279377Simp #address-cells = <1>; 579279377Simp #size-cells = <0>; 580279377Simp compatible = "samsung,s3c2440-i2c"; 581279377Simp reg = <0x138D0000 0x100>; 582279377Simp interrupts = <0 65 0>; 583279377Simp clocks = <&clock CLK_I2C7>; 584279377Simp clock-names = "i2c"; 585279377Simp pinctrl-names = "default"; 586279377Simp pinctrl-0 = <&i2c7_bus>; 587279377Simp status = "disabled"; 588279377Simp }; 589279377Simp 590295436Sandrew i2c_8: i2c@138E0000 { 591295436Sandrew #address-cells = <1>; 592295436Sandrew #size-cells = <0>; 593295436Sandrew compatible = "samsung,s3c2440-hdmiphy-i2c"; 594295436Sandrew reg = <0x138E0000 0x100>; 595295436Sandrew interrupts = <0 93 0>; 596295436Sandrew clocks = <&clock CLK_I2C_HDMI>; 597295436Sandrew clock-names = "i2c"; 598295436Sandrew status = "disabled"; 599295436Sandrew 600295436Sandrew hdmi_i2c_phy: hdmiphy@38 { 601295436Sandrew compatible = "exynos4210-hdmiphy"; 602295436Sandrew reg = <0x38>; 603295436Sandrew }; 604295436Sandrew }; 605295436Sandrew 606279377Simp spi_0: spi@13920000 { 607279377Simp compatible = "samsung,exynos4210-spi"; 608279377Simp reg = <0x13920000 0x100>; 609279377Simp interrupts = <0 66 0>; 610279377Simp dmas = <&pdma0 7>, <&pdma0 6>; 611279377Simp dma-names = "tx", "rx"; 612279377Simp #address-cells = <1>; 613279377Simp #size-cells = <0>; 614279377Simp clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; 615279377Simp clock-names = "spi", "spi_busclk0"; 616279377Simp pinctrl-names = "default"; 617279377Simp pinctrl-0 = <&spi0_bus>; 618279377Simp status = "disabled"; 619279377Simp }; 620279377Simp 621279377Simp spi_1: spi@13930000 { 622279377Simp compatible = "samsung,exynos4210-spi"; 623279377Simp reg = <0x13930000 0x100>; 624279377Simp interrupts = <0 67 0>; 625279377Simp dmas = <&pdma1 7>, <&pdma1 6>; 626279377Simp dma-names = "tx", "rx"; 627279377Simp #address-cells = <1>; 628279377Simp #size-cells = <0>; 629279377Simp clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; 630279377Simp clock-names = "spi", "spi_busclk0"; 631279377Simp pinctrl-names = "default"; 632279377Simp pinctrl-0 = <&spi1_bus>; 633279377Simp status = "disabled"; 634279377Simp }; 635279377Simp 636279377Simp spi_2: spi@13940000 { 637279377Simp compatible = "samsung,exynos4210-spi"; 638279377Simp reg = <0x13940000 0x100>; 639279377Simp interrupts = <0 68 0>; 640279377Simp dmas = <&pdma0 9>, <&pdma0 8>; 641279377Simp dma-names = "tx", "rx"; 642279377Simp #address-cells = <1>; 643279377Simp #size-cells = <0>; 644279377Simp clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; 645279377Simp clock-names = "spi", "spi_busclk0"; 646279377Simp pinctrl-names = "default"; 647279377Simp pinctrl-0 = <&spi2_bus>; 648279377Simp status = "disabled"; 649279377Simp }; 650279377Simp 651295436Sandrew pwm: pwm@139D0000 { 652279377Simp compatible = "samsung,exynos4210-pwm"; 653279377Simp reg = <0x139D0000 0x1000>; 654279377Simp interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; 655279377Simp clocks = <&clock CLK_PWM>; 656279377Simp clock-names = "timers"; 657279377Simp #pwm-cells = <3>; 658279377Simp status = "disabled"; 659279377Simp }; 660279377Simp 661279377Simp amba { 662279377Simp #address-cells = <1>; 663279377Simp #size-cells = <1>; 664279377Simp compatible = "arm,amba-bus"; 665279377Simp interrupt-parent = <&gic>; 666279377Simp ranges; 667279377Simp 668279377Simp pdma0: pdma@12680000 { 669279377Simp compatible = "arm,pl330", "arm,primecell"; 670279377Simp reg = <0x12680000 0x1000>; 671279377Simp interrupts = <0 35 0>; 672279377Simp clocks = <&clock CLK_PDMA0>; 673279377Simp clock-names = "apb_pclk"; 674279377Simp #dma-cells = <1>; 675279377Simp #dma-channels = <8>; 676279377Simp #dma-requests = <32>; 677279377Simp }; 678279377Simp 679279377Simp pdma1: pdma@12690000 { 680279377Simp compatible = "arm,pl330", "arm,primecell"; 681279377Simp reg = <0x12690000 0x1000>; 682279377Simp interrupts = <0 36 0>; 683279377Simp clocks = <&clock CLK_PDMA1>; 684279377Simp clock-names = "apb_pclk"; 685279377Simp #dma-cells = <1>; 686279377Simp #dma-channels = <8>; 687279377Simp #dma-requests = <32>; 688279377Simp }; 689279377Simp 690279377Simp mdma1: mdma@12850000 { 691279377Simp compatible = "arm,pl330", "arm,primecell"; 692279377Simp reg = <0x12850000 0x1000>; 693279377Simp interrupts = <0 34 0>; 694279377Simp clocks = <&clock CLK_MDMA>; 695279377Simp clock-names = "apb_pclk"; 696279377Simp #dma-cells = <1>; 697279377Simp #dma-channels = <8>; 698279377Simp #dma-requests = <1>; 699279377Simp }; 700279377Simp }; 701279377Simp 702279377Simp fimd: fimd@11c00000 { 703279377Simp compatible = "samsung,exynos4210-fimd"; 704279377Simp interrupt-parent = <&combiner>; 705279377Simp reg = <0x11c00000 0x20000>; 706279377Simp interrupt-names = "fifo", "vsync", "lcd_sys"; 707279377Simp interrupts = <11 0>, <11 1>, <11 2>; 708279377Simp clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; 709279377Simp clock-names = "sclk_fimd", "fimd"; 710279377Simp power-domains = <&pd_lcd0>; 711295436Sandrew iommus = <&sysmmu_fimd0>; 712279377Simp samsung,sysreg = <&sys_reg>; 713279377Simp status = "disabled"; 714279377Simp }; 715279377Simp 716295436Sandrew tmu: tmu@100C0000 { 717295436Sandrew #include "exynos4412-tmu-sensor-conf.dtsi" 718295436Sandrew }; 719295436Sandrew 720295436Sandrew jpeg_codec: jpeg-codec@11840000 { 721295436Sandrew compatible = "samsung,exynos4210-jpeg"; 722295436Sandrew reg = <0x11840000 0x1000>; 723295436Sandrew interrupts = <0 88 0>; 724295436Sandrew clocks = <&clock CLK_JPEG>; 725295436Sandrew clock-names = "jpeg"; 726295436Sandrew power-domains = <&pd_cam>; 727295436Sandrew iommus = <&sysmmu_jpeg>; 728295436Sandrew }; 729295436Sandrew 730295436Sandrew rotator: rotator@12810000 { 731295436Sandrew compatible = "samsung,exynos4210-rotator"; 732295436Sandrew reg = <0x12810000 0x64>; 733295436Sandrew interrupts = <0 83 0>; 734295436Sandrew clocks = <&clock CLK_ROTATOR>; 735295436Sandrew clock-names = "rotator"; 736295436Sandrew iommus = <&sysmmu_rotator>; 737295436Sandrew }; 738295436Sandrew 739295436Sandrew hdmi: hdmi@12D00000 { 740295436Sandrew compatible = "samsung,exynos4210-hdmi"; 741295436Sandrew reg = <0x12D00000 0x70000>; 742295436Sandrew interrupts = <0 92 0>; 743295436Sandrew clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy", 744295436Sandrew "mout_hdmi"; 745295436Sandrew clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 746295436Sandrew <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, 747295436Sandrew <&clock CLK_MOUT_HDMI>; 748295436Sandrew phy = <&hdmi_i2c_phy>; 749295436Sandrew power-domains = <&pd_tv>; 750295436Sandrew samsung,syscon-phandle = <&pmu_system_controller>; 751295436Sandrew status = "disabled"; 752295436Sandrew }; 753295436Sandrew 754295436Sandrew mixer: mixer@12C10000 { 755295436Sandrew compatible = "samsung,exynos4210-mixer"; 756295436Sandrew interrupts = <0 91 0>; 757295436Sandrew reg = <0x12C10000 0x2100>, <0x12c00000 0x300>; 758295436Sandrew power-domains = <&pd_tv>; 759295436Sandrew iommus = <&sysmmu_tv>; 760295436Sandrew status = "disabled"; 761295436Sandrew }; 762295436Sandrew 763279377Simp ppmu_dmc0: ppmu_dmc0@106a0000 { 764279377Simp compatible = "samsung,exynos-ppmu"; 765279377Simp reg = <0x106a0000 0x2000>; 766279377Simp clocks = <&clock CLK_PPMUDMC0>; 767279377Simp clock-names = "ppmu"; 768279377Simp status = "disabled"; 769279377Simp }; 770279377Simp 771279377Simp ppmu_dmc1: ppmu_dmc1@106b0000 { 772279377Simp compatible = "samsung,exynos-ppmu"; 773279377Simp reg = <0x106b0000 0x2000>; 774279377Simp clocks = <&clock CLK_PPMUDMC1>; 775279377Simp clock-names = "ppmu"; 776279377Simp status = "disabled"; 777279377Simp }; 778279377Simp 779279377Simp ppmu_cpu: ppmu_cpu@106c0000 { 780279377Simp compatible = "samsung,exynos-ppmu"; 781279377Simp reg = <0x106c0000 0x2000>; 782279377Simp clocks = <&clock CLK_PPMUCPU>; 783279377Simp clock-names = "ppmu"; 784279377Simp status = "disabled"; 785279377Simp }; 786279377Simp 787279377Simp ppmu_acp: ppmu_acp@10ae0000 { 788279377Simp compatible = "samsung,exynos-ppmu"; 789279377Simp reg = <0x106e0000 0x2000>; 790279377Simp status = "disabled"; 791279377Simp }; 792279377Simp 793279377Simp ppmu_rightbus: ppmu_rightbus@112a0000 { 794279377Simp compatible = "samsung,exynos-ppmu"; 795279377Simp reg = <0x112a0000 0x2000>; 796279377Simp clocks = <&clock CLK_PPMURIGHT>; 797279377Simp clock-names = "ppmu"; 798279377Simp status = "disabled"; 799279377Simp }; 800279377Simp 801279377Simp ppmu_leftbus: ppmu_leftbus0@116a0000 { 802279377Simp compatible = "samsung,exynos-ppmu"; 803279377Simp reg = <0x116a0000 0x2000>; 804279377Simp clocks = <&clock CLK_PPMULEFT>; 805279377Simp clock-names = "ppmu"; 806279377Simp status = "disabled"; 807279377Simp }; 808279377Simp 809279377Simp ppmu_camif: ppmu_camif@11ac0000 { 810279377Simp compatible = "samsung,exynos-ppmu"; 811279377Simp reg = <0x11ac0000 0x2000>; 812279377Simp clocks = <&clock CLK_PPMUCAMIF>; 813279377Simp clock-names = "ppmu"; 814279377Simp status = "disabled"; 815279377Simp }; 816279377Simp 817279377Simp ppmu_lcd0: ppmu_lcd0@11e40000 { 818279377Simp compatible = "samsung,exynos-ppmu"; 819279377Simp reg = <0x11e40000 0x2000>; 820279377Simp clocks = <&clock CLK_PPMULCD0>; 821279377Simp clock-names = "ppmu"; 822279377Simp status = "disabled"; 823279377Simp }; 824279377Simp 825279377Simp ppmu_fsys: ppmu_g3d@12630000 { 826279377Simp compatible = "samsung,exynos-ppmu"; 827279377Simp reg = <0x12630000 0x2000>; 828279377Simp status = "disabled"; 829279377Simp }; 830279377Simp 831279377Simp ppmu_image: ppmu_image@12aa0000 { 832279377Simp compatible = "samsung,exynos-ppmu"; 833279377Simp reg = <0x12aa0000 0x2000>; 834279377Simp clocks = <&clock CLK_PPMUIMAGE>; 835279377Simp clock-names = "ppmu"; 836279377Simp status = "disabled"; 837279377Simp }; 838279377Simp 839279377Simp ppmu_tv: ppmu_tv@12e40000 { 840279377Simp compatible = "samsung,exynos-ppmu"; 841279377Simp reg = <0x12e40000 0x2000>; 842279377Simp clocks = <&clock CLK_PPMUTV>; 843279377Simp clock-names = "ppmu"; 844279377Simp status = "disabled"; 845279377Simp }; 846279377Simp 847279377Simp ppmu_g3d: ppmu_g3d@13220000 { 848279377Simp compatible = "samsung,exynos-ppmu"; 849279377Simp reg = <0x13220000 0x2000>; 850279377Simp clocks = <&clock CLK_PPMUG3D>; 851279377Simp clock-names = "ppmu"; 852279377Simp status = "disabled"; 853279377Simp }; 854279377Simp 855279377Simp ppmu_mfc_left: ppmu_mfc_left@13660000 { 856279377Simp compatible = "samsung,exynos-ppmu"; 857279377Simp reg = <0x13660000 0x2000>; 858279377Simp clocks = <&clock CLK_PPMUMFC_L>; 859279377Simp clock-names = "ppmu"; 860279377Simp status = "disabled"; 861279377Simp }; 862279377Simp 863279377Simp ppmu_mfc_right: ppmu_mfc_right@13670000 { 864279377Simp compatible = "samsung,exynos-ppmu"; 865279377Simp reg = <0x13670000 0x2000>; 866279377Simp clocks = <&clock CLK_PPMUMFC_R>; 867279377Simp clock-names = "ppmu"; 868279377Simp status = "disabled"; 869279377Simp }; 870295436Sandrew 871295436Sandrew sysmmu_mfc_l: sysmmu@13620000 { 872295436Sandrew compatible = "samsung,exynos-sysmmu"; 873295436Sandrew reg = <0x13620000 0x1000>; 874295436Sandrew interrupt-parent = <&combiner>; 875295436Sandrew interrupts = <5 5>; 876295436Sandrew clock-names = "sysmmu", "master"; 877295436Sandrew clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>; 878295436Sandrew power-domains = <&pd_mfc>; 879295436Sandrew #iommu-cells = <0>; 880295436Sandrew }; 881295436Sandrew 882295436Sandrew sysmmu_mfc_r: sysmmu@13630000 { 883295436Sandrew compatible = "samsung,exynos-sysmmu"; 884295436Sandrew reg = <0x13630000 0x1000>; 885295436Sandrew interrupt-parent = <&combiner>; 886295436Sandrew interrupts = <5 6>; 887295436Sandrew clock-names = "sysmmu", "master"; 888295436Sandrew clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>; 889295436Sandrew power-domains = <&pd_mfc>; 890295436Sandrew #iommu-cells = <0>; 891295436Sandrew }; 892295436Sandrew 893295436Sandrew sysmmu_tv: sysmmu@12E20000 { 894295436Sandrew compatible = "samsung,exynos-sysmmu"; 895295436Sandrew reg = <0x12E20000 0x1000>; 896295436Sandrew interrupt-parent = <&combiner>; 897295436Sandrew interrupts = <5 4>; 898295436Sandrew clock-names = "sysmmu", "master"; 899295436Sandrew clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>; 900295436Sandrew power-domains = <&pd_tv>; 901295436Sandrew #iommu-cells = <0>; 902295436Sandrew }; 903295436Sandrew 904295436Sandrew sysmmu_fimc0: sysmmu@11A20000 { 905295436Sandrew compatible = "samsung,exynos-sysmmu"; 906295436Sandrew reg = <0x11A20000 0x1000>; 907295436Sandrew interrupt-parent = <&combiner>; 908295436Sandrew interrupts = <4 2>; 909295436Sandrew clock-names = "sysmmu", "master"; 910295436Sandrew clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>; 911295436Sandrew power-domains = <&pd_cam>; 912295436Sandrew #iommu-cells = <0>; 913295436Sandrew }; 914295436Sandrew 915295436Sandrew sysmmu_fimc1: sysmmu@11A30000 { 916295436Sandrew compatible = "samsung,exynos-sysmmu"; 917295436Sandrew reg = <0x11A30000 0x1000>; 918295436Sandrew interrupt-parent = <&combiner>; 919295436Sandrew interrupts = <4 3>; 920295436Sandrew clock-names = "sysmmu", "master"; 921295436Sandrew clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>; 922295436Sandrew power-domains = <&pd_cam>; 923295436Sandrew #iommu-cells = <0>; 924295436Sandrew }; 925295436Sandrew 926295436Sandrew sysmmu_fimc2: sysmmu@11A40000 { 927295436Sandrew compatible = "samsung,exynos-sysmmu"; 928295436Sandrew reg = <0x11A40000 0x1000>; 929295436Sandrew interrupt-parent = <&combiner>; 930295436Sandrew interrupts = <4 4>; 931295436Sandrew clock-names = "sysmmu", "master"; 932295436Sandrew clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>; 933295436Sandrew power-domains = <&pd_cam>; 934295436Sandrew #iommu-cells = <0>; 935295436Sandrew }; 936295436Sandrew 937295436Sandrew sysmmu_fimc3: sysmmu@11A50000 { 938295436Sandrew compatible = "samsung,exynos-sysmmu"; 939295436Sandrew reg = <0x11A50000 0x1000>; 940295436Sandrew interrupt-parent = <&combiner>; 941295436Sandrew interrupts = <4 5>; 942295436Sandrew clock-names = "sysmmu", "master"; 943295436Sandrew clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>; 944295436Sandrew power-domains = <&pd_cam>; 945295436Sandrew #iommu-cells = <0>; 946295436Sandrew }; 947295436Sandrew 948295436Sandrew sysmmu_jpeg: sysmmu@11A60000 { 949295436Sandrew compatible = "samsung,exynos-sysmmu"; 950295436Sandrew reg = <0x11A60000 0x1000>; 951295436Sandrew interrupt-parent = <&combiner>; 952295436Sandrew interrupts = <4 6>; 953295436Sandrew clock-names = "sysmmu", "master"; 954295436Sandrew clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>; 955295436Sandrew power-domains = <&pd_cam>; 956295436Sandrew #iommu-cells = <0>; 957295436Sandrew }; 958295436Sandrew 959295436Sandrew sysmmu_rotator: sysmmu@12A30000 { 960295436Sandrew compatible = "samsung,exynos-sysmmu"; 961295436Sandrew reg = <0x12A30000 0x1000>; 962295436Sandrew interrupt-parent = <&combiner>; 963295436Sandrew interrupts = <5 0>; 964295436Sandrew clock-names = "sysmmu", "master"; 965295436Sandrew clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>; 966295436Sandrew #iommu-cells = <0>; 967295436Sandrew }; 968295436Sandrew 969295436Sandrew sysmmu_fimd0: sysmmu@11E20000 { 970295436Sandrew compatible = "samsung,exynos-sysmmu"; 971295436Sandrew reg = <0x11E20000 0x1000>; 972295436Sandrew interrupt-parent = <&combiner>; 973295436Sandrew interrupts = <5 2>; 974295436Sandrew clock-names = "sysmmu", "master"; 975295436Sandrew clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>; 976295436Sandrew power-domains = <&pd_lcd0>; 977295436Sandrew #iommu-cells = <0>; 978295436Sandrew }; 979295436Sandrew 980295436Sandrew prng: rng@10830400 { 981295436Sandrew compatible = "samsung,exynos4-rng"; 982295436Sandrew reg = <0x10830400 0x200>; 983295436Sandrew clocks = <&clock CLK_SSS>; 984295436Sandrew clock-names = "secss"; 985295436Sandrew status = "disabled"; 986295436Sandrew }; 987279377Simp}; 988