emev2.dtsi revision 279377
1279377Simp/* 2279377Simp * Device Tree Source for the EMEV2 SoC 3279377Simp * 4279377Simp * Copyright (C) 2012 Renesas Solutions Corp. 5279377Simp * 6279377Simp * This file is licensed under the terms of the GNU General Public License 7279377Simp * version 2. This program is licensed "as is" without any warranty of any 8279377Simp * kind, whether express or implied. 9279377Simp */ 10279377Simp 11279377Simp#include "skeleton.dtsi" 12279377Simp#include <dt-bindings/interrupt-controller/irq.h> 13279377Simp 14279377Simp/ { 15279377Simp compatible = "renesas,emev2"; 16279377Simp interrupt-parent = <&gic>; 17279377Simp 18279377Simp aliases { 19279377Simp gpio0 = &gpio0; 20279377Simp gpio1 = &gpio1; 21279377Simp gpio2 = &gpio2; 22279377Simp gpio3 = &gpio3; 23279377Simp gpio4 = &gpio4; 24279377Simp }; 25279377Simp 26279377Simp cpus { 27279377Simp #address-cells = <1>; 28279377Simp #size-cells = <0>; 29279377Simp 30279377Simp cpu@0 { 31279377Simp device_type = "cpu"; 32279377Simp compatible = "arm,cortex-a9"; 33279377Simp reg = <0>; 34279377Simp clock-frequency = <533000000>; 35279377Simp }; 36279377Simp cpu@1 { 37279377Simp device_type = "cpu"; 38279377Simp compatible = "arm,cortex-a9"; 39279377Simp reg = <1>; 40279377Simp clock-frequency = <533000000>; 41279377Simp }; 42279377Simp }; 43279377Simp 44279377Simp gic: interrupt-controller@e0020000 { 45279377Simp compatible = "arm,cortex-a9-gic"; 46279377Simp interrupt-controller; 47279377Simp #interrupt-cells = <3>; 48279377Simp reg = <0xe0028000 0x1000>, 49279377Simp <0xe0020000 0x0100>; 50279377Simp }; 51279377Simp 52279377Simp pmu { 53279377Simp compatible = "arm,cortex-a9-pmu"; 54279377Simp interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, 55279377Simp <0 121 IRQ_TYPE_LEVEL_HIGH>; 56279377Simp }; 57279377Simp 58279377Simp clocks@e0110000 { 59279377Simp compatible = "renesas,emev2-smu"; 60279377Simp reg = <0xe0110000 0x10000>; 61279377Simp #address-cells = <2>; 62279377Simp #size-cells = <0>; 63279377Simp 64279377Simp c32ki: c32ki { 65279377Simp compatible = "fixed-clock"; 66279377Simp clock-frequency = <32768>; 67279377Simp #clock-cells = <0>; 68279377Simp }; 69279377Simp pll3_fo: pll3_fo { 70279377Simp compatible = "fixed-factor-clock"; 71279377Simp clocks = <&c32ki>; 72279377Simp clock-div = <1>; 73279377Simp clock-mult = <7000>; 74279377Simp #clock-cells = <0>; 75279377Simp }; 76279377Simp usia_u0_sclkdiv: usia_u0_sclkdiv { 77279377Simp compatible = "renesas,emev2-smu-clkdiv"; 78279377Simp reg = <0x610 0>; 79279377Simp clocks = <&pll3_fo>; 80279377Simp #clock-cells = <0>; 81279377Simp }; 82279377Simp usib_u1_sclkdiv: usib_u1_sclkdiv { 83279377Simp compatible = "renesas,emev2-smu-clkdiv"; 84279377Simp reg = <0x65c 0>; 85279377Simp clocks = <&pll3_fo>; 86279377Simp #clock-cells = <0>; 87279377Simp }; 88279377Simp usib_u2_sclkdiv: usib_u2_sclkdiv { 89279377Simp compatible = "renesas,emev2-smu-clkdiv"; 90279377Simp reg = <0x65c 16>; 91279377Simp clocks = <&pll3_fo>; 92279377Simp #clock-cells = <0>; 93279377Simp }; 94279377Simp usib_u3_sclkdiv: usib_u3_sclkdiv { 95279377Simp compatible = "renesas,emev2-smu-clkdiv"; 96279377Simp reg = <0x660 0>; 97279377Simp clocks = <&pll3_fo>; 98279377Simp #clock-cells = <0>; 99279377Simp }; 100279377Simp usia_u0_sclk: usia_u0_sclk { 101279377Simp compatible = "renesas,emev2-smu-gclk"; 102279377Simp reg = <0x4a0 1>; 103279377Simp clocks = <&usia_u0_sclkdiv>; 104279377Simp #clock-cells = <0>; 105279377Simp }; 106279377Simp usib_u1_sclk: usib_u1_sclk { 107279377Simp compatible = "renesas,emev2-smu-gclk"; 108279377Simp reg = <0x4b8 1>; 109279377Simp clocks = <&usib_u1_sclkdiv>; 110279377Simp #clock-cells = <0>; 111279377Simp }; 112279377Simp usib_u2_sclk: usib_u2_sclk { 113279377Simp compatible = "renesas,emev2-smu-gclk"; 114279377Simp reg = <0x4bc 1>; 115279377Simp clocks = <&usib_u2_sclkdiv>; 116279377Simp #clock-cells = <0>; 117279377Simp }; 118279377Simp usib_u3_sclk: usib_u3_sclk { 119279377Simp compatible = "renesas,emev2-smu-gclk"; 120279377Simp reg = <0x4c0 1>; 121279377Simp clocks = <&usib_u3_sclkdiv>; 122279377Simp #clock-cells = <0>; 123279377Simp }; 124279377Simp sti_sclk: sti_sclk { 125279377Simp compatible = "renesas,emev2-smu-gclk"; 126279377Simp reg = <0x528 1>; 127279377Simp clocks = <&c32ki>; 128279377Simp #clock-cells = <0>; 129279377Simp }; 130279377Simp }; 131279377Simp 132279377Simp timer@e0180000 { 133279377Simp compatible = "renesas,em-sti"; 134279377Simp reg = <0xe0180000 0x54>; 135279377Simp interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; 136279377Simp clocks = <&sti_sclk>; 137279377Simp clock-names = "sclk"; 138279377Simp }; 139279377Simp 140279377Simp uart0: serial@e1020000 { 141279377Simp compatible = "renesas,em-uart"; 142279377Simp reg = <0xe1020000 0x38>; 143279377Simp interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; 144279377Simp clocks = <&usia_u0_sclk>; 145279377Simp clock-names = "sclk"; 146279377Simp }; 147279377Simp 148279377Simp uart1: serial@e1030000 { 149279377Simp compatible = "renesas,em-uart"; 150279377Simp reg = <0xe1030000 0x38>; 151279377Simp interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; 152279377Simp clocks = <&usib_u1_sclk>; 153279377Simp clock-names = "sclk"; 154279377Simp }; 155279377Simp 156279377Simp uart2: serial@e1040000 { 157279377Simp compatible = "renesas,em-uart"; 158279377Simp reg = <0xe1040000 0x38>; 159279377Simp interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 160279377Simp clocks = <&usib_u2_sclk>; 161279377Simp clock-names = "sclk"; 162279377Simp }; 163279377Simp 164279377Simp uart3: serial@e1050000 { 165279377Simp compatible = "renesas,em-uart"; 166279377Simp reg = <0xe1050000 0x38>; 167279377Simp interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; 168279377Simp clocks = <&usib_u3_sclk>; 169279377Simp clock-names = "sclk"; 170279377Simp }; 171279377Simp 172279377Simp gpio0: gpio@e0050000 { 173279377Simp compatible = "renesas,em-gio"; 174279377Simp reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; 175279377Simp interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>, 176279377Simp <0 68 IRQ_TYPE_LEVEL_HIGH>; 177279377Simp gpio-controller; 178279377Simp #gpio-cells = <2>; 179279377Simp ngpios = <32>; 180279377Simp interrupt-controller; 181279377Simp #interrupt-cells = <2>; 182279377Simp }; 183279377Simp gpio1: gpio@e0050080 { 184279377Simp compatible = "renesas,em-gio"; 185279377Simp reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>; 186279377Simp interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>, 187279377Simp <0 70 IRQ_TYPE_LEVEL_HIGH>; 188279377Simp gpio-controller; 189279377Simp #gpio-cells = <2>; 190279377Simp ngpios = <32>; 191279377Simp interrupt-controller; 192279377Simp #interrupt-cells = <2>; 193279377Simp }; 194279377Simp gpio2: gpio@e0050100 { 195279377Simp compatible = "renesas,em-gio"; 196279377Simp reg = <0xe0050100 0x2c>, <0xe0050140 0x20>; 197279377Simp interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, 198279377Simp <0 72 IRQ_TYPE_LEVEL_HIGH>; 199279377Simp gpio-controller; 200279377Simp #gpio-cells = <2>; 201279377Simp ngpios = <32>; 202279377Simp interrupt-controller; 203279377Simp #interrupt-cells = <2>; 204279377Simp }; 205279377Simp gpio3: gpio@e0050180 { 206279377Simp compatible = "renesas,em-gio"; 207279377Simp reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>; 208279377Simp interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, 209279377Simp <0 74 IRQ_TYPE_LEVEL_HIGH>; 210279377Simp gpio-controller; 211279377Simp #gpio-cells = <2>; 212279377Simp ngpios = <32>; 213279377Simp interrupt-controller; 214279377Simp #interrupt-cells = <2>; 215279377Simp }; 216279377Simp gpio4: gpio@e0050200 { 217279377Simp compatible = "renesas,em-gio"; 218279377Simp reg = <0xe0050200 0x2c>, <0xe0050240 0x20>; 219279377Simp interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>, 220279377Simp <0 76 IRQ_TYPE_LEVEL_HIGH>; 221279377Simp gpio-controller; 222279377Simp #gpio-cells = <2>; 223279377Simp ngpios = <31>; 224279377Simp interrupt-controller; 225279377Simp #interrupt-cells = <2>; 226279377Simp }; 227279377Simp}; 228