1279377Simp/* 2279377Simp * Device Tree Source for the EMEV2 SoC 3279377Simp * 4279377Simp * Copyright (C) 2012 Renesas Solutions Corp. 5279377Simp * 6279377Simp * This file is licensed under the terms of the GNU General Public License 7279377Simp * version 2. This program is licensed "as is" without any warranty of any 8279377Simp * kind, whether express or implied. 9279377Simp */ 10279377Simp 11279377Simp#include "skeleton.dtsi" 12279377Simp#include <dt-bindings/interrupt-controller/irq.h> 13279377Simp 14279377Simp/ { 15279377Simp compatible = "renesas,emev2"; 16279377Simp interrupt-parent = <&gic>; 17279377Simp 18279377Simp aliases { 19279377Simp gpio0 = &gpio0; 20279377Simp gpio1 = &gpio1; 21279377Simp gpio2 = &gpio2; 22279377Simp gpio3 = &gpio3; 23279377Simp gpio4 = &gpio4; 24295436Sandrew i2c0 = &iic0; 25295436Sandrew i2c1 = &iic1; 26279377Simp }; 27279377Simp 28279377Simp cpus { 29279377Simp #address-cells = <1>; 30279377Simp #size-cells = <0>; 31279377Simp 32279377Simp cpu@0 { 33279377Simp device_type = "cpu"; 34279377Simp compatible = "arm,cortex-a9"; 35279377Simp reg = <0>; 36279377Simp clock-frequency = <533000000>; 37279377Simp }; 38279377Simp cpu@1 { 39279377Simp device_type = "cpu"; 40279377Simp compatible = "arm,cortex-a9"; 41279377Simp reg = <1>; 42279377Simp clock-frequency = <533000000>; 43279377Simp }; 44279377Simp }; 45279377Simp 46279377Simp gic: interrupt-controller@e0020000 { 47295436Sandrew compatible = "arm,pl390"; 48279377Simp interrupt-controller; 49279377Simp #interrupt-cells = <3>; 50279377Simp reg = <0xe0028000 0x1000>, 51279377Simp <0xe0020000 0x0100>; 52279377Simp }; 53279377Simp 54279377Simp pmu { 55279377Simp compatible = "arm,cortex-a9-pmu"; 56279377Simp interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, 57279377Simp <0 121 IRQ_TYPE_LEVEL_HIGH>; 58279377Simp }; 59279377Simp 60279377Simp clocks@e0110000 { 61279377Simp compatible = "renesas,emev2-smu"; 62279377Simp reg = <0xe0110000 0x10000>; 63279377Simp #address-cells = <2>; 64279377Simp #size-cells = <0>; 65279377Simp 66279377Simp c32ki: c32ki { 67279377Simp compatible = "fixed-clock"; 68279377Simp clock-frequency = <32768>; 69279377Simp #clock-cells = <0>; 70279377Simp }; 71295436Sandrew iic0_sclkdiv: iic0_sclkdiv { 72295436Sandrew compatible = "renesas,emev2-smu-clkdiv"; 73295436Sandrew reg = <0x624 0>; 74295436Sandrew clocks = <&pll3_fo>; 75295436Sandrew #clock-cells = <0>; 76295436Sandrew }; 77295436Sandrew iic0_sclk: iic0_sclk { 78295436Sandrew compatible = "renesas,emev2-smu-gclk"; 79295436Sandrew reg = <0x48c 1>; 80295436Sandrew clocks = <&iic0_sclkdiv>; 81295436Sandrew #clock-cells = <0>; 82295436Sandrew }; 83295436Sandrew iic1_sclkdiv: iic1_sclkdiv { 84295436Sandrew compatible = "renesas,emev2-smu-clkdiv"; 85295436Sandrew reg = <0x624 16>; 86295436Sandrew clocks = <&pll3_fo>; 87295436Sandrew #clock-cells = <0>; 88295436Sandrew }; 89295436Sandrew iic1_sclk: iic1_sclk { 90295436Sandrew compatible = "renesas,emev2-smu-gclk"; 91295436Sandrew reg = <0x490 1>; 92295436Sandrew clocks = <&iic1_sclkdiv>; 93295436Sandrew #clock-cells = <0>; 94295436Sandrew }; 95279377Simp pll3_fo: pll3_fo { 96279377Simp compatible = "fixed-factor-clock"; 97279377Simp clocks = <&c32ki>; 98279377Simp clock-div = <1>; 99279377Simp clock-mult = <7000>; 100279377Simp #clock-cells = <0>; 101279377Simp }; 102279377Simp usia_u0_sclkdiv: usia_u0_sclkdiv { 103279377Simp compatible = "renesas,emev2-smu-clkdiv"; 104279377Simp reg = <0x610 0>; 105279377Simp clocks = <&pll3_fo>; 106279377Simp #clock-cells = <0>; 107279377Simp }; 108279377Simp usib_u1_sclkdiv: usib_u1_sclkdiv { 109279377Simp compatible = "renesas,emev2-smu-clkdiv"; 110279377Simp reg = <0x65c 0>; 111279377Simp clocks = <&pll3_fo>; 112279377Simp #clock-cells = <0>; 113279377Simp }; 114279377Simp usib_u2_sclkdiv: usib_u2_sclkdiv { 115279377Simp compatible = "renesas,emev2-smu-clkdiv"; 116279377Simp reg = <0x65c 16>; 117279377Simp clocks = <&pll3_fo>; 118279377Simp #clock-cells = <0>; 119279377Simp }; 120279377Simp usib_u3_sclkdiv: usib_u3_sclkdiv { 121279377Simp compatible = "renesas,emev2-smu-clkdiv"; 122279377Simp reg = <0x660 0>; 123279377Simp clocks = <&pll3_fo>; 124279377Simp #clock-cells = <0>; 125279377Simp }; 126279377Simp usia_u0_sclk: usia_u0_sclk { 127279377Simp compatible = "renesas,emev2-smu-gclk"; 128279377Simp reg = <0x4a0 1>; 129279377Simp clocks = <&usia_u0_sclkdiv>; 130279377Simp #clock-cells = <0>; 131279377Simp }; 132279377Simp usib_u1_sclk: usib_u1_sclk { 133279377Simp compatible = "renesas,emev2-smu-gclk"; 134279377Simp reg = <0x4b8 1>; 135279377Simp clocks = <&usib_u1_sclkdiv>; 136279377Simp #clock-cells = <0>; 137279377Simp }; 138279377Simp usib_u2_sclk: usib_u2_sclk { 139279377Simp compatible = "renesas,emev2-smu-gclk"; 140279377Simp reg = <0x4bc 1>; 141279377Simp clocks = <&usib_u2_sclkdiv>; 142279377Simp #clock-cells = <0>; 143279377Simp }; 144279377Simp usib_u3_sclk: usib_u3_sclk { 145279377Simp compatible = "renesas,emev2-smu-gclk"; 146279377Simp reg = <0x4c0 1>; 147279377Simp clocks = <&usib_u3_sclkdiv>; 148279377Simp #clock-cells = <0>; 149279377Simp }; 150279377Simp sti_sclk: sti_sclk { 151279377Simp compatible = "renesas,emev2-smu-gclk"; 152279377Simp reg = <0x528 1>; 153279377Simp clocks = <&c32ki>; 154279377Simp #clock-cells = <0>; 155279377Simp }; 156279377Simp }; 157279377Simp 158279377Simp timer@e0180000 { 159279377Simp compatible = "renesas,em-sti"; 160279377Simp reg = <0xe0180000 0x54>; 161279377Simp interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; 162279377Simp clocks = <&sti_sclk>; 163279377Simp clock-names = "sclk"; 164279377Simp }; 165279377Simp 166279377Simp uart0: serial@e1020000 { 167279377Simp compatible = "renesas,em-uart"; 168279377Simp reg = <0xe1020000 0x38>; 169279377Simp interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; 170279377Simp clocks = <&usia_u0_sclk>; 171279377Simp clock-names = "sclk"; 172279377Simp }; 173279377Simp 174279377Simp uart1: serial@e1030000 { 175279377Simp compatible = "renesas,em-uart"; 176279377Simp reg = <0xe1030000 0x38>; 177279377Simp interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; 178279377Simp clocks = <&usib_u1_sclk>; 179279377Simp clock-names = "sclk"; 180279377Simp }; 181279377Simp 182279377Simp uart2: serial@e1040000 { 183279377Simp compatible = "renesas,em-uart"; 184279377Simp reg = <0xe1040000 0x38>; 185279377Simp interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 186279377Simp clocks = <&usib_u2_sclk>; 187279377Simp clock-names = "sclk"; 188279377Simp }; 189279377Simp 190279377Simp uart3: serial@e1050000 { 191279377Simp compatible = "renesas,em-uart"; 192279377Simp reg = <0xe1050000 0x38>; 193279377Simp interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; 194279377Simp clocks = <&usib_u3_sclk>; 195279377Simp clock-names = "sclk"; 196279377Simp }; 197279377Simp 198295436Sandrew pfc: pfc@e0140200 { 199295436Sandrew compatible = "renesas,pfc-emev2"; 200295436Sandrew reg = <0xe0140200 0x100>; 201295436Sandrew }; 202295436Sandrew 203279377Simp gpio0: gpio@e0050000 { 204279377Simp compatible = "renesas,em-gio"; 205279377Simp reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; 206279377Simp interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>, 207279377Simp <0 68 IRQ_TYPE_LEVEL_HIGH>; 208279377Simp gpio-controller; 209295436Sandrew gpio-ranges = <&pfc 0 0 32>; 210279377Simp #gpio-cells = <2>; 211279377Simp ngpios = <32>; 212279377Simp interrupt-controller; 213279377Simp #interrupt-cells = <2>; 214279377Simp }; 215279377Simp gpio1: gpio@e0050080 { 216279377Simp compatible = "renesas,em-gio"; 217279377Simp reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>; 218279377Simp interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>, 219279377Simp <0 70 IRQ_TYPE_LEVEL_HIGH>; 220279377Simp gpio-controller; 221295436Sandrew gpio-ranges = <&pfc 0 32 32>; 222279377Simp #gpio-cells = <2>; 223279377Simp ngpios = <32>; 224279377Simp interrupt-controller; 225279377Simp #interrupt-cells = <2>; 226279377Simp }; 227279377Simp gpio2: gpio@e0050100 { 228279377Simp compatible = "renesas,em-gio"; 229279377Simp reg = <0xe0050100 0x2c>, <0xe0050140 0x20>; 230279377Simp interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, 231279377Simp <0 72 IRQ_TYPE_LEVEL_HIGH>; 232279377Simp gpio-controller; 233295436Sandrew gpio-ranges = <&pfc 0 64 32>; 234279377Simp #gpio-cells = <2>; 235279377Simp ngpios = <32>; 236279377Simp interrupt-controller; 237279377Simp #interrupt-cells = <2>; 238279377Simp }; 239279377Simp gpio3: gpio@e0050180 { 240279377Simp compatible = "renesas,em-gio"; 241279377Simp reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>; 242279377Simp interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, 243279377Simp <0 74 IRQ_TYPE_LEVEL_HIGH>; 244279377Simp gpio-controller; 245295436Sandrew gpio-ranges = <&pfc 0 96 32>; 246279377Simp #gpio-cells = <2>; 247279377Simp ngpios = <32>; 248279377Simp interrupt-controller; 249279377Simp #interrupt-cells = <2>; 250279377Simp }; 251279377Simp gpio4: gpio@e0050200 { 252279377Simp compatible = "renesas,em-gio"; 253279377Simp reg = <0xe0050200 0x2c>, <0xe0050240 0x20>; 254279377Simp interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>, 255279377Simp <0 76 IRQ_TYPE_LEVEL_HIGH>; 256279377Simp gpio-controller; 257295436Sandrew gpio-ranges = <&pfc 0 128 31>; 258279377Simp #gpio-cells = <2>; 259279377Simp ngpios = <31>; 260279377Simp interrupt-controller; 261279377Simp #interrupt-cells = <2>; 262279377Simp }; 263295436Sandrew 264295436Sandrew iic0: i2c@e0070000 { 265295436Sandrew #address-cells = <1>; 266295436Sandrew #size-cells = <0>; 267295436Sandrew compatible = "renesas,iic-emev2"; 268295436Sandrew reg = <0xe0070000 0x28>; 269295436Sandrew interrupts = <0 32 IRQ_TYPE_EDGE_RISING>; 270295436Sandrew clocks = <&iic0_sclk>; 271295436Sandrew clock-names = "sclk"; 272295436Sandrew status = "disabled"; 273295436Sandrew }; 274295436Sandrew 275295436Sandrew iic1: i2c@e10a0000 { 276295436Sandrew #address-cells = <1>; 277295436Sandrew #size-cells = <0>; 278295436Sandrew compatible = "renesas,iic-emev2"; 279295436Sandrew reg = <0xe10a0000 0x28>; 280295436Sandrew interrupts = <0 33 IRQ_TYPE_EDGE_RISING>; 281295436Sandrew clocks = <&iic1_sclk>; 282295436Sandrew clock-names = "sclk"; 283295436Sandrew status = "disabled"; 284295436Sandrew }; 285279377Simp}; 286