dra72-evm.dts revision 295436
1279377Simp/* 2279377Simp * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3279377Simp * 4279377Simp * This program is free software; you can redistribute it and/or modify 5279377Simp * it under the terms of the GNU General Public License version 2 as 6279377Simp * published by the Free Software Foundation. 7279377Simp */ 8279377Simp/dts-v1/; 9279377Simp 10279377Simp#include "dra72x.dtsi" 11279377Simp#include <dt-bindings/gpio/gpio.h> 12295436Sandrew#include <dt-bindings/clk/ti-dra7-atl.h> 13279377Simp 14279377Simp/ { 15279377Simp model = "TI DRA722"; 16279377Simp compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; 17279377Simp 18279377Simp memory { 19279377Simp device_type = "memory"; 20279377Simp reg = <0x80000000 0x40000000>; /* 1024 MB */ 21279377Simp }; 22279377Simp 23295436Sandrew aliases { 24295436Sandrew display0 = &hdmi0; 25295436Sandrew }; 26295436Sandrew 27279377Simp evm_3v3: fixedregulator-evm_3v3 { 28279377Simp compatible = "regulator-fixed"; 29279377Simp regulator-name = "evm_3v3"; 30279377Simp regulator-min-microvolt = <3300000>; 31279377Simp regulator-max-microvolt = <3300000>; 32279377Simp }; 33279377Simp 34295436Sandrew aic_dvdd: fixedregulator-aic_dvdd { 35295436Sandrew /* TPS77018DBVT */ 36295436Sandrew compatible = "regulator-fixed"; 37295436Sandrew regulator-name = "aic_dvdd"; 38295436Sandrew vin-supply = <&evm_3v3>; 39295436Sandrew regulator-min-microvolt = <1800000>; 40295436Sandrew regulator-max-microvolt = <1800000>; 41295436Sandrew }; 42295436Sandrew 43295436Sandrew evm_3v3_sd: fixedregulator-sd { 44295436Sandrew compatible = "regulator-fixed"; 45295436Sandrew regulator-name = "evm_3v3_sd"; 46295436Sandrew regulator-min-microvolt = <3300000>; 47295436Sandrew regulator-max-microvolt = <3300000>; 48295436Sandrew enable-active-high; 49295436Sandrew gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; 50295436Sandrew }; 51295436Sandrew 52279377Simp extcon_usb1: extcon_usb1 { 53279377Simp compatible = "linux,extcon-usb-gpio"; 54279377Simp id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 55279377Simp }; 56279377Simp 57279377Simp extcon_usb2: extcon_usb2 { 58279377Simp compatible = "linux,extcon-usb-gpio"; 59279377Simp id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; 60279377Simp }; 61295436Sandrew 62295436Sandrew hdmi0: connector { 63295436Sandrew compatible = "hdmi-connector"; 64295436Sandrew label = "hdmi"; 65295436Sandrew 66295436Sandrew type = "a"; 67295436Sandrew 68295436Sandrew port { 69295436Sandrew hdmi_connector_in: endpoint { 70295436Sandrew remote-endpoint = <&tpd12s015_out>; 71295436Sandrew }; 72295436Sandrew }; 73295436Sandrew }; 74295436Sandrew 75295436Sandrew tpd12s015: encoder { 76295436Sandrew compatible = "ti,tpd12s015"; 77295436Sandrew 78295436Sandrew pinctrl-names = "default"; 79295436Sandrew pinctrl-0 = <&tpd12s015_pins>; 80295436Sandrew 81295436Sandrew gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */ 82295436Sandrew <&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */ 83295436Sandrew <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ 84295436Sandrew 85295436Sandrew ports { 86295436Sandrew #address-cells = <1>; 87295436Sandrew #size-cells = <0>; 88295436Sandrew 89295436Sandrew port@0 { 90295436Sandrew reg = <0>; 91295436Sandrew 92295436Sandrew tpd12s015_in: endpoint { 93295436Sandrew remote-endpoint = <&hdmi_out>; 94295436Sandrew }; 95295436Sandrew }; 96295436Sandrew 97295436Sandrew port@1 { 98295436Sandrew reg = <1>; 99295436Sandrew 100295436Sandrew tpd12s015_out: endpoint { 101295436Sandrew remote-endpoint = <&hdmi_connector_in>; 102295436Sandrew }; 103295436Sandrew }; 104295436Sandrew }; 105295436Sandrew }; 106295436Sandrew 107295436Sandrew sound0: sound@0 { 108295436Sandrew compatible = "simple-audio-card"; 109295436Sandrew simple-audio-card,name = "DRA7xx-EVM"; 110295436Sandrew simple-audio-card,widgets = 111295436Sandrew "Headphone", "Headphone Jack", 112295436Sandrew "Line", "Line Out", 113295436Sandrew "Microphone", "Mic Jack", 114295436Sandrew "Line", "Line In"; 115295436Sandrew simple-audio-card,routing = 116295436Sandrew "Headphone Jack", "HPLOUT", 117295436Sandrew "Headphone Jack", "HPROUT", 118295436Sandrew "Line Out", "LLOUT", 119295436Sandrew "Line Out", "RLOUT", 120295436Sandrew "MIC3L", "Mic Jack", 121295436Sandrew "MIC3R", "Mic Jack", 122295436Sandrew "Mic Jack", "Mic Bias", 123295436Sandrew "LINE1L", "Line In", 124295436Sandrew "LINE1R", "Line In"; 125295436Sandrew simple-audio-card,format = "dsp_b"; 126295436Sandrew simple-audio-card,bitclock-master = <&sound0_master>; 127295436Sandrew simple-audio-card,frame-master = <&sound0_master>; 128295436Sandrew simple-audio-card,bitclock-inversion; 129295436Sandrew 130295436Sandrew sound0_master: simple-audio-card,cpu { 131295436Sandrew sound-dai = <&mcasp3>; 132295436Sandrew system-clock-frequency = <5644800>; 133295436Sandrew }; 134295436Sandrew 135295436Sandrew simple-audio-card,codec { 136295436Sandrew sound-dai = <&tlv320aic3106>; 137295436Sandrew clocks = <&atl_clkin2_ck>; 138295436Sandrew }; 139295436Sandrew }; 140279377Simp}; 141279377Simp 142279377Simp&dra7_pmx_core { 143279377Simp i2c1_pins: pinmux_i2c1_pins { 144279377Simp pinctrl-single,pins = < 145295436Sandrew DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 146295436Sandrew DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 147279377Simp >; 148279377Simp }; 149279377Simp 150295436Sandrew i2c5_pins: pinmux_i2c5_pins { 151295436Sandrew pinctrl-single,pins = < 152295436Sandrew DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ 153295436Sandrew DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */ 154295436Sandrew >; 155295436Sandrew }; 156295436Sandrew 157295436Sandrew i2c5_pins: pinmux_i2c5_pins { 158295436Sandrew pinctrl-single,pins = < 159295436Sandrew DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ 160295436Sandrew DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */ 161295436Sandrew >; 162295436Sandrew }; 163295436Sandrew 164279377Simp nand_default: nand_default { 165279377Simp pinctrl-single,pins = < 166295436Sandrew DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */ 167295436Sandrew DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */ 168295436Sandrew DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */ 169295436Sandrew DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */ 170295436Sandrew DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */ 171295436Sandrew DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */ 172295436Sandrew DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */ 173295436Sandrew DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */ 174295436Sandrew DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */ 175295436Sandrew DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */ 176295436Sandrew DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */ 177295436Sandrew DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */ 178295436Sandrew DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */ 179295436Sandrew DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */ 180295436Sandrew DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */ 181295436Sandrew DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */ 182295436Sandrew DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */ 183295436Sandrew DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */ 184295436Sandrew DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */ 185295436Sandrew DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */ 186295436Sandrew DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */ 187295436Sandrew DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */ 188279377Simp >; 189279377Simp }; 190279377Simp 191279377Simp usb1_pins: pinmux_usb1_pins { 192279377Simp pinctrl-single,pins = < 193295436Sandrew DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ 194279377Simp >; 195279377Simp }; 196279377Simp 197279377Simp usb2_pins: pinmux_usb2_pins { 198279377Simp pinctrl-single,pins = < 199295436Sandrew DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */ 200279377Simp >; 201279377Simp }; 202279377Simp 203279377Simp tps65917_pins_default: tps65917_pins_default { 204279377Simp pinctrl-single,pins = < 205295436Sandrew DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ 206279377Simp >; 207279377Simp }; 208279377Simp 209279377Simp mmc1_pins_default: mmc1_pins_default { 210279377Simp pinctrl-single,pins = < 211295436Sandrew DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ 212295436Sandrew DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 213295436Sandrew DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 214295436Sandrew DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 215295436Sandrew DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 216295436Sandrew DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 217295436Sandrew DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 218279377Simp >; 219279377Simp }; 220279377Simp 221279377Simp mmc2_pins_default: mmc2_pins_default { 222279377Simp pinctrl-single,pins = < 223295436Sandrew DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 224295436Sandrew DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 225295436Sandrew DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 226295436Sandrew DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 227295436Sandrew DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 228295436Sandrew DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 229295436Sandrew DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 230295436Sandrew DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 231295436Sandrew DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 232295436Sandrew DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 233279377Simp >; 234279377Simp }; 235279377Simp 236279377Simp dcan1_pins_default: dcan1_pins_default { 237279377Simp pinctrl-single,pins = < 238295436Sandrew DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ 239295436Sandrew DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ 240279377Simp >; 241279377Simp }; 242279377Simp 243279377Simp dcan1_pins_sleep: dcan1_pins_sleep { 244279377Simp pinctrl-single,pins = < 245295436Sandrew DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ 246295436Sandrew DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */ 247279377Simp >; 248279377Simp }; 249279377Simp 250279377Simp qspi1_pins: pinmux_qspi1_pins { 251279377Simp pinctrl-single,pins = < 252295436Sandrew DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ 253295436Sandrew DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ 254295436Sandrew DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ 255295436Sandrew DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ 256295436Sandrew DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ 257295436Sandrew DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ 258295436Sandrew DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ 259279377Simp >; 260279377Simp }; 261295436Sandrew 262295436Sandrew hdmi_pins: pinmux_hdmi_pins { 263295436Sandrew pinctrl-single,pins = < 264295436Sandrew DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ 265295436Sandrew DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ 266295436Sandrew >; 267295436Sandrew }; 268295436Sandrew 269295436Sandrew tpd12s015_pins: pinmux_tpd12s015_pins { 270295436Sandrew pinctrl-single,pins = < 271295436Sandrew DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ 272295436Sandrew >; 273295436Sandrew }; 274295436Sandrew 275295436Sandrew atl_pins: pinmux_atl_pins { 276295436Sandrew pinctrl-single,pins = < 277295436Sandrew DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */ 278295436Sandrew DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */ 279295436Sandrew >; 280295436Sandrew }; 281295436Sandrew 282295436Sandrew mcasp3_pins: pinmux_mcasp3_pins { 283295436Sandrew pinctrl-single,pins = < 284295436Sandrew DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */ 285295436Sandrew DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */ 286295436Sandrew DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */ 287295436Sandrew DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */ 288295436Sandrew >; 289295436Sandrew }; 290295436Sandrew 291295436Sandrew mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins { 292295436Sandrew pinctrl-single,pins = < 293295436Sandrew DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15) 294295436Sandrew DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15) 295295436Sandrew DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15) 296295436Sandrew DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15) 297295436Sandrew >; 298295436Sandrew }; 299279377Simp}; 300279377Simp 301279377Simp&i2c1 { 302279377Simp status = "okay"; 303279377Simp pinctrl-names = "default"; 304279377Simp pinctrl-0 = <&i2c1_pins>; 305279377Simp clock-frequency = <400000>; 306279377Simp 307279377Simp tps65917: tps65917@58 { 308279377Simp compatible = "ti,tps65917"; 309279377Simp reg = <0x58>; 310279377Simp 311279377Simp pinctrl-names = "default"; 312279377Simp pinctrl-0 = <&tps65917_pins_default>; 313279377Simp 314279377Simp interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ 315279377Simp interrupt-controller; 316279377Simp #interrupt-cells = <2>; 317279377Simp 318279377Simp ti,system-power-controller; 319279377Simp 320279377Simp tps65917_pmic { 321279377Simp compatible = "ti,tps65917-pmic"; 322279377Simp 323279377Simp regulators { 324279377Simp smps1_reg: smps1 { 325279377Simp /* VDD_MPU */ 326279377Simp regulator-name = "smps1"; 327279377Simp regulator-min-microvolt = <850000>; 328279377Simp regulator-max-microvolt = <1250000>; 329279377Simp regulator-always-on; 330279377Simp regulator-boot-on; 331279377Simp }; 332279377Simp 333279377Simp smps2_reg: smps2 { 334279377Simp /* VDD_CORE */ 335279377Simp regulator-name = "smps2"; 336279377Simp regulator-min-microvolt = <850000>; 337279377Simp regulator-max-microvolt = <1060000>; 338279377Simp regulator-boot-on; 339279377Simp regulator-always-on; 340279377Simp }; 341279377Simp 342279377Simp smps3_reg: smps3 { 343279377Simp /* VDD_GPU IVA DSPEVE */ 344279377Simp regulator-name = "smps3"; 345279377Simp regulator-min-microvolt = <850000>; 346279377Simp regulator-max-microvolt = <1250000>; 347279377Simp regulator-boot-on; 348279377Simp regulator-always-on; 349279377Simp }; 350279377Simp 351279377Simp smps4_reg: smps4 { 352279377Simp /* VDDS1V8 */ 353279377Simp regulator-name = "smps4"; 354279377Simp regulator-min-microvolt = <1800000>; 355279377Simp regulator-max-microvolt = <1800000>; 356279377Simp regulator-always-on; 357279377Simp regulator-boot-on; 358279377Simp }; 359279377Simp 360279377Simp smps5_reg: smps5 { 361279377Simp /* VDD_DDR */ 362279377Simp regulator-name = "smps5"; 363279377Simp regulator-min-microvolt = <1350000>; 364279377Simp regulator-max-microvolt = <1350000>; 365279377Simp regulator-boot-on; 366279377Simp regulator-always-on; 367279377Simp }; 368279377Simp 369279377Simp ldo1_reg: ldo1 { 370279377Simp /* LDO1_OUT --> SDIO */ 371279377Simp regulator-name = "ldo1"; 372279377Simp regulator-min-microvolt = <1800000>; 373279377Simp regulator-max-microvolt = <3300000>; 374295436Sandrew regulator-always-on; 375279377Simp regulator-boot-on; 376295436Sandrew regulator-allow-bypass; 377279377Simp }; 378279377Simp 379279377Simp ldo2_reg: ldo2 { 380279377Simp /* LDO2_OUT --> TP1017 (UNUSED) */ 381279377Simp regulator-name = "ldo2"; 382279377Simp regulator-min-microvolt = <1800000>; 383279377Simp regulator-max-microvolt = <3300000>; 384295436Sandrew regulator-allow-bypass; 385279377Simp }; 386279377Simp 387279377Simp ldo3_reg: ldo3 { 388279377Simp /* VDDA_1V8_PHY */ 389279377Simp regulator-name = "ldo3"; 390279377Simp regulator-min-microvolt = <1800000>; 391279377Simp regulator-max-microvolt = <1800000>; 392279377Simp regulator-boot-on; 393279377Simp regulator-always-on; 394279377Simp }; 395279377Simp 396279377Simp ldo5_reg: ldo5 { 397279377Simp /* VDDA_1V8_PLL */ 398279377Simp regulator-name = "ldo5"; 399279377Simp regulator-min-microvolt = <1800000>; 400279377Simp regulator-max-microvolt = <1800000>; 401279377Simp regulator-always-on; 402279377Simp regulator-boot-on; 403279377Simp }; 404279377Simp 405279377Simp ldo4_reg: ldo4 { 406279377Simp /* VDDA_3V_USB: VDDA_USBHS33 */ 407279377Simp regulator-name = "ldo4"; 408279377Simp regulator-min-microvolt = <3300000>; 409279377Simp regulator-max-microvolt = <3300000>; 410279377Simp regulator-boot-on; 411279377Simp }; 412279377Simp }; 413279377Simp }; 414279377Simp 415279377Simp tps65917_power_button { 416279377Simp compatible = "ti,palmas-pwrbutton"; 417279377Simp interrupt-parent = <&tps65917>; 418279377Simp interrupts = <1 IRQ_TYPE_NONE>; 419279377Simp wakeup-source; 420279377Simp ti,palmas-long-press-seconds = <6>; 421279377Simp }; 422279377Simp }; 423279377Simp 424279377Simp pcf_gpio_21: gpio@21 { 425279377Simp compatible = "ti,pcf8575"; 426279377Simp reg = <0x21>; 427279377Simp lines-initial-states = <0x1408>; 428279377Simp gpio-controller; 429279377Simp #gpio-cells = <2>; 430279377Simp interrupt-parent = <&gpio6>; 431279377Simp interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 432279377Simp interrupt-controller; 433279377Simp #interrupt-cells = <2>; 434279377Simp }; 435295436Sandrew 436295436Sandrew tlv320aic3106: tlv320aic3106@19 { 437295436Sandrew #sound-dai-cells = <0>; 438295436Sandrew compatible = "ti,tlv320aic3106"; 439295436Sandrew reg = <0x19>; 440295436Sandrew adc-settle-ms = <40>; 441295436Sandrew ai3x-micbias-vg = <1>; /* 2.0V */ 442295436Sandrew status = "okay"; 443295436Sandrew 444295436Sandrew /* Regulators */ 445295436Sandrew AVDD-supply = <&evm_3v3>; 446295436Sandrew IOVDD-supply = <&evm_3v3>; 447295436Sandrew DRVDD-supply = <&evm_3v3>; 448295436Sandrew DVDD-supply = <&aic_dvdd>; 449295436Sandrew }; 450279377Simp}; 451279377Simp 452295436Sandrew&i2c5 { 453295436Sandrew status = "okay"; 454295436Sandrew pinctrl-names = "default"; 455295436Sandrew pinctrl-0 = <&i2c5_pins>; 456295436Sandrew clock-frequency = <400000>; 457295436Sandrew 458295436Sandrew pcf_hdmi: pcf8575@26 { 459295436Sandrew compatible = "nxp,pcf8575"; 460295436Sandrew reg = <0x26>; 461295436Sandrew gpio-controller; 462295436Sandrew #gpio-cells = <2>; 463295436Sandrew /* 464295436Sandrew * initial state is used here to keep the mdio interface 465295436Sandrew * selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and 466295436Sandrew * VIN2_S0 driven high otherwise Ethernet stops working 467295436Sandrew * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6 468295436Sandrew */ 469295436Sandrew lines-initial-states = <0x0f2b>; 470295436Sandrew 471295436Sandrew p1 { 472295436Sandrew /* vin6_sel_s0: high: VIN6, low: audio */ 473295436Sandrew gpio-hog; 474295436Sandrew gpios = <1 GPIO_ACTIVE_HIGH>; 475295436Sandrew output-low; 476295436Sandrew line-name = "vin6_sel_s0"; 477295436Sandrew }; 478295436Sandrew }; 479295436Sandrew}; 480295436Sandrew 481279377Simp&uart1 { 482279377Simp status = "okay"; 483295436Sandrew interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 484295436Sandrew <&dra7_pmx_core 0x3e0>; 485279377Simp}; 486279377Simp 487279377Simp&elm { 488279377Simp status = "okay"; 489279377Simp}; 490279377Simp 491279377Simp&gpmc { 492279377Simp status = "okay"; 493279377Simp pinctrl-names = "default"; 494279377Simp pinctrl-0 = <&nand_default>; 495279377Simp ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ 496279377Simp nand@0,0 { 497279377Simp /* To use NAND, DIP switch SW5 must be set like so: 498279377Simp * SW5.1 (NAND_SELn) = ON (LOW) 499279377Simp * SW5.9 (GPMC_WPN) = OFF (HIGH) 500279377Simp */ 501279377Simp reg = <0 0 4>; /* device IO registers */ 502279377Simp ti,nand-ecc-opt = "bch8"; 503279377Simp ti,elm-id = <&elm>; 504279377Simp nand-bus-width = <16>; 505279377Simp gpmc,device-width = <2>; 506279377Simp gpmc,sync-clk-ps = <0>; 507279377Simp gpmc,cs-on-ns = <0>; 508279377Simp gpmc,cs-rd-off-ns = <80>; 509279377Simp gpmc,cs-wr-off-ns = <80>; 510279377Simp gpmc,adv-on-ns = <0>; 511279377Simp gpmc,adv-rd-off-ns = <60>; 512279377Simp gpmc,adv-wr-off-ns = <60>; 513279377Simp gpmc,we-on-ns = <10>; 514279377Simp gpmc,we-off-ns = <50>; 515279377Simp gpmc,oe-on-ns = <4>; 516279377Simp gpmc,oe-off-ns = <40>; 517279377Simp gpmc,access-ns = <40>; 518279377Simp gpmc,wr-access-ns = <80>; 519279377Simp gpmc,rd-cycle-ns = <80>; 520279377Simp gpmc,wr-cycle-ns = <80>; 521279377Simp gpmc,bus-turnaround-ns = <0>; 522279377Simp gpmc,cycle2cycle-delay-ns = <0>; 523279377Simp gpmc,clk-activation-ns = <0>; 524279377Simp gpmc,wait-monitoring-ns = <0>; 525279377Simp gpmc,wr-data-mux-bus-ns = <0>; 526279377Simp /* MTD partition table */ 527279377Simp /* All SPL-* partitions are sized to minimal length 528279377Simp * which can be independently programmable. For 529279377Simp * NAND flash this is equal to size of erase-block */ 530279377Simp #address-cells = <1>; 531279377Simp #size-cells = <1>; 532279377Simp partition@0 { 533279377Simp label = "NAND.SPL"; 534279377Simp reg = <0x00000000 0x000020000>; 535279377Simp }; 536279377Simp partition@1 { 537279377Simp label = "NAND.SPL.backup1"; 538279377Simp reg = <0x00020000 0x00020000>; 539279377Simp }; 540279377Simp partition@2 { 541279377Simp label = "NAND.SPL.backup2"; 542279377Simp reg = <0x00040000 0x00020000>; 543279377Simp }; 544279377Simp partition@3 { 545279377Simp label = "NAND.SPL.backup3"; 546279377Simp reg = <0x00060000 0x00020000>; 547279377Simp }; 548279377Simp partition@4 { 549279377Simp label = "NAND.u-boot-spl-os"; 550279377Simp reg = <0x00080000 0x00040000>; 551279377Simp }; 552279377Simp partition@5 { 553279377Simp label = "NAND.u-boot"; 554279377Simp reg = <0x000c0000 0x00100000>; 555279377Simp }; 556279377Simp partition@6 { 557279377Simp label = "NAND.u-boot-env"; 558279377Simp reg = <0x001c0000 0x00020000>; 559279377Simp }; 560279377Simp partition@7 { 561279377Simp label = "NAND.u-boot-env.backup1"; 562279377Simp reg = <0x001e0000 0x00020000>; 563279377Simp }; 564279377Simp partition@8 { 565279377Simp label = "NAND.kernel"; 566279377Simp reg = <0x00200000 0x00800000>; 567279377Simp }; 568279377Simp partition@9 { 569279377Simp label = "NAND.file-system"; 570279377Simp reg = <0x00a00000 0x0f600000>; 571279377Simp }; 572279377Simp }; 573279377Simp}; 574279377Simp 575279377Simp&usb2_phy1 { 576279377Simp phy-supply = <&ldo4_reg>; 577279377Simp}; 578279377Simp 579279377Simp&usb2_phy2 { 580279377Simp phy-supply = <&ldo4_reg>; 581279377Simp}; 582279377Simp 583279377Simp&omap_dwc3_1 { 584279377Simp extcon = <&extcon_usb1>; 585279377Simp}; 586279377Simp 587279377Simp&omap_dwc3_2 { 588279377Simp extcon = <&extcon_usb2>; 589279377Simp}; 590279377Simp 591279377Simp&usb1 { 592279377Simp dr_mode = "peripheral"; 593279377Simp pinctrl-names = "default"; 594279377Simp pinctrl-0 = <&usb1_pins>; 595279377Simp}; 596279377Simp 597279377Simp&usb2 { 598279377Simp dr_mode = "host"; 599279377Simp pinctrl-names = "default"; 600279377Simp pinctrl-0 = <&usb2_pins>; 601279377Simp}; 602279377Simp 603279377Simp&mmc1 { 604279377Simp status = "okay"; 605279377Simp pinctrl-names = "default"; 606279377Simp pinctrl-0 = <&mmc1_pins_default>; 607295436Sandrew vmmc-supply = <&evm_3v3_sd>; 608295436Sandrew vmmc_aux-supply = <&ldo1_reg>; 609279377Simp bus-width = <4>; 610279377Simp /* 611279377Simp * SDCD signal is not being used here - using the fact that GPIO mode 612279377Simp * is a viable alternative 613279377Simp */ 614295436Sandrew cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; 615295436Sandrew max-frequency = <192000000>; 616279377Simp}; 617279377Simp 618279377Simp&mmc2 { 619279377Simp /* SW5-3 in ON position */ 620279377Simp status = "okay"; 621279377Simp pinctrl-names = "default"; 622279377Simp pinctrl-0 = <&mmc2_pins_default>; 623279377Simp 624279377Simp vmmc-supply = <&evm_3v3>; 625279377Simp bus-width = <8>; 626279377Simp ti,non-removable; 627295436Sandrew max-frequency = <192000000>; 628279377Simp}; 629279377Simp 630279377Simp&dra7_pmx_core { 631279377Simp cpsw_default: cpsw_default { 632279377Simp pinctrl-single,pins = < 633279377Simp /* Slave 2 */ 634295436Sandrew DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */ 635295436Sandrew DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ 636295436Sandrew DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ 637295436Sandrew DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ 638295436Sandrew DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ 639295436Sandrew DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ 640295436Sandrew DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ 641295436Sandrew DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ 642295436Sandrew DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 643295436Sandrew DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 644295436Sandrew DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 645295436Sandrew DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 646279377Simp >; 647279377Simp 648279377Simp }; 649279377Simp 650279377Simp cpsw_sleep: cpsw_sleep { 651279377Simp pinctrl-single,pins = < 652279377Simp /* Slave 2 */ 653295436Sandrew DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15) 654295436Sandrew DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15) 655295436Sandrew DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15) 656295436Sandrew DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15) 657295436Sandrew DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15) 658295436Sandrew DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15) 659295436Sandrew DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15) 660295436Sandrew DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15) 661295436Sandrew DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15) 662295436Sandrew DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15) 663295436Sandrew DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15) 664295436Sandrew DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15) 665279377Simp >; 666279377Simp }; 667279377Simp 668279377Simp davinci_mdio_default: davinci_mdio_default { 669279377Simp pinctrl-single,pins = < 670279377Simp /* MDIO */ 671295436Sandrew DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */ 672295436Sandrew DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 673279377Simp >; 674279377Simp }; 675279377Simp 676279377Simp davinci_mdio_sleep: davinci_mdio_sleep { 677279377Simp pinctrl-single,pins = < 678295436Sandrew DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15) 679295436Sandrew DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15) 680279377Simp >; 681279377Simp }; 682279377Simp}; 683279377Simp 684279377Simp&mac { 685279377Simp status = "okay"; 686279377Simp pinctrl-names = "default", "sleep"; 687279377Simp pinctrl-0 = <&cpsw_default>; 688279377Simp pinctrl-1 = <&cpsw_sleep>; 689295436Sandrew slaves = <1>; 690295436Sandrew mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>; 691279377Simp}; 692279377Simp 693295436Sandrew&cpsw_emac0 { 694279377Simp phy_id = <&davinci_mdio>, <3>; 695279377Simp phy-mode = "rgmii"; 696279377Simp}; 697279377Simp 698279377Simp&davinci_mdio { 699279377Simp pinctrl-names = "default", "sleep"; 700279377Simp pinctrl-0 = <&davinci_mdio_default>; 701279377Simp pinctrl-1 = <&davinci_mdio_sleep>; 702279377Simp}; 703279377Simp 704279377Simp&dcan1 { 705279377Simp status = "ok"; 706295436Sandrew pinctrl-names = "default", "sleep", "active"; 707295436Sandrew pinctrl-0 = <&dcan1_pins_sleep>; 708279377Simp pinctrl-1 = <&dcan1_pins_sleep>; 709295436Sandrew pinctrl-2 = <&dcan1_pins_default>; 710279377Simp}; 711279377Simp 712279377Simp&qspi { 713279377Simp status = "okay"; 714279377Simp pinctrl-names = "default"; 715279377Simp pinctrl-0 = <&qspi1_pins>; 716279377Simp 717279377Simp spi-max-frequency = <48000000>; 718279377Simp m25p80@0 { 719279377Simp compatible = "s25fl256s1"; 720279377Simp spi-max-frequency = <48000000>; 721279377Simp reg = <0>; 722279377Simp spi-tx-bus-width = <1>; 723279377Simp spi-rx-bus-width = <4>; 724279377Simp spi-cpol; 725279377Simp spi-cpha; 726279377Simp #address-cells = <1>; 727279377Simp #size-cells = <1>; 728279377Simp 729279377Simp /* MTD partition table. 730279377Simp * The ROM checks the first four physical blocks 731279377Simp * for a valid file to boot and the flash here is 732279377Simp * 64KiB block size. 733279377Simp */ 734279377Simp partition@0 { 735279377Simp label = "QSPI.SPL"; 736279377Simp reg = <0x00000000 0x000010000>; 737279377Simp }; 738279377Simp partition@1 { 739279377Simp label = "QSPI.SPL.backup1"; 740279377Simp reg = <0x00010000 0x00010000>; 741279377Simp }; 742279377Simp partition@2 { 743279377Simp label = "QSPI.SPL.backup2"; 744279377Simp reg = <0x00020000 0x00010000>; 745279377Simp }; 746279377Simp partition@3 { 747279377Simp label = "QSPI.SPL.backup3"; 748279377Simp reg = <0x00030000 0x00010000>; 749279377Simp }; 750279377Simp partition@4 { 751279377Simp label = "QSPI.u-boot"; 752279377Simp reg = <0x00040000 0x00100000>; 753279377Simp }; 754279377Simp partition@5 { 755279377Simp label = "QSPI.u-boot-spl-os"; 756279377Simp reg = <0x00140000 0x00080000>; 757279377Simp }; 758279377Simp partition@6 { 759279377Simp label = "QSPI.u-boot-env"; 760279377Simp reg = <0x001c0000 0x00010000>; 761279377Simp }; 762279377Simp partition@7 { 763279377Simp label = "QSPI.u-boot-env.backup1"; 764279377Simp reg = <0x001d0000 0x0010000>; 765279377Simp }; 766279377Simp partition@8 { 767279377Simp label = "QSPI.kernel"; 768279377Simp reg = <0x001e0000 0x0800000>; 769279377Simp }; 770279377Simp partition@9 { 771279377Simp label = "QSPI.file-system"; 772279377Simp reg = <0x009e0000 0x01620000>; 773279377Simp }; 774279377Simp }; 775279377Simp}; 776295436Sandrew 777295436Sandrew&dss { 778295436Sandrew status = "ok"; 779295436Sandrew 780295436Sandrew vdda_video-supply = <&ldo5_reg>; 781295436Sandrew}; 782295436Sandrew 783295436Sandrew&hdmi { 784295436Sandrew status = "ok"; 785295436Sandrew vdda-supply = <&ldo3_reg>; 786295436Sandrew 787295436Sandrew pinctrl-names = "default"; 788295436Sandrew pinctrl-0 = <&hdmi_pins>; 789295436Sandrew 790295436Sandrew port { 791295436Sandrew hdmi_out: endpoint { 792295436Sandrew remote-endpoint = <&tpd12s015_in>; 793295436Sandrew }; 794295436Sandrew }; 795295436Sandrew}; 796295436Sandrew 797295436Sandrew&atl { 798295436Sandrew pinctrl-names = "default"; 799295436Sandrew pinctrl-0 = <&atl_pins>; 800295436Sandrew 801295436Sandrew assigned-clocks = <&abe_dpll_sys_clk_mux>, 802295436Sandrew <&atl_gfclk_mux>, 803295436Sandrew <&dpll_abe_ck>, 804295436Sandrew <&dpll_abe_m2x2_ck>, 805295436Sandrew <&atl_clkin2_ck>; 806295436Sandrew assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; 807295436Sandrew assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>; 808295436Sandrew 809295436Sandrew status = "okay"; 810295436Sandrew 811295436Sandrew atl2 { 812295436Sandrew bws = <DRA7_ATL_WS_MCASP2_FSX>; 813295436Sandrew aws = <DRA7_ATL_WS_MCASP3_FSX>; 814295436Sandrew }; 815295436Sandrew}; 816295436Sandrew 817295436Sandrew&mcasp3 { 818295436Sandrew #sound-dai-cells = <0>; 819295436Sandrew pinctrl-names = "default", "sleep"; 820295436Sandrew pinctrl-0 = <&mcasp3_pins>; 821295436Sandrew pinctrl-1 = <&mcasp3_sleep_pins>; 822295436Sandrew 823295436Sandrew assigned-clocks = <&mcasp3_ahclkx_mux>; 824295436Sandrew assigned-clock-parents = <&atl_clkin2_ck>; 825295436Sandrew 826295436Sandrew status = "okay"; 827295436Sandrew 828295436Sandrew op-mode = <0>; /* MCASP_IIS_MODE */ 829295436Sandrew tdm-slots = <2>; 830295436Sandrew /* 4 serializer */ 831295436Sandrew serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 832295436Sandrew 1 2 0 0 833295436Sandrew >; 834295436Sandrew}; 835295436Sandrew 836295436Sandrew&mailbox5 { 837295436Sandrew status = "okay"; 838295436Sandrew mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { 839295436Sandrew status = "okay"; 840295436Sandrew }; 841295436Sandrew mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { 842295436Sandrew status = "okay"; 843295436Sandrew }; 844295436Sandrew}; 845295436Sandrew 846295436Sandrew&mailbox6 { 847295436Sandrew status = "okay"; 848295436Sandrew mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { 849295436Sandrew status = "okay"; 850295436Sandrew }; 851295436Sandrew}; 852