1279377Simp/* 2279377Simp * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 3279377Simp * 4279377Simp * This program is free software; you can redistribute it and/or modify 5279377Simp * it under the terms of the GNU General Public License version 2 as 6279377Simp * published by the Free Software Foundation. 7279377Simp */ 8279377Simp/dts-v1/; 9279377Simp 10295436Sandrew#include "dra74x.dtsi" 11279377Simp#include <dt-bindings/gpio/gpio.h> 12279377Simp#include <dt-bindings/clk/ti-dra7-atl.h> 13279377Simp#include <dt-bindings/input/input.h> 14279377Simp 15279377Simp/ { 16279377Simp model = "TI DRA742"; 17279377Simp compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; 18279377Simp 19279377Simp memory { 20279377Simp device_type = "memory"; 21279377Simp reg = <0x80000000 0x60000000>; /* 1536 MB */ 22279377Simp }; 23279377Simp 24279377Simp evm_3v3_sd: fixedregulator-sd { 25279377Simp compatible = "regulator-fixed"; 26279377Simp regulator-name = "evm_3v3_sd"; 27279377Simp regulator-min-microvolt = <3300000>; 28279377Simp regulator-max-microvolt = <3300000>; 29279377Simp enable-active-high; 30279377Simp gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; 31279377Simp }; 32279377Simp 33279377Simp evm_3v3_sw: fixedregulator-evm_3v3_sw { 34279377Simp compatible = "regulator-fixed"; 35279377Simp regulator-name = "evm_3v3_sw"; 36279377Simp regulator-min-microvolt = <3300000>; 37279377Simp regulator-max-microvolt = <3300000>; 38279377Simp }; 39279377Simp 40279377Simp aic_dvdd: fixedregulator-aic_dvdd { 41279377Simp /* TPS77018DBVT */ 42279377Simp compatible = "regulator-fixed"; 43279377Simp regulator-name = "aic_dvdd"; 44279377Simp vin-supply = <&evm_3v3_sw>; 45279377Simp regulator-min-microvolt = <1800000>; 46279377Simp regulator-max-microvolt = <1800000>; 47279377Simp }; 48279377Simp 49279377Simp extcon_usb1: extcon_usb1 { 50279377Simp compatible = "linux,extcon-usb-gpio"; 51279377Simp id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 52279377Simp }; 53279377Simp 54279377Simp extcon_usb2: extcon_usb2 { 55279377Simp compatible = "linux,extcon-usb-gpio"; 56279377Simp id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; 57279377Simp }; 58279377Simp 59279377Simp vtt_fixed: fixedregulator-vtt { 60279377Simp compatible = "regulator-fixed"; 61279377Simp regulator-name = "vtt_fixed"; 62279377Simp regulator-min-microvolt = <1350000>; 63279377Simp regulator-max-microvolt = <1350000>; 64279377Simp regulator-always-on; 65279377Simp regulator-boot-on; 66279377Simp enable-active-high; 67279377Simp gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; 68279377Simp }; 69279377Simp 70279377Simp sound0: sound@0 { 71279377Simp compatible = "simple-audio-card"; 72279377Simp simple-audio-card,name = "DRA7xx-EVM"; 73279377Simp simple-audio-card,widgets = 74279377Simp "Headphone", "Headphone Jack", 75279377Simp "Line", "Line Out", 76279377Simp "Microphone", "Mic Jack", 77279377Simp "Line", "Line In"; 78279377Simp simple-audio-card,routing = 79279377Simp "Headphone Jack", "HPLOUT", 80279377Simp "Headphone Jack", "HPROUT", 81279377Simp "Line Out", "LLOUT", 82279377Simp "Line Out", "RLOUT", 83279377Simp "MIC3L", "Mic Jack", 84279377Simp "MIC3R", "Mic Jack", 85279377Simp "Mic Jack", "Mic Bias", 86279377Simp "LINE1L", "Line In", 87279377Simp "LINE1R", "Line In"; 88279377Simp simple-audio-card,format = "dsp_b"; 89279377Simp simple-audio-card,bitclock-master = <&sound0_master>; 90279377Simp simple-audio-card,frame-master = <&sound0_master>; 91279377Simp simple-audio-card,bitclock-inversion; 92279377Simp 93279377Simp sound0_master: simple-audio-card,cpu { 94279377Simp sound-dai = <&mcasp3>; 95279377Simp system-clock-frequency = <5644800>; 96279377Simp }; 97279377Simp 98279377Simp simple-audio-card,codec { 99279377Simp sound-dai = <&tlv320aic3106>; 100279377Simp clocks = <&atl_clkin2_ck>; 101279377Simp }; 102279377Simp }; 103279377Simp 104279377Simp leds { 105279377Simp compatible = "gpio-leds"; 106279377Simp led@0 { 107279377Simp label = "dra7:usr1"; 108279377Simp gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>; 109279377Simp default-state = "off"; 110295436Sandrew }; 111279377Simp 112279377Simp led@1 { 113279377Simp label = "dra7:usr2"; 114279377Simp gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>; 115279377Simp default-state = "off"; 116279377Simp }; 117279377Simp 118295436Sandrew led@2 { 119279377Simp label = "dra7:usr3"; 120279377Simp gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>; 121279377Simp default-state = "off"; 122279377Simp }; 123279377Simp 124279377Simp led@3 { 125279377Simp label = "dra7:usr4"; 126295436Sandrew gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>; 127279377Simp default-state = "off"; 128279377Simp }; 129279377Simp }; 130279377Simp 131279377Simp gpio_keys { 132279377Simp compatible = "gpio-keys"; 133279377Simp #address-cells = <1>; 134295436Sandrew #size-cells = <0>; 135279377Simp autorepeat; 136279377Simp 137279377Simp USER1 { 138279377Simp label = "btnUser1"; 139279377Simp linux,code = <BTN_0>; 140279377Simp gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>; 141279377Simp }; 142295436Sandrew 143279377Simp USER2 { 144279377Simp label = "btnUser2"; 145279377Simp linux,code = <BTN_1>; 146279377Simp gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>; 147279377Simp }; 148279377Simp }; 149279377Simp}; 150295436Sandrew 151279377Simp&dra7_pmx_core { 152279377Simp pinctrl-names = "default"; 153279377Simp pinctrl-0 = <&vtt_pin>; 154279377Simp 155279377Simp vtt_pin: pinmux_vtt_pin { 156279377Simp pinctrl-single,pins = < 157279377Simp DRA7XX_CORE_IOPAD(0x37b4, PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */ 158279377Simp >; 159279377Simp }; 160279377Simp 161279377Simp i2c1_pins: pinmux_i2c1_pins { 162279377Simp pinctrl-single,pins = < 163279377Simp DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda */ 164279377Simp DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl */ 165279377Simp >; 166279377Simp }; 167279377Simp 168279377Simp i2c2_pins: pinmux_i2c2_pins { 169279377Simp pinctrl-single,pins = < 170279377Simp DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ 171279377Simp DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ 172279377Simp >; 173279377Simp }; 174279377Simp 175279377Simp i2c3_pins: pinmux_i2c3_pins { 176279377Simp pinctrl-single,pins = < 177279377Simp DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */ 178279377Simp DRA7XX_CORE_IOPAD(0x368c, PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */ 179279377Simp >; 180279377Simp }; 181279377Simp 182279377Simp mcspi1_pins: pinmux_mcspi1_pins { 183279377Simp pinctrl-single,pins = < 184279377Simp DRA7XX_CORE_IOPAD(0x37a4, PIN_INPUT | MUX_MODE0) /* spi1_sclk */ 185279377Simp DRA7XX_CORE_IOPAD(0x37a8, PIN_INPUT | MUX_MODE0) /* spi1_d1 */ 186279377Simp DRA7XX_CORE_IOPAD(0x37ac, PIN_INPUT | MUX_MODE0) /* spi1_d0 */ 187279377Simp DRA7XX_CORE_IOPAD(0x37b0, PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */ 188279377Simp DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */ 189279377Simp DRA7XX_CORE_IOPAD(0x37bc, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */ 190279377Simp >; 191279377Simp }; 192279377Simp 193279377Simp mcspi2_pins: pinmux_mcspi2_pins { 194279377Simp pinctrl-single,pins = < 195279377Simp DRA7XX_CORE_IOPAD(0x37c0, PIN_INPUT | MUX_MODE0) /* spi2_sclk */ 196279377Simp DRA7XX_CORE_IOPAD(0x37c4, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ 197279377Simp DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ 198279377Simp DRA7XX_CORE_IOPAD(0x37cc, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ 199279377Simp >; 200279377Simp }; 201279377Simp 202279377Simp uart1_pins: pinmux_uart1_pins { 203279377Simp pinctrl-single,pins = < 204279377Simp DRA7XX_CORE_IOPAD(0x37e0, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */ 205279377Simp DRA7XX_CORE_IOPAD(0x37e4, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */ 206279377Simp DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT | MUX_MODE3) /* uart1_ctsn */ 207279377Simp DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT | MUX_MODE3) /* uart1_rtsn */ 208279377Simp >; 209279377Simp }; 210279377Simp 211279377Simp uart2_pins: pinmux_uart2_pins { 212279377Simp pinctrl-single,pins = < 213279377Simp DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT | MUX_MODE0) /* uart2_rxd */ 214279377Simp DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT | MUX_MODE0) /* uart2_txd */ 215279377Simp DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ 216279377Simp DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT | MUX_MODE0) /* uart2_rtsn */ 217279377Simp >; 218279377Simp }; 219279377Simp 220279377Simp uart3_pins: pinmux_uart3_pins { 221279377Simp pinctrl-single,pins = < 222279377Simp DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ 223279377Simp DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ 224279377Simp >; 225279377Simp }; 226279377Simp 227279377Simp qspi1_pins: pinmux_qspi1_pins { 228279377Simp pinctrl-single,pins = < 229279377Simp DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ 230279377Simp DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ 231279377Simp DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ 232279377Simp DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ 233279377Simp DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ 234279377Simp DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ 235279377Simp DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ 236279377Simp DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ 237279377Simp DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ 238279377Simp DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ 239279377Simp >; 240279377Simp }; 241279377Simp 242279377Simp usb1_pins: pinmux_usb1_pins { 243279377Simp pinctrl-single,pins = < 244279377Simp DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ 245279377Simp >; 246279377Simp }; 247279377Simp 248279377Simp usb2_pins: pinmux_usb2_pins { 249279377Simp pinctrl-single,pins = < 250279377Simp DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */ 251279377Simp >; 252279377Simp }; 253279377Simp 254279377Simp nand_flash_x16: nand_flash_x16 { 255279377Simp /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch 256279377Simp * So NAND flash requires following switch settings: 257279377Simp * SW5.9 (GPMC_WPN) = LOW 258279377Simp * SW5.1 (NAND_BOOTn) = HIGH */ 259279377Simp pinctrl-single,pins = < 260279377Simp DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */ 261279377Simp DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */ 262295436Sandrew DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */ 263295436Sandrew DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */ 264295436Sandrew DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */ 265295436Sandrew DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */ 266295436Sandrew DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */ 267295436Sandrew DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */ 268295436Sandrew DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */ 269295436Sandrew DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */ 270279377Simp DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */ 271279377Simp DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */ 272279377Simp DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */ 273279377Simp DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */ 274279377Simp DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */ 275279377Simp DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */ 276279377Simp DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */ 277279377Simp DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */ 278279377Simp DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0 */ 279279377Simp DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */ 280279377Simp DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */ 281279377Simp DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */ 282279377Simp >; 283279377Simp }; 284279377Simp 285279377Simp cpsw_default: cpsw_default { 286279377Simp pinctrl-single,pins = < 287279377Simp /* Slave 1 */ 288279377Simp DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txc.rgmii0_txc */ 289279377Simp DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txctl.rgmii0_txctl */ 290279377Simp DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3.rgmii0_txd3 */ 291279377Simp DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd2.rgmii0_txd2 */ 292279377Simp DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd1.rgmii0_txd1 */ 293279377Simp DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd0.rgmii0_txd0 */ 294279377Simp DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */ 295279377Simp DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */ 296279377Simp DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */ 297279377Simp DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */ 298279377Simp DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */ 299279377Simp DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */ 300279377Simp 301279377Simp /* Slave 2 */ 302279377Simp DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */ 303279377Simp DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ 304279377Simp DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ 305279377Simp DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ 306279377Simp DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ 307279377Simp DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ 308279377Simp DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ 309279377Simp DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ 310279377Simp DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 311279377Simp DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 312279377Simp DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 313279377Simp DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 314279377Simp >; 315279377Simp 316279377Simp }; 317279377Simp 318279377Simp cpsw_sleep: cpsw_sleep { 319279377Simp pinctrl-single,pins = < 320279377Simp /* Slave 1 */ 321279377Simp DRA7XX_CORE_IOPAD(0x3650, MUX_MODE15) 322279377Simp DRA7XX_CORE_IOPAD(0x3654, MUX_MODE15) 323279377Simp DRA7XX_CORE_IOPAD(0x3658, MUX_MODE15) 324279377Simp DRA7XX_CORE_IOPAD(0x365c, MUX_MODE15) 325279377Simp DRA7XX_CORE_IOPAD(0x3660, MUX_MODE15) 326279377Simp DRA7XX_CORE_IOPAD(0x3664, MUX_MODE15) 327279377Simp DRA7XX_CORE_IOPAD(0x3668, MUX_MODE15) 328279377Simp DRA7XX_CORE_IOPAD(0x366c, MUX_MODE15) 329279377Simp DRA7XX_CORE_IOPAD(0x3670, MUX_MODE15) 330279377Simp DRA7XX_CORE_IOPAD(0x3674, MUX_MODE15) 331279377Simp DRA7XX_CORE_IOPAD(0x3678, MUX_MODE15) 332279377Simp DRA7XX_CORE_IOPAD(0x367c, MUX_MODE15) 333279377Simp 334279377Simp /* Slave 2 */ 335279377Simp DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15) 336279377Simp DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15) 337279377Simp DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15) 338279377Simp DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15) 339279377Simp DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15) 340279377Simp DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15) 341279377Simp DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15) 342279377Simp DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15) 343279377Simp DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15) 344279377Simp DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15) 345279377Simp DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15) 346279377Simp DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15) 347279377Simp >; 348279377Simp }; 349279377Simp 350279377Simp davinci_mdio_default: davinci_mdio_default { 351279377Simp pinctrl-single,pins = < 352279377Simp DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */ 353279377Simp DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 354279377Simp >; 355279377Simp }; 356279377Simp 357279377Simp davinci_mdio_sleep: davinci_mdio_sleep { 358279377Simp pinctrl-single,pins = < 359279377Simp DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15) 360279377Simp DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15) 361279377Simp >; 362279377Simp }; 363279377Simp 364279377Simp dcan1_pins_default: dcan1_pins_default { 365279377Simp pinctrl-single,pins = < 366279377Simp DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ 367279377Simp DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ 368279377Simp >; 369279377Simp }; 370279377Simp 371279377Simp dcan1_pins_sleep: dcan1_pins_sleep { 372279377Simp pinctrl-single,pins = < 373279377Simp DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ 374279377Simp DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */ 375279377Simp >; 376279377Simp }; 377279377Simp 378279377Simp atl_pins: pinmux_atl_pins { 379279377Simp pinctrl-single,pins = < 380279377Simp DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */ 381279377Simp DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */ 382279377Simp >; 383279377Simp }; 384279377Simp 385279377Simp mcasp3_pins: pinmux_mcasp3_pins { 386279377Simp pinctrl-single,pins = < 387279377Simp DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */ 388279377Simp DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */ 389279377Simp DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */ 390279377Simp DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */ 391279377Simp >; 392279377Simp }; 393279377Simp 394279377Simp mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins { 395279377Simp pinctrl-single,pins = < 396279377Simp DRA7XX_CORE_IOPAD(0x3724, MUX_MODE15) 397279377Simp DRA7XX_CORE_IOPAD(0x3728, MUX_MODE15) 398279377Simp DRA7XX_CORE_IOPAD(0x372c, MUX_MODE15) 399279377Simp DRA7XX_CORE_IOPAD(0x3730, MUX_MODE15) 400279377Simp >; 401279377Simp }; 402279377Simp}; 403279377Simp 404279377Simp&i2c1 { 405279377Simp status = "okay"; 406279377Simp pinctrl-names = "default"; 407279377Simp pinctrl-0 = <&i2c1_pins>; 408279377Simp clock-frequency = <400000>; 409279377Simp 410279377Simp tps659038: tps659038@58 { 411279377Simp compatible = "ti,tps659038"; 412279377Simp reg = <0x58>; 413279377Simp 414279377Simp tps659038_pmic { 415279377Simp compatible = "ti,tps659038-pmic"; 416279377Simp 417279377Simp regulators { 418279377Simp smps123_reg: smps123 { 419279377Simp /* VDD_MPU */ 420279377Simp regulator-name = "smps123"; 421279377Simp regulator-min-microvolt = < 850000>; 422279377Simp regulator-max-microvolt = <1250000>; 423279377Simp regulator-always-on; 424279377Simp regulator-boot-on; 425279377Simp }; 426279377Simp 427279377Simp smps45_reg: smps45 { 428279377Simp /* VDD_DSPEVE */ 429279377Simp regulator-name = "smps45"; 430279377Simp regulator-min-microvolt = < 850000>; 431279377Simp regulator-max-microvolt = <1150000>; 432279377Simp regulator-always-on; 433279377Simp regulator-boot-on; 434279377Simp }; 435279377Simp 436279377Simp smps6_reg: smps6 { 437279377Simp /* VDD_GPU - over VDD_SMPS6 */ 438279377Simp regulator-name = "smps6"; 439279377Simp regulator-min-microvolt = <850000>; 440279377Simp regulator-max-microvolt = <1250000>; 441279377Simp regulator-always-on; 442279377Simp regulator-boot-on; 443279377Simp }; 444279377Simp 445279377Simp smps7_reg: smps7 { 446279377Simp /* CORE_VDD */ 447279377Simp regulator-name = "smps7"; 448279377Simp regulator-min-microvolt = <850000>; 449279377Simp regulator-max-microvolt = <1060000>; 450279377Simp regulator-always-on; 451279377Simp regulator-boot-on; 452279377Simp }; 453279377Simp 454279377Simp smps8_reg: smps8 { 455279377Simp /* VDD_IVAHD */ 456279377Simp regulator-name = "smps8"; 457279377Simp regulator-min-microvolt = < 850000>; 458279377Simp regulator-max-microvolt = <1250000>; 459279377Simp regulator-always-on; 460279377Simp regulator-boot-on; 461279377Simp }; 462279377Simp 463279377Simp smps9_reg: smps9 { 464279377Simp /* VDDS1V8 */ 465279377Simp regulator-name = "smps9"; 466279377Simp regulator-min-microvolt = <1800000>; 467279377Simp regulator-max-microvolt = <1800000>; 468279377Simp regulator-always-on; 469279377Simp regulator-boot-on; 470279377Simp }; 471279377Simp 472279377Simp ldo1_reg: ldo1 { 473279377Simp /* LDO1_OUT --> SDIO */ 474279377Simp regulator-name = "ldo1"; 475279377Simp regulator-min-microvolt = <1800000>; 476279377Simp regulator-max-microvolt = <3300000>; 477279377Simp regulator-always-on; 478279377Simp regulator-boot-on; 479279377Simp }; 480279377Simp 481279377Simp ldo2_reg: ldo2 { 482279377Simp /* VDD_RTCIO */ 483279377Simp /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */ 484279377Simp regulator-name = "ldo2"; 485279377Simp regulator-min-microvolt = <3300000>; 486279377Simp regulator-max-microvolt = <3300000>; 487279377Simp regulator-always-on; 488279377Simp regulator-boot-on; 489279377Simp }; 490279377Simp 491279377Simp ldo3_reg: ldo3 { 492279377Simp /* VDDA_1V8_PHY */ 493279377Simp regulator-name = "ldo3"; 494279377Simp regulator-min-microvolt = <1800000>; 495279377Simp regulator-max-microvolt = <1800000>; 496279377Simp regulator-always-on; 497295436Sandrew regulator-boot-on; 498295436Sandrew }; 499295436Sandrew 500295436Sandrew ldo9_reg: ldo9 { 501295436Sandrew /* VDD_RTC */ 502295436Sandrew regulator-name = "ldo9"; 503295436Sandrew regulator-min-microvolt = <1050000>; 504295436Sandrew regulator-max-microvolt = <1050000>; 505295436Sandrew regulator-always-on; 506279377Simp regulator-boot-on; 507279377Simp regulator-allow-bypass; 508279377Simp }; 509279377Simp 510279377Simp ldoln_reg: ldoln { 511279377Simp /* VDDA_1V8_PLL */ 512279377Simp regulator-name = "ldoln"; 513279377Simp regulator-min-microvolt = <1800000>; 514279377Simp regulator-max-microvolt = <1800000>; 515279377Simp regulator-always-on; 516279377Simp regulator-boot-on; 517279377Simp }; 518279377Simp 519279377Simp ldousb_reg: ldousb { 520279377Simp /* VDDA_3V_USB: VDDA_USBHS33 */ 521279377Simp regulator-name = "ldousb"; 522279377Simp regulator-min-microvolt = <3300000>; 523279377Simp regulator-max-microvolt = <3300000>; 524279377Simp regulator-boot-on; 525279377Simp }; 526279377Simp }; 527279377Simp }; 528279377Simp }; 529279377Simp 530279377Simp pcf_lcd: gpio@20 { 531279377Simp compatible = "nxp,pcf8575"; 532279377Simp reg = <0x20>; 533279377Simp gpio-controller; 534279377Simp #gpio-cells = <2>; 535279377Simp interrupt-parent = <&gpio6>; 536279377Simp interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 537279377Simp interrupt-controller; 538279377Simp #interrupt-cells = <2>; 539279377Simp }; 540279377Simp 541279377Simp pcf_gpio_21: gpio@21 { 542279377Simp compatible = "ti,pcf8575"; 543279377Simp reg = <0x21>; 544279377Simp lines-initial-states = <0x1408>; 545279377Simp gpio-controller; 546279377Simp #gpio-cells = <2>; 547279377Simp interrupt-parent = <&gpio6>; 548279377Simp interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 549279377Simp interrupt-controller; 550279377Simp #interrupt-cells = <2>; 551279377Simp }; 552279377Simp 553279377Simp tlv320aic3106: tlv320aic3106@19 { 554279377Simp #sound-dai-cells = <0>; 555279377Simp compatible = "ti,tlv320aic3106"; 556279377Simp reg = <0x19>; 557279377Simp adc-settle-ms = <40>; 558279377Simp ai3x-micbias-vg = <1>; /* 2.0V */ 559279377Simp status = "okay"; 560279377Simp 561279377Simp /* Regulators */ 562279377Simp AVDD-supply = <&evm_3v3_sw>; 563279377Simp IOVDD-supply = <&evm_3v3_sw>; 564279377Simp DRVDD-supply = <&evm_3v3_sw>; 565279377Simp DVDD-supply = <&aic_dvdd>; 566279377Simp }; 567279377Simp}; 568279377Simp 569279377Simp&i2c2 { 570279377Simp status = "okay"; 571279377Simp pinctrl-names = "default"; 572279377Simp pinctrl-0 = <&i2c2_pins>; 573279377Simp clock-frequency = <400000>; 574279377Simp 575279377Simp pcf_hdmi: gpio@26 { 576279377Simp compatible = "nxp,pcf8575"; 577279377Simp reg = <0x26>; 578279377Simp gpio-controller; 579279377Simp #gpio-cells = <2>; 580279377Simp p1 { 581279377Simp /* vin6_sel_s0: high: VIN6, low: audio */ 582279377Simp gpio-hog; 583279377Simp gpios = <1 GPIO_ACTIVE_HIGH>; 584279377Simp output-low; 585279377Simp line-name = "vin6_sel_s0"; 586279377Simp }; 587279377Simp }; 588279377Simp}; 589279377Simp 590279377Simp&i2c3 { 591279377Simp status = "okay"; 592279377Simp pinctrl-names = "default"; 593279377Simp pinctrl-0 = <&i2c3_pins>; 594279377Simp clock-frequency = <400000>; 595279377Simp}; 596279377Simp 597279377Simp&mcspi1 { 598279377Simp status = "okay"; 599279377Simp pinctrl-names = "default"; 600279377Simp pinctrl-0 = <&mcspi1_pins>; 601279377Simp}; 602279377Simp 603279377Simp&mcspi2 { 604279377Simp status = "okay"; 605279377Simp pinctrl-names = "default"; 606279377Simp pinctrl-0 = <&mcspi2_pins>; 607279377Simp}; 608279377Simp 609279377Simp&uart1 { 610279377Simp status = "okay"; 611279377Simp pinctrl-names = "default"; 612279377Simp pinctrl-0 = <&uart1_pins>; 613279377Simp interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 614279377Simp <&dra7_pmx_core 0x3e0>; 615279377Simp}; 616279377Simp 617279377Simp&uart2 { 618279377Simp status = "okay"; 619279377Simp pinctrl-names = "default"; 620279377Simp pinctrl-0 = <&uart2_pins>; 621279377Simp}; 622279377Simp 623279377Simp&uart3 { 624279377Simp status = "okay"; 625279377Simp pinctrl-names = "default"; 626279377Simp pinctrl-0 = <&uart3_pins>; 627279377Simp}; 628279377Simp 629279377Simp&mmc1 { 630279377Simp status = "okay"; 631279377Simp vmmc-supply = <&evm_3v3_sd>; 632279377Simp vmmc_aux-supply = <&ldo1_reg>; 633279377Simp bus-width = <4>; 634279377Simp /* 635279377Simp * SDCD signal is not being used here - using the fact that GPIO mode 636279377Simp * is always hardwired. 637279377Simp */ 638279377Simp cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; 639279377Simp}; 640279377Simp 641279377Simp&mmc2 { 642279377Simp status = "okay"; 643279377Simp vmmc-supply = <&evm_3v3_sw>; 644279377Simp bus-width = <8>; 645279377Simp}; 646279377Simp 647279377Simp&cpu0 { 648279377Simp cpu0-supply = <&smps123_reg>; 649279377Simp}; 650279377Simp 651279377Simp&qspi { 652279377Simp status = "okay"; 653279377Simp pinctrl-names = "default"; 654279377Simp pinctrl-0 = <&qspi1_pins>; 655279377Simp 656279377Simp spi-max-frequency = <48000000>; 657279377Simp m25p80@0 { 658279377Simp compatible = "s25fl256s1"; 659279377Simp spi-max-frequency = <48000000>; 660279377Simp reg = <0>; 661279377Simp spi-tx-bus-width = <1>; 662279377Simp spi-rx-bus-width = <4>; 663279377Simp spi-cpol; 664279377Simp spi-cpha; 665279377Simp #address-cells = <1>; 666279377Simp #size-cells = <1>; 667279377Simp 668279377Simp /* MTD partition table. 669279377Simp * The ROM checks the first four physical blocks 670279377Simp * for a valid file to boot and the flash here is 671279377Simp * 64KiB block size. 672279377Simp */ 673279377Simp partition@0 { 674279377Simp label = "QSPI.SPL"; 675279377Simp reg = <0x00000000 0x000010000>; 676279377Simp }; 677279377Simp partition@1 { 678279377Simp label = "QSPI.SPL.backup1"; 679279377Simp reg = <0x00010000 0x00010000>; 680279377Simp }; 681279377Simp partition@2 { 682279377Simp label = "QSPI.SPL.backup2"; 683279377Simp reg = <0x00020000 0x00010000>; 684279377Simp }; 685279377Simp partition@3 { 686279377Simp label = "QSPI.SPL.backup3"; 687279377Simp reg = <0x00030000 0x00010000>; 688279377Simp }; 689279377Simp partition@4 { 690279377Simp label = "QSPI.u-boot"; 691279377Simp reg = <0x00040000 0x00100000>; 692279377Simp }; 693279377Simp partition@5 { 694279377Simp label = "QSPI.u-boot-spl-os"; 695279377Simp reg = <0x00140000 0x00080000>; 696279377Simp }; 697279377Simp partition@6 { 698279377Simp label = "QSPI.u-boot-env"; 699279377Simp reg = <0x001c0000 0x00010000>; 700279377Simp }; 701279377Simp partition@7 { 702279377Simp label = "QSPI.u-boot-env.backup1"; 703279377Simp reg = <0x001d0000 0x0010000>; 704279377Simp }; 705279377Simp partition@8 { 706279377Simp label = "QSPI.kernel"; 707279377Simp reg = <0x001e0000 0x0800000>; 708279377Simp }; 709279377Simp partition@9 { 710279377Simp label = "QSPI.file-system"; 711279377Simp reg = <0x009e0000 0x01620000>; 712279377Simp }; 713279377Simp }; 714279377Simp}; 715279377Simp 716279377Simp&omap_dwc3_1 { 717279377Simp extcon = <&extcon_usb1>; 718279377Simp}; 719279377Simp 720279377Simp&omap_dwc3_2 { 721279377Simp extcon = <&extcon_usb2>; 722279377Simp}; 723279377Simp 724279377Simp&usb1 { 725279377Simp dr_mode = "peripheral"; 726279377Simp pinctrl-names = "default"; 727279377Simp pinctrl-0 = <&usb1_pins>; 728279377Simp}; 729279377Simp 730279377Simp&usb2 { 731279377Simp dr_mode = "host"; 732279377Simp pinctrl-names = "default"; 733279377Simp pinctrl-0 = <&usb2_pins>; 734279377Simp}; 735279377Simp 736279377Simp&elm { 737279377Simp status = "okay"; 738279377Simp}; 739279377Simp 740279377Simp&gpmc { 741279377Simp status = "okay"; 742279377Simp pinctrl-names = "default"; 743279377Simp pinctrl-0 = <&nand_flash_x16>; 744279377Simp ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ 745279377Simp nand@0,0 { 746279377Simp reg = <0 0 4>; /* device IO registers */ 747279377Simp ti,nand-ecc-opt = "bch8"; 748279377Simp ti,elm-id = <&elm>; 749279377Simp nand-bus-width = <16>; 750279377Simp gpmc,device-width = <2>; 751279377Simp gpmc,sync-clk-ps = <0>; 752279377Simp gpmc,cs-on-ns = <0>; 753279377Simp gpmc,cs-rd-off-ns = <80>; 754279377Simp gpmc,cs-wr-off-ns = <80>; 755279377Simp gpmc,adv-on-ns = <0>; 756279377Simp gpmc,adv-rd-off-ns = <60>; 757279377Simp gpmc,adv-wr-off-ns = <60>; 758279377Simp gpmc,we-on-ns = <10>; 759279377Simp gpmc,we-off-ns = <50>; 760279377Simp gpmc,oe-on-ns = <4>; 761279377Simp gpmc,oe-off-ns = <40>; 762279377Simp gpmc,access-ns = <40>; 763279377Simp gpmc,wr-access-ns = <80>; 764279377Simp gpmc,rd-cycle-ns = <80>; 765279377Simp gpmc,wr-cycle-ns = <80>; 766279377Simp gpmc,bus-turnaround-ns = <0>; 767279377Simp gpmc,cycle2cycle-delay-ns = <0>; 768279377Simp gpmc,clk-activation-ns = <0>; 769279377Simp gpmc,wait-monitoring-ns = <0>; 770279377Simp gpmc,wr-data-mux-bus-ns = <0>; 771279377Simp /* MTD partition table */ 772279377Simp /* All SPL-* partitions are sized to minimal length 773279377Simp * which can be independently programmable. For 774279377Simp * NAND flash this is equal to size of erase-block */ 775 #address-cells = <1>; 776 #size-cells = <1>; 777 partition@0 { 778 label = "NAND.SPL"; 779 reg = <0x00000000 0x000020000>; 780 }; 781 partition@1 { 782 label = "NAND.SPL.backup1"; 783 reg = <0x00020000 0x00020000>; 784 }; 785 partition@2 { 786 label = "NAND.SPL.backup2"; 787 reg = <0x00040000 0x00020000>; 788 }; 789 partition@3 { 790 label = "NAND.SPL.backup3"; 791 reg = <0x00060000 0x00020000>; 792 }; 793 partition@4 { 794 label = "NAND.u-boot-spl-os"; 795 reg = <0x00080000 0x00040000>; 796 }; 797 partition@5 { 798 label = "NAND.u-boot"; 799 reg = <0x000c0000 0x00100000>; 800 }; 801 partition@6 { 802 label = "NAND.u-boot-env"; 803 reg = <0x001c0000 0x00020000>; 804 }; 805 partition@7 { 806 label = "NAND.u-boot-env.backup1"; 807 reg = <0x001e0000 0x00020000>; 808 }; 809 partition@8 { 810 label = "NAND.kernel"; 811 reg = <0x00200000 0x00800000>; 812 }; 813 partition@9 { 814 label = "NAND.file-system"; 815 reg = <0x00a00000 0x0f600000>; 816 }; 817 }; 818}; 819 820&usb2_phy1 { 821 phy-supply = <&ldousb_reg>; 822}; 823 824&usb2_phy2 { 825 phy-supply = <&ldousb_reg>; 826}; 827 828&gpio7 { 829 ti,no-reset-on-init; 830 ti,no-idle-on-init; 831}; 832 833&mac { 834 status = "okay"; 835 pinctrl-names = "default", "sleep"; 836 pinctrl-0 = <&cpsw_default>; 837 pinctrl-1 = <&cpsw_sleep>; 838 dual_emac; 839}; 840 841&cpsw_emac0 { 842 phy_id = <&davinci_mdio>, <2>; 843 phy-mode = "rgmii"; 844 dual_emac_res_vlan = <1>; 845}; 846 847&cpsw_emac1 { 848 phy_id = <&davinci_mdio>, <3>; 849 phy-mode = "rgmii"; 850 dual_emac_res_vlan = <2>; 851}; 852 853&davinci_mdio { 854 pinctrl-names = "default", "sleep"; 855 pinctrl-0 = <&davinci_mdio_default>; 856 pinctrl-1 = <&davinci_mdio_sleep>; 857}; 858 859&dcan1 { 860 status = "ok"; 861 pinctrl-names = "default", "sleep", "active"; 862 pinctrl-0 = <&dcan1_pins_sleep>; 863 pinctrl-1 = <&dcan1_pins_sleep>; 864 pinctrl-2 = <&dcan1_pins_default>; 865}; 866 867&atl { 868 pinctrl-names = "default"; 869 pinctrl-0 = <&atl_pins>; 870 871 assigned-clocks = <&abe_dpll_sys_clk_mux>, 872 <&atl_gfclk_mux>, 873 <&dpll_abe_ck>, 874 <&dpll_abe_m2x2_ck>, 875 <&atl_clkin2_ck>; 876 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; 877 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>; 878 879 status = "okay"; 880 881 atl2 { 882 bws = <DRA7_ATL_WS_MCASP2_FSX>; 883 aws = <DRA7_ATL_WS_MCASP3_FSX>; 884 }; 885}; 886 887&mcasp3 { 888 #sound-dai-cells = <0>; 889 pinctrl-names = "default", "sleep"; 890 pinctrl-0 = <&mcasp3_pins>; 891 pinctrl-1 = <&mcasp3_sleep_pins>; 892 893 assigned-clocks = <&mcasp3_ahclkx_mux>; 894 assigned-clock-parents = <&atl_clkin2_ck>; 895 896 status = "okay"; 897 898 op-mode = <0>; /* MCASP_IIS_MODE */ 899 tdm-slots = <2>; 900 /* 4 serializer */ 901 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 902 1 2 0 0 903 >; 904}; 905 906&mailbox5 { 907 status = "okay"; 908 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { 909 status = "okay"; 910 }; 911 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { 912 status = "okay"; 913 }; 914}; 915 916&mailbox6 { 917 status = "okay"; 918 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { 919 status = "okay"; 920 }; 921 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { 922 status = "okay"; 923 }; 924}; 925