dove.dtsi revision 295436
1279377Simp/include/ "skeleton.dtsi" 2279377Simp 3295436Sandrew#include <dt-bindings/gpio/gpio.h> 4295436Sandrew#include <dt-bindings/interrupt-controller/irq.h> 5295436Sandrew 6279377Simp#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) 7279377Simp 8279377Simp/ { 9279377Simp compatible = "marvell,dove"; 10279377Simp model = "Marvell Armada 88AP510 SoC"; 11279377Simp interrupt-parent = <&intc>; 12279377Simp 13279377Simp aliases { 14279377Simp gpio0 = &gpio0; 15279377Simp gpio1 = &gpio1; 16279377Simp gpio2 = &gpio2; 17279377Simp }; 18279377Simp 19279377Simp cpus { 20279377Simp #address-cells = <1>; 21279377Simp #size-cells = <0>; 22279377Simp 23279377Simp cpu0: cpu@0 { 24279377Simp compatible = "marvell,pj4a", "marvell,sheeva-v7"; 25279377Simp device_type = "cpu"; 26279377Simp next-level-cache = <&l2>; 27279377Simp reg = <0>; 28279377Simp }; 29279377Simp }; 30279377Simp 31279377Simp l2: l2-cache { 32279377Simp compatible = "marvell,tauros2-cache"; 33279377Simp marvell,tauros2-cache-features = <0>; 34279377Simp }; 35279377Simp 36295436Sandrew gpu-subsystem { 37295436Sandrew compatible = "marvell,dove-gpu-subsystem"; 38295436Sandrew cores = <&gpu>; 39295436Sandrew status = "disabled"; 40295436Sandrew }; 41295436Sandrew 42295436Sandrew i2c-mux { 43295436Sandrew compatible = "i2c-mux-pinctrl"; 44295436Sandrew #address-cells = <1>; 45295436Sandrew #size-cells = <0>; 46295436Sandrew 47295436Sandrew i2c-parent = <&i2c>; 48295436Sandrew 49295436Sandrew pinctrl-names = "i2c0", "i2c1", "i2c2"; 50295436Sandrew pinctrl-0 = <&pmx_i2cmux_0>; 51295436Sandrew pinctrl-1 = <&pmx_i2cmux_1>; 52295436Sandrew pinctrl-2 = <&pmx_i2cmux_2>; 53295436Sandrew 54295436Sandrew i2c0: i2c@0 { 55295436Sandrew reg = <0>; 56295436Sandrew #address-cells = <1>; 57295436Sandrew #size-cells = <0>; 58295436Sandrew status = "okay"; 59295436Sandrew }; 60295436Sandrew 61295436Sandrew i2c1: i2c@1 { 62295436Sandrew reg = <1>; 63295436Sandrew #address-cells = <1>; 64295436Sandrew #size-cells = <0>; 65295436Sandrew /* Requires pmx_i2c1 on i2c controller node */ 66295436Sandrew status = "disabled"; 67295436Sandrew }; 68295436Sandrew 69295436Sandrew i2c2: i2c@2 { 70295436Sandrew reg = <2>; 71295436Sandrew #address-cells = <1>; 72295436Sandrew #size-cells = <0>; 73295436Sandrew /* Requires pmx_i2c2 on i2c controller node */ 74295436Sandrew status = "disabled"; 75295436Sandrew }; 76295436Sandrew }; 77295436Sandrew 78279377Simp mbus { 79279377Simp compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus"; 80279377Simp #address-cells = <2>; 81279377Simp #size-cells = <1>; 82279377Simp controller = <&mbusc>; 83279377Simp pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256M MEM space */ 84279377Simp pcie-io-aperture = <0xf2000000 0x00200000>; /* 2M I/O space */ 85279377Simp 86279377Simp ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x0100000 /* MBUS regs 1M */ 87279377Simp MBUS_ID(0xf0, 0x02) 0 0xf1800000 0x1000000 /* AXI regs 16M */ 88279377Simp MBUS_ID(0x01, 0xfd) 0 0xf8000000 0x8000000 /* BootROM 128M */ 89279377Simp MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ 90279377Simp MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ 91279377Simp 92279377Simp pcie: pcie-controller { 93279377Simp compatible = "marvell,dove-pcie"; 94279377Simp status = "disabled"; 95279377Simp device_type = "pci"; 96279377Simp #address-cells = <3>; 97279377Simp #size-cells = <2>; 98279377Simp 99279377Simp msi-parent = <&intc>; 100279377Simp bus-range = <0x00 0xff>; 101279377Simp 102279377Simp ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000 103279377Simp 0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000 104279377Simp 0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 Mem */ 105279377Simp 0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 I/O */ 106279377Simp 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ 107279377Simp 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ 108279377Simp 109295436Sandrew pcie0: pcie-port@0 { 110279377Simp device_type = "pci"; 111279377Simp status = "disabled"; 112279377Simp assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; 113279377Simp reg = <0x0800 0 0 0 0>; 114279377Simp clocks = <&gate_clk 4>; 115279377Simp marvell,pcie-port = <0>; 116279377Simp 117279377Simp #address-cells = <3>; 118279377Simp #size-cells = <2>; 119279377Simp ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 120279377Simp 0x81000000 0 0 0x81000000 0x1 0 1 0>; 121279377Simp 122279377Simp #interrupt-cells = <1>; 123279377Simp interrupt-map-mask = <0 0 0 0>; 124279377Simp interrupt-map = <0 0 0 0 &intc 16>; 125279377Simp }; 126279377Simp 127295436Sandrew pcie1: pcie-port@1 { 128279377Simp device_type = "pci"; 129279377Simp status = "disabled"; 130279377Simp assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; 131279377Simp reg = <0x1000 0 0 0 0>; 132279377Simp clocks = <&gate_clk 5>; 133279377Simp marvell,pcie-port = <1>; 134279377Simp 135279377Simp #address-cells = <3>; 136279377Simp #size-cells = <2>; 137279377Simp ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 138279377Simp 0x81000000 0 0 0x81000000 0x2 0 1 0>; 139279377Simp 140279377Simp #interrupt-cells = <1>; 141279377Simp interrupt-map-mask = <0 0 0 0>; 142279377Simp interrupt-map = <0 0 0 0 &intc 18>; 143279377Simp }; 144279377Simp }; 145279377Simp 146279377Simp internal-regs { 147279377Simp compatible = "simple-bus"; 148279377Simp #address-cells = <1>; 149279377Simp #size-cells = <1>; 150279377Simp ranges = <0x00000000 MBUS_ID(0xf0, 0x01) 0 0x0100000 /* MBUS regs 1M */ 151279377Simp 0x00800000 MBUS_ID(0xf0, 0x02) 0 0x1000000 /* AXI regs 16M */ 152279377Simp 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ 153279377Simp 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ 154279377Simp 155279377Simp spi0: spi-ctrl@10600 { 156279377Simp compatible = "marvell,orion-spi"; 157279377Simp #address-cells = <1>; 158279377Simp #size-cells = <0>; 159279377Simp cell-index = <0>; 160279377Simp interrupts = <6>; 161279377Simp reg = <0x10600 0x28>; 162279377Simp clocks = <&core_clk 0>; 163279377Simp pinctrl-0 = <&pmx_spi0>; 164279377Simp pinctrl-names = "default"; 165279377Simp status = "disabled"; 166279377Simp }; 167279377Simp 168295436Sandrew i2c: i2c-ctrl@11000 { 169279377Simp compatible = "marvell,mv64xxx-i2c"; 170279377Simp reg = <0x11000 0x20>; 171279377Simp #address-cells = <1>; 172279377Simp #size-cells = <0>; 173279377Simp interrupts = <11>; 174279377Simp clock-frequency = <400000>; 175279377Simp timeout-ms = <1000>; 176279377Simp clocks = <&core_clk 0>; 177295436Sandrew status = "okay"; 178279377Simp }; 179279377Simp 180279377Simp uart0: serial@12000 { 181279377Simp compatible = "ns16550a"; 182279377Simp reg = <0x12000 0x100>; 183279377Simp reg-shift = <2>; 184279377Simp interrupts = <7>; 185279377Simp clocks = <&core_clk 0>; 186279377Simp status = "disabled"; 187279377Simp }; 188279377Simp 189279377Simp uart1: serial@12100 { 190279377Simp compatible = "ns16550a"; 191279377Simp reg = <0x12100 0x100>; 192279377Simp reg-shift = <2>; 193279377Simp interrupts = <8>; 194279377Simp clocks = <&core_clk 0>; 195279377Simp pinctrl-0 = <&pmx_uart1>; 196279377Simp pinctrl-names = "default"; 197279377Simp status = "disabled"; 198279377Simp }; 199279377Simp 200279377Simp uart2: serial@12200 { 201279377Simp compatible = "ns16550a"; 202295436Sandrew reg = <0x12200 0x100>; 203279377Simp reg-shift = <2>; 204279377Simp interrupts = <9>; 205279377Simp clocks = <&core_clk 0>; 206279377Simp status = "disabled"; 207279377Simp }; 208279377Simp 209279377Simp uart3: serial@12300 { 210279377Simp compatible = "ns16550a"; 211295436Sandrew reg = <0x12300 0x100>; 212279377Simp reg-shift = <2>; 213279377Simp interrupts = <10>; 214279377Simp clocks = <&core_clk 0>; 215279377Simp status = "disabled"; 216279377Simp }; 217279377Simp 218279377Simp spi1: spi-ctrl@14600 { 219279377Simp compatible = "marvell,orion-spi"; 220279377Simp #address-cells = <1>; 221279377Simp #size-cells = <0>; 222279377Simp cell-index = <1>; 223279377Simp interrupts = <5>; 224279377Simp reg = <0x14600 0x28>; 225279377Simp clocks = <&core_clk 0>; 226279377Simp status = "disabled"; 227279377Simp }; 228279377Simp 229279377Simp mbusc: mbus-ctrl@20000 { 230279377Simp compatible = "marvell,mbus-controller"; 231279377Simp reg = <0x20000 0x80>, <0x800100 0x8>; 232279377Simp }; 233279377Simp 234279377Simp sysc: system-ctrl@20000 { 235279377Simp compatible = "marvell,orion-system-controller"; 236279377Simp reg = <0x20000 0x110>; 237279377Simp }; 238279377Simp 239279377Simp bridge_intc: bridge-interrupt-ctrl@20110 { 240279377Simp compatible = "marvell,orion-bridge-intc"; 241279377Simp interrupt-controller; 242279377Simp #interrupt-cells = <1>; 243279377Simp reg = <0x20110 0x8>; 244279377Simp interrupts = <0>; 245279377Simp marvell,#interrupts = <5>; 246279377Simp }; 247279377Simp 248279377Simp intc: main-interrupt-ctrl@20200 { 249279377Simp compatible = "marvell,orion-intc"; 250279377Simp interrupt-controller; 251279377Simp #interrupt-cells = <1>; 252279377Simp reg = <0x20200 0x10>, <0x20210 0x10>; 253279377Simp }; 254279377Simp 255279377Simp timer: timer@20300 { 256279377Simp compatible = "marvell,orion-timer"; 257279377Simp reg = <0x20300 0x20>; 258279377Simp interrupt-parent = <&bridge_intc>; 259279377Simp interrupts = <1>, <2>; 260279377Simp clocks = <&core_clk 0>; 261279377Simp }; 262279377Simp 263279377Simp watchdog@20300 { 264279377Simp compatible = "marvell,orion-wdt"; 265279377Simp reg = <0x20300 0x28>, <0x20108 0x4>; 266279377Simp interrupt-parent = <&bridge_intc>; 267279377Simp interrupts = <3>; 268279377Simp clocks = <&core_clk 0>; 269279377Simp }; 270279377Simp 271279377Simp crypto: crypto-engine@30000 { 272295436Sandrew compatible = "marvell,dove-crypto"; 273295436Sandrew reg = <0x30000 0x10000>; 274295436Sandrew reg-names = "regs"; 275279377Simp interrupts = <31>; 276279377Simp clocks = <&gate_clk 15>; 277295436Sandrew marvell,crypto-srams = <&crypto_sram>; 278295436Sandrew marvell,crypto-sram-size = <0x800>; 279279377Simp status = "okay"; 280279377Simp }; 281279377Simp 282279377Simp ehci0: usb-host@50000 { 283279377Simp compatible = "marvell,orion-ehci"; 284279377Simp reg = <0x50000 0x1000>; 285279377Simp interrupts = <24>; 286279377Simp clocks = <&gate_clk 0>; 287279377Simp status = "okay"; 288279377Simp }; 289279377Simp 290279377Simp ehci1: usb-host@51000 { 291279377Simp compatible = "marvell,orion-ehci"; 292279377Simp reg = <0x51000 0x1000>; 293279377Simp interrupts = <25>; 294279377Simp clocks = <&gate_clk 1>; 295279377Simp status = "okay"; 296279377Simp }; 297279377Simp 298279377Simp xor0: dma-engine@60800 { 299279377Simp compatible = "marvell,orion-xor"; 300279377Simp reg = <0x60800 0x100 301279377Simp 0x60a00 0x100>; 302279377Simp clocks = <&gate_clk 23>; 303279377Simp status = "okay"; 304279377Simp 305279377Simp channel0 { 306279377Simp interrupts = <39>; 307279377Simp dmacap,memcpy; 308279377Simp dmacap,xor; 309279377Simp }; 310279377Simp 311279377Simp channel1 { 312279377Simp interrupts = <40>; 313279377Simp dmacap,memcpy; 314279377Simp dmacap,xor; 315279377Simp }; 316279377Simp }; 317279377Simp 318279377Simp xor1: dma-engine@60900 { 319279377Simp compatible = "marvell,orion-xor"; 320279377Simp reg = <0x60900 0x100 321279377Simp 0x60b00 0x100>; 322279377Simp clocks = <&gate_clk 24>; 323279377Simp status = "okay"; 324279377Simp 325279377Simp channel0 { 326279377Simp interrupts = <42>; 327279377Simp dmacap,memcpy; 328279377Simp dmacap,xor; 329279377Simp }; 330279377Simp 331279377Simp channel1 { 332279377Simp interrupts = <43>; 333279377Simp dmacap,memcpy; 334279377Simp dmacap,xor; 335279377Simp }; 336279377Simp }; 337279377Simp 338279377Simp sdio1: sdio-host@90000 { 339279377Simp compatible = "marvell,dove-sdhci"; 340279377Simp reg = <0x90000 0x100>; 341279377Simp interrupts = <36>, <38>; 342279377Simp clocks = <&gate_clk 9>; 343279377Simp pinctrl-0 = <&pmx_sdio1>; 344279377Simp pinctrl-names = "default"; 345279377Simp status = "disabled"; 346279377Simp }; 347279377Simp 348279377Simp eth: ethernet-ctrl@72000 { 349279377Simp compatible = "marvell,orion-eth"; 350279377Simp #address-cells = <1>; 351279377Simp #size-cells = <0>; 352279377Simp reg = <0x72000 0x4000>; 353279377Simp clocks = <&gate_clk 2>; 354279377Simp marvell,tx-checksum-limit = <1600>; 355279377Simp status = "disabled"; 356279377Simp 357279377Simp ethernet-port@0 { 358279377Simp compatible = "marvell,orion-eth-port"; 359279377Simp reg = <0>; 360279377Simp interrupts = <29>; 361279377Simp /* overwrite MAC address in bootloader */ 362279377Simp local-mac-address = [00 00 00 00 00 00]; 363279377Simp phy-handle = <ðphy>; 364279377Simp }; 365279377Simp }; 366279377Simp 367279377Simp mdio: mdio-bus@72004 { 368279377Simp compatible = "marvell,orion-mdio"; 369279377Simp #address-cells = <1>; 370279377Simp #size-cells = <0>; 371279377Simp reg = <0x72004 0x84>; 372279377Simp interrupts = <30>; 373279377Simp clocks = <&gate_clk 2>; 374279377Simp status = "disabled"; 375279377Simp 376279377Simp ethphy: ethernet-phy { 377279377Simp /* set phy address in board file */ 378279377Simp }; 379279377Simp }; 380279377Simp 381279377Simp sdio0: sdio-host@92000 { 382279377Simp compatible = "marvell,dove-sdhci"; 383279377Simp reg = <0x92000 0x100>; 384279377Simp interrupts = <35>, <37>; 385279377Simp clocks = <&gate_clk 8>; 386279377Simp pinctrl-0 = <&pmx_sdio0>; 387279377Simp pinctrl-names = "default"; 388279377Simp status = "disabled"; 389279377Simp }; 390279377Simp 391279377Simp sata0: sata-host@a0000 { 392279377Simp compatible = "marvell,orion-sata"; 393279377Simp reg = <0xa0000 0x2400>; 394279377Simp interrupts = <62>; 395279377Simp clocks = <&gate_clk 3>; 396279377Simp phys = <&sata_phy0>; 397279377Simp phy-names = "port0"; 398279377Simp nr-ports = <1>; 399279377Simp status = "disabled"; 400279377Simp }; 401279377Simp 402279377Simp sata_phy0: sata-phy@a2000 { 403279377Simp compatible = "marvell,mvebu-sata-phy"; 404279377Simp reg = <0xa2000 0x0334>; 405279377Simp clocks = <&gate_clk 3>; 406279377Simp clock-names = "sata"; 407279377Simp #phy-cells = <0>; 408279377Simp status = "ok"; 409279377Simp }; 410279377Simp 411279377Simp audio0: audio-controller@b0000 { 412279377Simp compatible = "marvell,dove-audio"; 413279377Simp reg = <0xb0000 0x2210>; 414279377Simp interrupts = <19>, <20>; 415279377Simp clocks = <&gate_clk 12>; 416279377Simp clock-names = "internal"; 417279377Simp status = "disabled"; 418279377Simp }; 419279377Simp 420279377Simp audio1: audio-controller@b4000 { 421279377Simp compatible = "marvell,dove-audio"; 422279377Simp reg = <0xb4000 0x2210>; 423279377Simp interrupts = <21>, <22>; 424279377Simp clocks = <&gate_clk 13>; 425279377Simp clock-names = "internal"; 426279377Simp status = "disabled"; 427279377Simp }; 428279377Simp 429295436Sandrew pmu: power-management@d0000 { 430295436Sandrew compatible = "marvell,dove-pmu", "simple-bus"; 431295436Sandrew reg = <0xd0000 0x8000>, <0xd8000 0x8000>; 432295436Sandrew ranges = <0x00000000 0x000d0000 0x8000 433295436Sandrew 0x00008000 0x000d8000 0x8000>; 434295436Sandrew interrupts = <33>; 435295436Sandrew interrupt-controller; 436295436Sandrew #address-cells = <1>; 437295436Sandrew #size-cells = <1>; 438295436Sandrew #interrupt-cells = <1>; 439295436Sandrew #reset-cells = <1>; 440279377Simp 441295436Sandrew domains { 442295436Sandrew vpu_domain: vpu-domain { 443295436Sandrew #power-domain-cells = <0>; 444295436Sandrew marvell,pmu_pwr_mask = <0x00000008>; 445295436Sandrew marvell,pmu_iso_mask = <0x00000001>; 446295436Sandrew resets = <&pmu 16>; 447295436Sandrew }; 448279377Simp 449295436Sandrew gpu_domain: gpu-domain { 450295436Sandrew #power-domain-cells = <0>; 451295436Sandrew marvell,pmu_pwr_mask = <0x00000004>; 452295436Sandrew marvell,pmu_iso_mask = <0x00000002>; 453295436Sandrew resets = <&pmu 18>; 454295436Sandrew }; 455279377Simp }; 456279377Simp 457295436Sandrew thermal: thermal-diode@001c { 458295436Sandrew compatible = "marvell,dove-thermal"; 459295436Sandrew reg = <0x001c 0x0c>, <0x005c 0x08>; 460279377Simp }; 461279377Simp 462295436Sandrew gate_clk: clock-gating-ctrl@0038 { 463295436Sandrew compatible = "marvell,dove-gating-clock"; 464295436Sandrew reg = <0x0038 0x4>; 465295436Sandrew clocks = <&core_clk 0>; 466295436Sandrew #clock-cells = <1>; 467279377Simp }; 468279377Simp 469295436Sandrew divider_clk: core-clock@0064 { 470295436Sandrew compatible = "marvell,dove-divider-clock"; 471295436Sandrew reg = <0x0064 0x8>; 472295436Sandrew #clock-cells = <1>; 473279377Simp }; 474279377Simp 475295436Sandrew pinctrl: pin-ctrl@0200 { 476295436Sandrew compatible = "marvell,dove-pinctrl"; 477295436Sandrew reg = <0x0200 0x14>, 478295436Sandrew <0x0440 0x04>; 479295436Sandrew clocks = <&gate_clk 22>; 480279377Simp 481295436Sandrew pmx_gpio_0: pmx-gpio-0 { 482295436Sandrew marvell,pins = "mpp0"; 483295436Sandrew marvell,function = "gpio"; 484295436Sandrew }; 485279377Simp 486295436Sandrew pmx_gpio_1: pmx-gpio-1 { 487295436Sandrew marvell,pins = "mpp1"; 488295436Sandrew marvell,function = "gpio"; 489295436Sandrew }; 490279377Simp 491295436Sandrew pmx_gpio_2: pmx-gpio-2 { 492295436Sandrew marvell,pins = "mpp2"; 493295436Sandrew marvell,function = "gpio"; 494295436Sandrew }; 495279377Simp 496295436Sandrew pmx_gpio_3: pmx-gpio-3 { 497295436Sandrew marvell,pins = "mpp3"; 498295436Sandrew marvell,function = "gpio"; 499295436Sandrew }; 500279377Simp 501295436Sandrew pmx_gpio_4: pmx-gpio-4 { 502295436Sandrew marvell,pins = "mpp4"; 503295436Sandrew marvell,function = "gpio"; 504295436Sandrew }; 505279377Simp 506295436Sandrew pmx_gpio_5: pmx-gpio-5 { 507295436Sandrew marvell,pins = "mpp5"; 508295436Sandrew marvell,function = "gpio"; 509295436Sandrew }; 510279377Simp 511295436Sandrew pmx_gpio_6: pmx-gpio-6 { 512295436Sandrew marvell,pins = "mpp6"; 513295436Sandrew marvell,function = "gpio"; 514295436Sandrew }; 515279377Simp 516295436Sandrew pmx_gpio_7: pmx-gpio-7 { 517295436Sandrew marvell,pins = "mpp7"; 518295436Sandrew marvell,function = "gpio"; 519295436Sandrew }; 520279377Simp 521295436Sandrew pmx_gpio_8: pmx-gpio-8 { 522295436Sandrew marvell,pins = "mpp8"; 523295436Sandrew marvell,function = "gpio"; 524295436Sandrew }; 525279377Simp 526295436Sandrew pmx_gpio_9: pmx-gpio-9 { 527295436Sandrew marvell,pins = "mpp9"; 528295436Sandrew marvell,function = "gpio"; 529295436Sandrew }; 530279377Simp 531295436Sandrew pmx_pcie1_clkreq: pmx-pcie1-clkreq { 532295436Sandrew marvell,pins = "mpp9"; 533295436Sandrew marvell,function = "pex1"; 534295436Sandrew }; 535279377Simp 536295436Sandrew pmx_gpio_10: pmx-gpio-10 { 537295436Sandrew marvell,pins = "mpp10"; 538295436Sandrew marvell,function = "gpio"; 539295436Sandrew }; 540279377Simp 541295436Sandrew pmx_gpio_11: pmx-gpio-11 { 542295436Sandrew marvell,pins = "mpp11"; 543295436Sandrew marvell,function = "gpio"; 544295436Sandrew }; 545279377Simp 546295436Sandrew pmx_pcie0_clkreq: pmx-pcie0-clkreq { 547295436Sandrew marvell,pins = "mpp11"; 548295436Sandrew marvell,function = "pex0"; 549295436Sandrew }; 550279377Simp 551295436Sandrew pmx_gpio_12: pmx-gpio-12 { 552295436Sandrew marvell,pins = "mpp12"; 553295436Sandrew marvell,function = "gpio"; 554295436Sandrew }; 555279377Simp 556295436Sandrew pmx_gpio_13: pmx-gpio-13 { 557295436Sandrew marvell,pins = "mpp13"; 558295436Sandrew marvell,function = "gpio"; 559295436Sandrew }; 560279377Simp 561295436Sandrew pmx_audio1_extclk: pmx-audio1-extclk { 562295436Sandrew marvell,pins = "mpp13"; 563295436Sandrew marvell,function = "audio1"; 564295436Sandrew }; 565279377Simp 566295436Sandrew pmx_gpio_14: pmx-gpio-14 { 567295436Sandrew marvell,pins = "mpp14"; 568295436Sandrew marvell,function = "gpio"; 569295436Sandrew }; 570279377Simp 571295436Sandrew pmx_gpio_15: pmx-gpio-15 { 572295436Sandrew marvell,pins = "mpp15"; 573295436Sandrew marvell,function = "gpio"; 574295436Sandrew }; 575279377Simp 576295436Sandrew pmx_gpio_16: pmx-gpio-16 { 577295436Sandrew marvell,pins = "mpp16"; 578295436Sandrew marvell,function = "gpio"; 579295436Sandrew }; 580279377Simp 581295436Sandrew pmx_gpio_17: pmx-gpio-17 { 582295436Sandrew marvell,pins = "mpp17"; 583295436Sandrew marvell,function = "gpio"; 584295436Sandrew }; 585279377Simp 586295436Sandrew pmx_gpio_18: pmx-gpio-18 { 587295436Sandrew marvell,pins = "mpp18"; 588295436Sandrew marvell,function = "gpio"; 589295436Sandrew }; 590279377Simp 591295436Sandrew pmx_gpio_19: pmx-gpio-19 { 592295436Sandrew marvell,pins = "mpp19"; 593295436Sandrew marvell,function = "gpio"; 594295436Sandrew }; 595279377Simp 596295436Sandrew pmx_gpio_20: pmx-gpio-20 { 597295436Sandrew marvell,pins = "mpp20"; 598295436Sandrew marvell,function = "gpio"; 599295436Sandrew }; 600279377Simp 601295436Sandrew pmx_gpio_21: pmx-gpio-21 { 602295436Sandrew marvell,pins = "mpp21"; 603295436Sandrew marvell,function = "gpio"; 604295436Sandrew }; 605279377Simp 606295436Sandrew pmx_camera: pmx-camera { 607295436Sandrew marvell,pins = "mpp_camera"; 608295436Sandrew marvell,function = "camera"; 609295436Sandrew }; 610279377Simp 611295436Sandrew pmx_camera_gpio: pmx-camera-gpio { 612295436Sandrew marvell,pins = "mpp_camera"; 613295436Sandrew marvell,function = "gpio"; 614295436Sandrew }; 615279377Simp 616295436Sandrew pmx_sdio0: pmx-sdio0 { 617295436Sandrew marvell,pins = "mpp_sdio0"; 618295436Sandrew marvell,function = "sdio0"; 619295436Sandrew }; 620295436Sandrew 621295436Sandrew pmx_sdio0_gpio: pmx-sdio0-gpio { 622295436Sandrew marvell,pins = "mpp_sdio0"; 623295436Sandrew marvell,function = "gpio"; 624295436Sandrew }; 625295436Sandrew 626295436Sandrew pmx_sdio1: pmx-sdio1 { 627295436Sandrew marvell,pins = "mpp_sdio1"; 628295436Sandrew marvell,function = "sdio1"; 629295436Sandrew }; 630295436Sandrew 631295436Sandrew pmx_sdio1_gpio: pmx-sdio1-gpio { 632295436Sandrew marvell,pins = "mpp_sdio1"; 633295436Sandrew marvell,function = "gpio"; 634295436Sandrew }; 635295436Sandrew 636295436Sandrew pmx_audio1_gpio: pmx-audio1-gpio { 637295436Sandrew marvell,pins = "mpp_audio1"; 638295436Sandrew marvell,function = "gpio"; 639295436Sandrew }; 640295436Sandrew 641295436Sandrew pmx_audio1_i2s1_spdifo: pmx-audio1-i2s1-spdifo { 642295436Sandrew marvell,pins = "mpp_audio1"; 643295436Sandrew marvell,function = "i2s1/spdifo"; 644295436Sandrew }; 645295436Sandrew 646295436Sandrew pmx_spi0: pmx-spi0 { 647295436Sandrew marvell,pins = "mpp_spi0"; 648295436Sandrew marvell,function = "spi0"; 649295436Sandrew }; 650295436Sandrew 651295436Sandrew pmx_spi0_gpio: pmx-spi0-gpio { 652295436Sandrew marvell,pins = "mpp_spi0"; 653295436Sandrew marvell,function = "gpio"; 654295436Sandrew }; 655295436Sandrew 656295436Sandrew pmx_spi1_4_7: pmx-spi1-4-7 { 657295436Sandrew marvell,pins = "mpp4", "mpp5", 658295436Sandrew "mpp6", "mpp7"; 659295436Sandrew marvell,function = "spi1"; 660295436Sandrew }; 661295436Sandrew 662295436Sandrew pmx_spi1_20_23: pmx-spi1-20-23 { 663295436Sandrew marvell,pins = "mpp20", "mpp21", 664295436Sandrew "mpp22", "mpp23"; 665295436Sandrew marvell,function = "spi1"; 666295436Sandrew }; 667295436Sandrew 668295436Sandrew pmx_uart1: pmx-uart1 { 669295436Sandrew marvell,pins = "mpp_uart1"; 670295436Sandrew marvell,function = "uart1"; 671295436Sandrew }; 672295436Sandrew 673295436Sandrew pmx_uart1_gpio: pmx-uart1-gpio { 674295436Sandrew marvell,pins = "mpp_uart1"; 675295436Sandrew marvell,function = "gpio"; 676295436Sandrew }; 677295436Sandrew 678295436Sandrew pmx_nand: pmx-nand { 679295436Sandrew marvell,pins = "mpp_nand"; 680295436Sandrew marvell,function = "nand"; 681295436Sandrew }; 682295436Sandrew 683295436Sandrew pmx_nand_gpo: pmx-nand-gpo { 684295436Sandrew marvell,pins = "mpp_nand"; 685295436Sandrew marvell,function = "gpo"; 686295436Sandrew }; 687295436Sandrew 688295436Sandrew pmx_i2c1: pmx-i2c1 { 689295436Sandrew marvell,pins = "mpp17", "mpp19"; 690295436Sandrew marvell,function = "twsi"; 691295436Sandrew }; 692295436Sandrew 693295436Sandrew pmx_i2c2: pmx-i2c2 { 694295436Sandrew marvell,pins = "mpp_audio1"; 695295436Sandrew marvell,function = "twsi"; 696295436Sandrew }; 697295436Sandrew 698295436Sandrew pmx_ssp_i2c2: pmx-ssp-i2c2 { 699295436Sandrew marvell,pins = "mpp_audio1"; 700295436Sandrew marvell,function = "ssp/twsi"; 701295436Sandrew }; 702295436Sandrew 703295436Sandrew pmx_i2cmux_0: pmx-i2cmux-0 { 704295436Sandrew marvell,pins = "twsi"; 705295436Sandrew marvell,function = "twsi-opt1"; 706295436Sandrew }; 707295436Sandrew 708295436Sandrew pmx_i2cmux_1: pmx-i2cmux-1 { 709295436Sandrew marvell,pins = "twsi"; 710295436Sandrew marvell,function = "twsi-opt2"; 711295436Sandrew }; 712295436Sandrew 713295436Sandrew pmx_i2cmux_2: pmx-i2cmux-2 { 714295436Sandrew marvell,pins = "twsi"; 715295436Sandrew marvell,function = "twsi-opt3"; 716295436Sandrew }; 717279377Simp }; 718279377Simp 719295436Sandrew core_clk: core-clocks@0214 { 720295436Sandrew compatible = "marvell,dove-core-clock"; 721295436Sandrew reg = <0x0214 0x4>; 722295436Sandrew #clock-cells = <1>; 723279377Simp }; 724279377Simp 725295436Sandrew gpio0: gpio-ctrl@0400 { 726295436Sandrew compatible = "marvell,orion-gpio"; 727295436Sandrew #gpio-cells = <2>; 728295436Sandrew gpio-controller; 729295436Sandrew reg = <0x0400 0x20>; 730295436Sandrew ngpios = <32>; 731295436Sandrew interrupt-controller; 732295436Sandrew #interrupt-cells = <2>; 733295436Sandrew interrupt-parent = <&intc>; 734295436Sandrew interrupts = <12>, <13>, <14>, <60>; 735279377Simp }; 736279377Simp 737295436Sandrew gpio1: gpio-ctrl@0420 { 738295436Sandrew compatible = "marvell,orion-gpio"; 739295436Sandrew #gpio-cells = <2>; 740295436Sandrew gpio-controller; 741295436Sandrew reg = <0x0420 0x20>; 742295436Sandrew ngpios = <32>; 743295436Sandrew interrupt-controller; 744295436Sandrew #interrupt-cells = <2>; 745295436Sandrew interrupt-parent = <&intc>; 746295436Sandrew interrupts = <61>; 747279377Simp }; 748279377Simp 749295436Sandrew rtc: real-time-clock@8500 { 750295436Sandrew compatible = "marvell,orion-rtc"; 751295436Sandrew reg = <0x8500 0x20>; 752295436Sandrew interrupts = <5>; 753279377Simp }; 754279377Simp }; 755279377Simp 756279377Simp gconf: global-config@e802c { 757279377Simp compatible = "marvell,dove-global-config", 758279377Simp "syscon"; 759279377Simp reg = <0xe802c 0x14>; 760279377Simp }; 761279377Simp 762279377Simp gpio2: gpio-ctrl@e8400 { 763279377Simp compatible = "marvell,orion-gpio"; 764279377Simp #gpio-cells = <2>; 765279377Simp gpio-controller; 766279377Simp reg = <0xe8400 0x0c>; 767279377Simp ngpios = <8>; 768279377Simp }; 769279377Simp 770279377Simp lcd1: lcd-controller@810000 { 771279377Simp compatible = "marvell,dove-lcd"; 772279377Simp reg = <0x810000 0x1000>; 773279377Simp interrupts = <46>; 774279377Simp status = "disabled"; 775279377Simp }; 776279377Simp 777279377Simp lcd0: lcd-controller@820000 { 778279377Simp compatible = "marvell,dove-lcd"; 779279377Simp reg = <0x820000 0x1000>; 780279377Simp interrupts = <47>; 781279377Simp status = "disabled"; 782279377Simp }; 783295436Sandrew 784295436Sandrew crypto_sram: sa-sram@ffffe000 { 785295436Sandrew compatible = "mmio-sram"; 786295436Sandrew reg = <0xffffe000 0x800>; 787295436Sandrew clocks = <&gate_clk 15>; 788295436Sandrew #address-cells = <1>; 789295436Sandrew #size-cells = <1>; 790295436Sandrew }; 791295436Sandrew 792295436Sandrew gpu: gpu@840000 { 793295436Sandrew clocks = <÷r_clk 1>; 794295436Sandrew clock-names = "core"; 795295436Sandrew compatible = "vivante,gc"; 796295436Sandrew interrupts = <48>; 797295436Sandrew power-domains = <&gpu_domain>; 798295436Sandrew reg = <0x840000 0x4000>; 799295436Sandrew status = "disabled"; 800295436Sandrew }; 801279377Simp }; 802279377Simp }; 803279377Simp}; 804