bcm63138.dtsi revision 295436
1279377Simp/* 2279377Simp * Broadcom BCM63138 DSL SoCs Device Tree 3279377Simp */ 4279377Simp 5279377Simp#include <dt-bindings/interrupt-controller/arm-gic.h> 6279377Simp#include <dt-bindings/interrupt-controller/irq.h> 7279377Simp 8279377Simp#include "skeleton.dtsi" 9279377Simp 10279377Simp/ { 11279377Simp compatible = "brcm,bcm63138"; 12279377Simp model = "Broadcom BCM63138 DSL SoC"; 13279377Simp interrupt-parent = <&gic>; 14279377Simp 15279377Simp aliases { 16279377Simp uart0 = &serial0; 17279377Simp uart1 = &serial1; 18279377Simp }; 19279377Simp 20279377Simp cpus { 21279377Simp #address-cells = <1>; 22279377Simp #size-cells = <0>; 23279377Simp 24279377Simp cpu@0 { 25279377Simp device_type = "cpu"; 26279377Simp compatible = "arm,cortex-a9"; 27279377Simp next-level-cache = <&L2>; 28279377Simp reg = <0>; 29295436Sandrew enable-method = "brcm,bcm63138"; 30279377Simp }; 31279377Simp 32279377Simp cpu@1 { 33279377Simp device_type = "cpu"; 34279377Simp compatible = "arm,cortex-a9"; 35279377Simp next-level-cache = <&L2>; 36279377Simp reg = <1>; 37295436Sandrew enable-method = "brcm,bcm63138"; 38295436Sandrew resets = <&pmb0 4 1>; 39279377Simp }; 40279377Simp }; 41279377Simp 42279377Simp clocks { 43279377Simp #address-cells = <1>; 44279377Simp #size-cells = <0>; 45279377Simp 46295436Sandrew /* UBUS peripheral clock */ 47279377Simp periph_clk: periph_clk { 48279377Simp #clock-cells = <0>; 49279377Simp compatible = "fixed-clock"; 50279377Simp clock-frequency = <50000000>; 51279377Simp clock-output-names = "periph"; 52279377Simp }; 53295436Sandrew 54295436Sandrew /* peripheral clock for system timer */ 55295436Sandrew axi_clk: axi_clk { 56295436Sandrew #clock-cells = <0>; 57295436Sandrew compatible = "fixed-factor-clock"; 58295436Sandrew clocks = <&armpll>; 59295436Sandrew clock-div = <2>; 60295436Sandrew clock-mult = <1>; 61295436Sandrew }; 62295436Sandrew 63295436Sandrew /* APB bus clock */ 64295436Sandrew apb_clk: apb_clk { 65295436Sandrew #clock-cells = <0>; 66295436Sandrew compatible = "fixed-factor-clock"; 67295436Sandrew clocks = <&armpll>; 68295436Sandrew clock-div = <4>; 69295436Sandrew clock-mult = <1>; 70295436Sandrew }; 71279377Simp }; 72279377Simp 73279377Simp /* ARM bus */ 74279377Simp axi@80000000 { 75279377Simp compatible = "simple-bus"; 76279377Simp ranges = <0 0x80000000 0x784000>; 77279377Simp #address-cells = <1>; 78279377Simp #size-cells = <1>; 79279377Simp 80279377Simp L2: cache-controller@1d000 { 81279377Simp compatible = "arm,pl310-cache"; 82279377Simp reg = <0x1d000 0x1000>; 83279377Simp cache-unified; 84279377Simp cache-level = <2>; 85279377Simp cache-size = <524288>; 86279377Simp cache-sets = <1024>; 87279377Simp cache-line-size = <32>; 88279377Simp interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; 89279377Simp }; 90279377Simp 91279377Simp scu: scu@1e000 { 92279377Simp compatible = "arm,cortex-a9-scu"; 93279377Simp reg = <0x1e000 0x100>; 94279377Simp }; 95279377Simp 96279377Simp gic: interrupt-controller@1e100 { 97279377Simp compatible = "arm,cortex-a9-gic"; 98279377Simp reg = <0x1f000 0x1000 99279377Simp 0x1e100 0x100>; 100279377Simp #interrupt-cells = <3>; 101279377Simp #address-cells = <0>; 102279377Simp interrupt-controller; 103279377Simp }; 104279377Simp 105279377Simp global_timer: timer@1e200 { 106279377Simp compatible = "arm,cortex-a9-global-timer"; 107279377Simp reg = <0x1e200 0x20>; 108279377Simp interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 109295436Sandrew clocks = <&axi_clk>; 110279377Simp }; 111279377Simp 112279377Simp local_timer: local-timer@1e600 { 113279377Simp compatible = "arm,cortex-a9-twd-timer"; 114279377Simp reg = <0x1e600 0x20>; 115279377Simp interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 116295436Sandrew clocks = <&axi_clk>; 117279377Simp }; 118279377Simp 119279377Simp twd_watchdog: watchdog@1e620 { 120279377Simp compatible = "arm,cortex-a9-twd-wdt"; 121279377Simp reg = <0x1e620 0x20>; 122279377Simp interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>; 123279377Simp }; 124295436Sandrew 125295436Sandrew armpll: armpll { 126295436Sandrew #clock-cells = <0>; 127295436Sandrew compatible = "brcm,bcm63138-armpll"; 128295436Sandrew clocks = <&periph_clk>; 129295436Sandrew reg = <0x20000 0xf00>; 130295436Sandrew }; 131295436Sandrew 132295436Sandrew pmb0: reset-controller@4800c0 { 133295436Sandrew compatible = "brcm,bcm63138-pmb"; 134295436Sandrew reg = <0x4800c0 0x10>; 135295436Sandrew #reset-cells = <2>; 136295436Sandrew }; 137295436Sandrew 138295436Sandrew pmb1: reset-controller@4800e0 { 139295436Sandrew compatible = "brcm,bcm63138-pmb"; 140295436Sandrew reg = <0x4800e0 0x10>; 141295436Sandrew #reset-cells = <2>; 142295436Sandrew }; 143279377Simp }; 144279377Simp 145279377Simp /* Legacy UBUS base */ 146279377Simp ubus@fffe8000 { 147279377Simp compatible = "simple-bus"; 148279377Simp #address-cells = <1>; 149279377Simp #size-cells = <1>; 150279377Simp ranges = <0 0xfffe8000 0x8100>; 151279377Simp 152295436Sandrew timer: timer@80 { 153295436Sandrew compatible = "brcm,bcm6328-timer", "syscon"; 154295436Sandrew reg = <0x80 0x3c>; 155295436Sandrew }; 156295436Sandrew 157279377Simp serial0: serial@600 { 158279377Simp compatible = "brcm,bcm6345-uart"; 159279377Simp reg = <0x600 0x1b>; 160279377Simp interrupts = <GIC_SPI 32 0>; 161279377Simp clocks = <&periph_clk>; 162279377Simp clock-names = "periph"; 163279377Simp status = "disabled"; 164279377Simp }; 165279377Simp 166279377Simp serial1: serial@620 { 167279377Simp compatible = "brcm,bcm6345-uart"; 168279377Simp reg = <0x620 0x1b>; 169279377Simp interrupts = <GIC_SPI 33 0>; 170279377Simp clocks = <&periph_clk>; 171279377Simp clock-names = "periph"; 172279377Simp status = "disabled"; 173279377Simp }; 174295436Sandrew 175295436Sandrew nand: nand@2000 { 176295436Sandrew #address-cells = <1>; 177295436Sandrew #size-cells = <0>; 178295436Sandrew compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand"; 179295436Sandrew reg = <0x2000 0x600>, <0xf0 0x10>; 180295436Sandrew reg-names = "nand", "nand-int-base"; 181295436Sandrew status = "disabled"; 182295436Sandrew interrupts = <GIC_SPI 38 0>; 183295436Sandrew interrupt-names = "nand"; 184295436Sandrew }; 185295436Sandrew 186295436Sandrew bootlut: bootlut@8000 { 187295436Sandrew compatible = "brcm,bcm63138-bootlut"; 188295436Sandrew reg = <0x8000 0x50>; 189295436Sandrew }; 190295436Sandrew 191295436Sandrew reboot { 192295436Sandrew compatible = "syscon-reboot"; 193295436Sandrew regmap = <&timer>; 194295436Sandrew offset = <0x34>; 195295436Sandrew mask = <1>; 196295436Sandrew }; 197279377Simp }; 198279377Simp}; 199