1279377Simp/* 2279377Simp * Broadcom BCM470X / BCM5301X ARM platform code. 3279377Simp * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015, 4279377Simp * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs 5279377Simp * 6279377Simp * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> 7279377Simp * 8279377Simp * Licensed under the GNU/GPL. See COPYING for details. 9279377Simp */ 10279377Simp 11295436Sandrew#include <dt-bindings/clock/bcm-nsp.h> 12279377Simp#include <dt-bindings/gpio/gpio.h> 13279377Simp#include <dt-bindings/input/input.h> 14279377Simp#include <dt-bindings/interrupt-controller/irq.h> 15279377Simp#include <dt-bindings/interrupt-controller/arm-gic.h> 16279377Simp#include "skeleton.dtsi" 17279377Simp 18279377Simp/ { 19279377Simp interrupt-parent = <&gic>; 20279377Simp 21279377Simp chipcommonA { 22279377Simp compatible = "simple-bus"; 23279377Simp ranges = <0x00000000 0x18000000 0x00001000>; 24279377Simp #address-cells = <1>; 25279377Simp #size-cells = <1>; 26279377Simp 27279377Simp uart0: serial@0300 { 28279377Simp compatible = "ns16550"; 29279377Simp reg = <0x0300 0x100>; 30279377Simp interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 31295436Sandrew clocks = <&iprocslow>; 32279377Simp status = "disabled"; 33279377Simp }; 34279377Simp 35279377Simp uart1: serial@0400 { 36279377Simp compatible = "ns16550"; 37279377Simp reg = <0x0400 0x100>; 38279377Simp interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 39295436Sandrew clocks = <&iprocslow>; 40279377Simp status = "disabled"; 41279377Simp }; 42279377Simp }; 43279377Simp 44279377Simp mpcore { 45279377Simp compatible = "simple-bus"; 46295436Sandrew ranges = <0x00000000 0x19000000 0x00023000>; 47279377Simp #address-cells = <1>; 48279377Simp #size-cells = <1>; 49279377Simp 50295436Sandrew a9pll: arm_clk@00000 { 51295436Sandrew #clock-cells = <0>; 52295436Sandrew compatible = "brcm,nsp-armpll"; 53295436Sandrew clocks = <&osc>; 54295436Sandrew reg = <0x00000 0x1000>; 55295436Sandrew }; 56295436Sandrew 57295436Sandrew scu@20000 { 58279377Simp compatible = "arm,cortex-a9-scu"; 59295436Sandrew reg = <0x20000 0x100>; 60279377Simp }; 61279377Simp 62295436Sandrew timer@20200 { 63279377Simp compatible = "arm,cortex-a9-global-timer"; 64295436Sandrew reg = <0x20200 0x100>; 65279377Simp interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 66295436Sandrew clocks = <&periph_clk>; 67279377Simp }; 68279377Simp 69295436Sandrew local-timer@20600 { 70279377Simp compatible = "arm,cortex-a9-twd-timer"; 71295436Sandrew reg = <0x20600 0x100>; 72279377Simp interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 73295436Sandrew clocks = <&periph_clk>; 74279377Simp }; 75279377Simp 76295436Sandrew gic: interrupt-controller@21000 { 77279377Simp compatible = "arm,cortex-a9-gic"; 78279377Simp #interrupt-cells = <3>; 79279377Simp #address-cells = <0>; 80279377Simp interrupt-controller; 81295436Sandrew reg = <0x21000 0x1000>, 82295436Sandrew <0x20100 0x100>; 83279377Simp }; 84279377Simp 85295436Sandrew L2: cache-controller@22000 { 86279377Simp compatible = "arm,pl310-cache"; 87295436Sandrew reg = <0x22000 0x1000>; 88279377Simp cache-unified; 89295436Sandrew arm,shared-override; 90295436Sandrew prefetch-data = <1>; 91295436Sandrew prefetch-instr = <1>; 92279377Simp cache-level = <2>; 93279377Simp }; 94279377Simp }; 95279377Simp 96295436Sandrew pmu { 97295436Sandrew compatible = "arm,cortex-a9-pmu"; 98295436Sandrew interrupts = 99295436Sandrew <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 100295436Sandrew <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 101295436Sandrew }; 102295436Sandrew 103279377Simp clocks { 104279377Simp #address-cells = <1>; 105295436Sandrew #size-cells = <1>; 106295436Sandrew ranges; 107279377Simp 108295436Sandrew osc: oscillator { 109295436Sandrew #clock-cells = <0>; 110279377Simp compatible = "fixed-clock"; 111295436Sandrew clock-frequency = <25000000>; 112295436Sandrew }; 113295436Sandrew 114295436Sandrew iprocmed: iprocmed { 115279377Simp #clock-cells = <0>; 116295436Sandrew compatible = "fixed-factor-clock"; 117295436Sandrew clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; 118295436Sandrew clock-div = <2>; 119295436Sandrew clock-mult = <1>; 120279377Simp }; 121295436Sandrew 122295436Sandrew iprocslow: iprocslow { 123295436Sandrew #clock-cells = <0>; 124295436Sandrew compatible = "fixed-factor-clock"; 125295436Sandrew clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; 126295436Sandrew clock-div = <4>; 127295436Sandrew clock-mult = <1>; 128295436Sandrew }; 129295436Sandrew 130295436Sandrew periph_clk: periph_clk { 131295436Sandrew #clock-cells = <0>; 132295436Sandrew compatible = "fixed-factor-clock"; 133295436Sandrew clocks = <&a9pll>; 134295436Sandrew clock-div = <2>; 135295436Sandrew clock-mult = <1>; 136295436Sandrew }; 137279377Simp }; 138279377Simp 139279377Simp axi@18000000 { 140279377Simp compatible = "brcm,bus-axi"; 141279377Simp reg = <0x18000000 0x1000>; 142279377Simp ranges = <0x00000000 0x18000000 0x00100000>; 143279377Simp #address-cells = <1>; 144279377Simp #size-cells = <1>; 145279377Simp 146279377Simp #interrupt-cells = <1>; 147279377Simp interrupt-map-mask = <0x000fffff 0xffff>; 148279377Simp interrupt-map = 149279377Simp /* ChipCommon */ 150279377Simp <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 151279377Simp 152295436Sandrew /* PCIe Controller 0 */ 153295436Sandrew <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 154295436Sandrew <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, 155295436Sandrew <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 156295436Sandrew <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 157295436Sandrew <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 158295436Sandrew <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 159295436Sandrew 160295436Sandrew /* PCIe Controller 1 */ 161295436Sandrew <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 162295436Sandrew <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 163295436Sandrew <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 164295436Sandrew <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 165295436Sandrew <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 166295436Sandrew <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 167295436Sandrew 168295436Sandrew /* PCIe Controller 2 */ 169295436Sandrew <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 170295436Sandrew <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 171295436Sandrew <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 172295436Sandrew <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 173295436Sandrew <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 174295436Sandrew <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 175295436Sandrew 176279377Simp /* USB 2.0 Controller */ 177279377Simp <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, 178279377Simp 179279377Simp /* USB 3.0 Controller */ 180279377Simp <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 181279377Simp 182279377Simp /* Ethernet Controller 0 */ 183279377Simp <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 184279377Simp 185279377Simp /* Ethernet Controller 1 */ 186279377Simp <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 187279377Simp 188279377Simp /* Ethernet Controller 2 */ 189279377Simp <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 190279377Simp 191279377Simp /* Ethernet Controller 3 */ 192279377Simp <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, 193279377Simp 194279377Simp /* NAND Controller */ 195279377Simp <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 196279377Simp <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 197279377Simp <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 198279377Simp <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 199279377Simp <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 200279377Simp <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 201279377Simp <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 202279377Simp <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 203279377Simp 204279377Simp chipcommon: chipcommon@0 { 205279377Simp reg = <0x00000000 0x1000>; 206279377Simp 207279377Simp gpio-controller; 208279377Simp #gpio-cells = <2>; 209279377Simp }; 210279377Simp }; 211295436Sandrew 212295436Sandrew lcpll0: lcpll0@1800c100 { 213295436Sandrew #clock-cells = <1>; 214295436Sandrew compatible = "brcm,nsp-lcpll0"; 215295436Sandrew reg = <0x1800c100 0x14>; 216295436Sandrew clocks = <&osc>; 217295436Sandrew clock-output-names = "lcpll0", "pcie_phy", "sdio", 218295436Sandrew "ddr_phy"; 219295436Sandrew }; 220295436Sandrew 221295436Sandrew genpll: genpll@1800c140 { 222295436Sandrew #clock-cells = <1>; 223295436Sandrew compatible = "brcm,nsp-genpll"; 224295436Sandrew reg = <0x1800c140 0x24>; 225295436Sandrew clocks = <&osc>; 226295436Sandrew clock-output-names = "genpll", "phy", "ethernetclk", 227295436Sandrew "usbclk", "iprocfast", "sata1", 228295436Sandrew "sata2"; 229295436Sandrew }; 230295436Sandrew 231295436Sandrew nand: nand@18028000 { 232295436Sandrew compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; 233295436Sandrew reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; 234295436Sandrew reg-names = "nand", "iproc-idm", "iproc-ext"; 235295436Sandrew interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 236295436Sandrew 237295436Sandrew #address-cells = <1>; 238295436Sandrew #size-cells = <0>; 239295436Sandrew 240295436Sandrew brcm,nand-has-wp; 241295436Sandrew }; 242279377Simp}; 243