bcm2835.dtsi revision 279377
1279377Simp/include/ "skeleton.dtsi" 2279377Simp 3279377Simp/ { 4279377Simp compatible = "brcm,bcm2835"; 5279377Simp model = "BCM2835"; 6279377Simp interrupt-parent = <&intc>; 7279377Simp 8279377Simp chosen { 9279377Simp bootargs = "earlyprintk console=ttyAMA0"; 10279377Simp }; 11279377Simp 12279377Simp soc { 13279377Simp compatible = "simple-bus"; 14279377Simp #address-cells = <1>; 15279377Simp #size-cells = <1>; 16279377Simp ranges = <0x7e000000 0x20000000 0x02000000>; 17279377Simp 18279377Simp timer@7e003000 { 19279377Simp compatible = "brcm,bcm2835-system-timer"; 20279377Simp reg = <0x7e003000 0x1000>; 21279377Simp interrupts = <1 0>, <1 1>, <1 2>, <1 3>; 22279377Simp clock-frequency = <1000000>; 23279377Simp }; 24279377Simp 25279377Simp dma: dma@7e007000 { 26279377Simp compatible = "brcm,bcm2835-dma"; 27279377Simp reg = <0x7e007000 0xf00>; 28279377Simp interrupts = <1 16>, 29279377Simp <1 17>, 30279377Simp <1 18>, 31279377Simp <1 19>, 32279377Simp <1 20>, 33279377Simp <1 21>, 34279377Simp <1 22>, 35279377Simp <1 23>, 36279377Simp <1 24>, 37279377Simp <1 25>, 38279377Simp <1 26>, 39279377Simp <1 27>, 40279377Simp <1 28>; 41279377Simp 42279377Simp #dma-cells = <1>; 43279377Simp brcm,dma-channel-mask = <0x7f35>; 44279377Simp }; 45279377Simp 46279377Simp intc: interrupt-controller@7e00b200 { 47279377Simp compatible = "brcm,bcm2835-armctrl-ic"; 48279377Simp reg = <0x7e00b200 0x200>; 49279377Simp interrupt-controller; 50279377Simp #interrupt-cells = <2>; 51279377Simp }; 52279377Simp 53279377Simp watchdog@7e100000 { 54279377Simp compatible = "brcm,bcm2835-pm-wdt"; 55279377Simp reg = <0x7e100000 0x28>; 56279377Simp }; 57279377Simp 58279377Simp rng@7e104000 { 59279377Simp compatible = "brcm,bcm2835-rng"; 60279377Simp reg = <0x7e104000 0x10>; 61279377Simp }; 62279377Simp 63279377Simp gpio: gpio@7e200000 { 64279377Simp compatible = "brcm,bcm2835-gpio"; 65279377Simp reg = <0x7e200000 0xb4>; 66279377Simp /* 67279377Simp * The GPIO IP block is designed for 3 banks of GPIOs. 68279377Simp * Each bank has a GPIO interrupt for itself. 69279377Simp * There is an overall "any bank" interrupt. 70279377Simp * In order, these are GIC interrupts 17, 18, 19, 20. 71279377Simp * Since the BCM2835 only has 2 banks, the 2nd bank 72279377Simp * interrupt output appears to be mirrored onto the 73279377Simp * 3rd bank's interrupt signal. 74279377Simp * So, a bank0 interrupt shows up on 17, 20, and 75279377Simp * a bank1 interrupt shows up on 18, 19, 20! 76279377Simp */ 77279377Simp interrupts = <2 17>, <2 18>, <2 19>, <2 20>; 78279377Simp 79279377Simp gpio-controller; 80279377Simp #gpio-cells = <2>; 81279377Simp 82279377Simp interrupt-controller; 83279377Simp #interrupt-cells = <2>; 84279377Simp }; 85279377Simp 86279377Simp uart@7e201000 { 87279377Simp compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; 88279377Simp reg = <0x7e201000 0x1000>; 89279377Simp interrupts = <2 25>; 90279377Simp clock-frequency = <3000000>; 91279377Simp arm,primecell-periphid = <0x00241011>; 92279377Simp }; 93279377Simp 94279377Simp i2s: i2s@7e203000 { 95279377Simp compatible = "brcm,bcm2835-i2s"; 96279377Simp reg = <0x7e203000 0x20>, 97279377Simp <0x7e101098 0x02>; 98279377Simp 99279377Simp dmas = <&dma 2>, 100279377Simp <&dma 3>; 101279377Simp dma-names = "tx", "rx"; 102279377Simp status = "disabled"; 103279377Simp }; 104279377Simp 105279377Simp spi: spi@7e204000 { 106279377Simp compatible = "brcm,bcm2835-spi"; 107279377Simp reg = <0x7e204000 0x1000>; 108279377Simp interrupts = <2 22>; 109279377Simp clocks = <&clk_spi>; 110279377Simp #address-cells = <1>; 111279377Simp #size-cells = <0>; 112279377Simp status = "disabled"; 113279377Simp }; 114279377Simp 115279377Simp i2c0: i2c@20205000 { 116279377Simp compatible = "brcm,bcm2835-i2c"; 117279377Simp reg = <0x7e205000 0x1000>; 118279377Simp interrupts = <2 21>; 119279377Simp clocks = <&clk_i2c>; 120279377Simp #address-cells = <1>; 121279377Simp #size-cells = <0>; 122279377Simp status = "disabled"; 123279377Simp }; 124279377Simp 125279377Simp sdhci: sdhci@7e300000 { 126279377Simp compatible = "brcm,bcm2835-sdhci"; 127279377Simp reg = <0x7e300000 0x100>; 128279377Simp interrupts = <2 30>; 129279377Simp clocks = <&clk_mmc>; 130279377Simp status = "disabled"; 131279377Simp }; 132279377Simp 133279377Simp i2c1: i2c@7e804000 { 134279377Simp compatible = "brcm,bcm2835-i2c"; 135279377Simp reg = <0x7e804000 0x1000>; 136279377Simp interrupts = <2 21>; 137279377Simp clocks = <&clk_i2c>; 138279377Simp #address-cells = <1>; 139279377Simp #size-cells = <0>; 140279377Simp status = "disabled"; 141279377Simp }; 142279377Simp 143279377Simp usb@7e980000 { 144279377Simp compatible = "brcm,bcm2835-usb"; 145279377Simp reg = <0x7e980000 0x10000>; 146279377Simp interrupts = <1 9>; 147279377Simp }; 148279377Simp 149279377Simp arm-pmu { 150279377Simp compatible = "arm,arm1176-pmu"; 151279377Simp }; 152279377Simp }; 153279377Simp 154279377Simp clocks { 155279377Simp compatible = "simple-bus"; 156279377Simp #address-cells = <1>; 157279377Simp #size-cells = <0>; 158279377Simp 159279377Simp clk_mmc: clock@0 { 160279377Simp compatible = "fixed-clock"; 161279377Simp reg = <0>; 162279377Simp #clock-cells = <0>; 163279377Simp clock-output-names = "mmc"; 164279377Simp clock-frequency = <100000000>; 165279377Simp }; 166279377Simp 167279377Simp clk_i2c: clock@1 { 168279377Simp compatible = "fixed-clock"; 169279377Simp reg = <1>; 170279377Simp #clock-cells = <0>; 171279377Simp clock-output-names = "i2c"; 172279377Simp clock-frequency = <250000000>; 173279377Simp }; 174279377Simp 175279377Simp clk_spi: clock@2 { 176279377Simp compatible = "fixed-clock"; 177279377Simp reg = <2>; 178279377Simp #clock-cells = <0>; 179279377Simp clock-output-names = "spi"; 180279377Simp clock-frequency = <250000000>; 181279377Simp }; 182279377Simp }; 183279377Simp}; 184