at91-sama5d2_xplained.dts revision 295011
1/* 2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board 3 * 4 * Copyright (C) 2015 Atmel, 5 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com> 6 * 7 * This file is dual-licensed: you can use it either under the terms 8 * of the GPL or the X11 license, at your option. Note that this dual 9 * licensing only applies to this file, and not this project as a 10 * whole. 11 * 12 * a) This file is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of the 15 * License, or (at your option) any later version. 16 * 17 * This file is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * Or, alternatively, 23 * 24 * b) Permission is hereby granted, free of charge, to any person 25 * obtaining a copy of this software and associated documentation 26 * files (the "Software"), to deal in the Software without 27 * restriction, including without limitation the rights to use, 28 * copy, modify, merge, publish, distribute, sublicense, and/or 29 * sell copies of the Software, and to permit persons to whom the 30 * Software is furnished to do so, subject to the following 31 * conditions: 32 * 33 * The above copyright notice and this permission notice shall be 34 * included in all copies or substantial portions of the Software. 35 * 36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 43 * OTHER DEALINGS IN THE SOFTWARE. 44 */ 45/dts-v1/; 46#include "sama5d2.dtsi" 47#include "sama5d2-pinfunc.h" 48#include <dt-bindings/mfd/atmel-flexcom.h> 49 50/ { 51 model = "Atmel SAMA5D2 Xplained"; 52 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; 53 54 chosen { 55 stdout-path = "serial0:115200n8"; 56 }; 57 58 memory { 59 reg = <0x20000000 0x80000>; 60 }; 61 62 clocks { 63 slow_xtal { 64 clock-frequency = <32768>; 65 }; 66 67 main_xtal { 68 clock-frequency = <12000000>; 69 }; 70 }; 71 72 ahb { 73 usb0: gadget@00300000 { 74 status = "okay"; 75 }; 76 77 usb1: ohci@00400000 { 78 num-ports = <3>; 79 status = "okay"; 80 }; 81 82 usb2: ehci@00500000 { 83 status = "okay"; 84 }; 85 86 sdmmc0: sdio-host@a0000000 { 87 bus-width = <8>; 88 pinctrl-names = "default"; 89 pinctrl-0 = <&pinctrl_sdmmc0_default>; 90 non-removable; 91 mmc-ddr-1_8v; 92 status = "okay"; 93 }; 94 95 sdmmc1: sdio-host@b0000000 { 96 bus-width = <4>; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_sdmmc1_default>; 99 status = "okay"; /* conflict with qspi0 */ 100 }; 101 102 apb { 103 spi0: spi@f8000000 { 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pinctrl_spi0_default>; 106 status = "okay"; 107 108 m25p80@0 { 109 compatible = "atmel,at25df321a"; 110 reg = <0>; 111 spi-max-frequency = <50000000>; 112 }; 113 }; 114 115 macb0: ethernet@f8008000 { 116 pinctrl-names = "default"; 117 pinctrl-0 = <&pinctrl_macb0_default>; 118 phy-mode = "rmii"; 119 status = "okay"; 120 }; 121 122 pdmic@f8018000 { 123 pinctrl-names = "default"; 124 pinctrl-0 = <&pinctrl_pdmic_default>; 125 atmel,model = "PDMIC @ sama5d2_xplained"; 126 atmel,mic-min-freq = <1000000>; 127 atmel,mic-max-freq = <3246000>; 128 atmel,mic-offset = <0x0>; 129 status = "okay"; 130 }; 131 132 uart1: serial@f8020000 { 133 pinctrl-names = "default"; 134 pinctrl-0 = <&pinctrl_uart1_default>; 135 status = "okay"; 136 }; 137 138 i2c0: i2c@f8028000 { 139 dmas = <0>, <0>; 140 pinctrl-names = "default"; 141 pinctrl-0 = <&pinctrl_i2c0_default>; 142 i2c-sda-hold-time-ns = <350>; 143 status = "okay"; 144 145 pmic: act8865@5b { 146 compatible = "active-semi,act8865"; 147 reg = <0x5b>; 148 active-semi,vsel-high; 149 status = "okay"; 150 151 regulators { 152 vdd_1v35_reg: DCDC_REG1 { 153 regulator-name = "VDD_1V35"; 154 regulator-min-microvolt = <1350000>; 155 regulator-max-microvolt = <1350000>; 156 regulator-always-on; 157 }; 158 159 vdd_1v2_reg: DCDC_REG2 { 160 regulator-name = "VDD_1V2"; 161 regulator-min-microvolt = <1100000>; 162 regulator-max-microvolt = <1300000>; 163 regulator-always-on; 164 }; 165 166 vdd_3v3_reg: DCDC_REG3 { 167 regulator-name = "VDD_3V3"; 168 regulator-min-microvolt = <3300000>; 169 regulator-max-microvolt = <3300000>; 170 regulator-always-on; 171 }; 172 173 vdd_fuse_reg: LDO_REG1 { 174 regulator-name = "VDD_FUSE"; 175 regulator-min-microvolt = <2500000>; 176 regulator-max-microvolt = <2500000>; 177 regulator-always-on; 178 }; 179 180 vdd_3v3_lp_reg: LDO_REG2 { 181 regulator-name = "VDD_3V3_LP"; 182 regulator-min-microvolt = <3300000>; 183 regulator-max-microvolt = <3300000>; 184 regulator-always-on; 185 }; 186 187 vdd_led_reg: LDO_REG3 { 188 regulator-name = "VDD_LED"; 189 regulator-min-microvolt = <3300000>; 190 regulator-max-microvolt = <3300000>; 191 regulator-always-on; 192 }; 193 194 vdd_sdhc_1v8_reg: LDO_REG4 { 195 regulator-name = "VDD_SDHC_1V8"; 196 regulator-min-microvolt = <1800000>; 197 regulator-max-microvolt = <1800000>; 198 regulator-always-on; 199 }; 200 }; 201 }; 202 }; 203 204 flx0: flexcom@f8034000 { 205 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 206 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ 207 208 uart5: serial@200 { 209 compatible = "atmel,at91sam9260-usart"; 210 reg = <0x200 0x200>; 211 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; 212 clocks = <&flx0_clk>; 213 clock-names = "usart"; 214 pinctrl-names = "default"; 215 pinctrl-0 = <&pinctrl_flx0_default>; 216 atmel,fifo-size = <32>; 217 status = "okay"; 218 }; 219 }; 220 221 watchdog@f8048040 { 222 status = "okay"; 223 }; 224 225 uart3: serial@fc008000 { 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_uart3_default>; 228 status = "okay"; 229 }; 230 231 flx4: flexcom@fc018000 { 232 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 233 status = "okay"; 234 235 i2c2: i2c@600 { 236 compatible = "atmel,sama5d2-i2c"; 237 reg = <0x600 0x200>; 238 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; 239 dmas = <0>, <0>; 240 dma-names = "tx", "rx"; 241 #address-cells = <1>; 242 #size-cells = <0>; 243 clocks = <&flx4_clk>; 244 pinctrl-names = "default"; 245 pinctrl-0 = <&pinctrl_flx4_default>; 246 atmel,fifo-size = <16>; 247 status = "okay"; 248 }; 249 }; 250 251 i2c1: i2c@fc028000 { 252 dmas = <0>, <0>; 253 pinctrl-names = "default"; 254 pinctrl-0 = <&pinctrl_i2c1_default>; 255 status = "okay"; 256 257 at24@54 { 258 compatible = "atmel,24c02"; 259 reg = <0x54>; 260 pagesize = <16>; 261 }; 262 }; 263 264 pinctrl@fc038000 { 265 pinctrl_flx0_default: flx0_default { 266 pinmux = <PIN_PB28__FLEXCOM0_IO0>, 267 <PIN_PB29__FLEXCOM0_IO1>; 268 bias-disable; 269 }; 270 271 pinctrl_flx4_default: flx4_default { 272 pinmux = <PIN_PD12__FLEXCOM4_IO0>, 273 <PIN_PD13__FLEXCOM4_IO1>; 274 bias-disable; 275 }; 276 277 pinctrl_i2c0_default: i2c0_default { 278 pinmux = <PIN_PD21__TWD0>, 279 <PIN_PD22__TWCK0>; 280 bias-disable; 281 }; 282 283 pinctrl_i2c1_default: i2c1_default { 284 pinmux = <PIN_PD4__TWD1>, 285 <PIN_PD5__TWCK1>; 286 bias-disable; 287 }; 288 289 pinctrl_macb0_default: macb0_default { 290 pinmux = <PIN_PB14__GTXCK>, 291 <PIN_PB15__GTXEN>, 292 <PIN_PB16__GRXDV>, 293 <PIN_PB17__GRXER>, 294 <PIN_PB18__GRX0>, 295 <PIN_PB19__GRX1>, 296 <PIN_PB20__GTX0>, 297 <PIN_PB21__GTX1>, 298 <PIN_PB22__GMDC>, 299 <PIN_PB23__GMDIO>; 300 bias-disable; 301 }; 302 303 pinctrl_pdmic_default: pdmic_default { 304 pinmux = <PIN_PB26__PDMIC_DAT>, 305 <PIN_PB27__PDMIC_CLK>; 306 bias-disable; 307 }; 308 309 pinctrl_sdmmc0_default: sdmmc0_default { 310 cmd_data { 311 pinmux = <PIN_PA1__SDMMC0_CMD>, 312 <PIN_PA2__SDMMC0_DAT0>, 313 <PIN_PA3__SDMMC0_DAT1>, 314 <PIN_PA4__SDMMC0_DAT2>, 315 <PIN_PA5__SDMMC0_DAT3>, 316 <PIN_PA6__SDMMC0_DAT4>, 317 <PIN_PA7__SDMMC0_DAT5>, 318 <PIN_PA8__SDMMC0_DAT6>, 319 <PIN_PA9__SDMMC0_DAT7>; 320 bias-pull-up; 321 }; 322 323 ck_cd_rstn_vddsel { 324 pinmux = <PIN_PA0__SDMMC0_CK>, 325 <PIN_PA10__SDMMC0_RSTN>, 326 <PIN_PA11__SDMMC0_VDDSEL>, 327 <PIN_PA13__SDMMC0_CD>; 328 bias-disable; 329 }; 330 }; 331 332 pinctrl_sdmmc1_default: sdmmc1_default { 333 cmd_data { 334 pinmux = <PIN_PA28__SDMMC1_CMD>, 335 <PIN_PA18__SDMMC1_DAT0>, 336 <PIN_PA19__SDMMC1_DAT1>, 337 <PIN_PA20__SDMMC1_DAT2>, 338 <PIN_PA21__SDMMC1_DAT3>; 339 bias-pull-up; 340 }; 341 342 conf-ck_cd { 343 pinmux = <PIN_PA22__SDMMC1_CK>, 344 <PIN_PA30__SDMMC1_CD>; 345 bias-disable; 346 }; 347 }; 348 349 pinctrl_spi0_default: spi0_default { 350 pinmux = <PIN_PA14__SPI0_SPCK>, 351 <PIN_PA15__SPI0_MOSI>, 352 <PIN_PA16__SPI0_MISO>, 353 <PIN_PA17__SPI0_NPCS0>; 354 bias-disable; 355 }; 356 357 pinctrl_uart1_default: uart1_default { 358 pinmux = <PIN_PD2__URXD1>, 359 <PIN_PD3__UTXD1>; 360 bias-disable; 361 }; 362 363 pinctrl_uart3_default: uart3_default { 364 pinmux = <PIN_PB11__URXD3>, 365 <PIN_PB12__UTXD3>; 366 bias-disable; 367 }; 368 }; 369 }; 370 }; 371}; 372