armada-xp.dtsi revision 279377
1279377Simp/* 2279377Simp * Device Tree Include file for Marvell Armada XP family SoC 3279377Simp * 4279377Simp * Copyright (C) 2012 Marvell 5279377Simp * 6279377Simp * Lior Amsalem <alior@marvell.com> 7279377Simp * Gregory CLEMENT <gregory.clement@free-electrons.com> 8279377Simp * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9279377Simp * Ben Dooks <ben.dooks@codethink.co.uk> 10279377Simp * 11279377Simp * This file is dual-licensed: you can use it either under the terms 12279377Simp * of the GPL or the X11 license, at your option. Note that this dual 13279377Simp * licensing only applies to this file, and not this project as a 14279377Simp * whole. 15279377Simp * 16279377Simp * a) This file is free software; you can redistribute it and/or 17279377Simp * modify it under the terms of the GNU General Public License as 18279377Simp * published by the Free Software Foundation; either version 2 of the 19279377Simp * License, or (at your option) any later version. 20279377Simp * 21279377Simp * This file is distributed in the hope that it will be useful 22279377Simp * but WITHOUT ANY WARRANTY; without even the implied warranty of 23279377Simp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 24279377Simp * GNU General Public License for more details. 25279377Simp * 26279377Simp * Or, alternatively 27279377Simp * 28279377Simp * b) Permission is hereby granted, free of charge, to any person 29279377Simp * obtaining a copy of this software and associated documentation 30279377Simp * files (the "Software"), to deal in the Software without 31279377Simp * restriction, including without limitation the rights to use 32279377Simp * copy, modify, merge, publish, distribute, sublicense, and/or 33279377Simp * sell copies of the Software, and to permit persons to whom the 34279377Simp * Software is furnished to do so, subject to the following 35279377Simp * conditions: 36279377Simp * 37279377Simp * The above copyright notice and this permission notice shall be 38279377Simp * included in all copies or substantial portions of the Software. 39279377Simp * 40279377Simp * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 41279377Simp * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 42279377Simp * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 43279377Simp * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 44279377Simp * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 45279377Simp * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 46279377Simp * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 47279377Simp * OTHER DEALINGS IN THE SOFTWARE. 48279377Simp * 49279377Simp * Contains definitions specific to the Armada XP SoC that are not 50279377Simp * common to all Armada SoCs. 51279377Simp */ 52279377Simp 53279377Simp#include "armada-370-xp.dtsi" 54279377Simp 55279377Simp/ { 56279377Simp model = "Marvell Armada XP family SoC"; 57279377Simp compatible = "marvell,armadaxp", "marvell,armada-370-xp"; 58279377Simp 59279377Simp aliases { 60279377Simp eth2 = ð2; 61279377Simp }; 62279377Simp 63279377Simp soc { 64279377Simp compatible = "marvell,armadaxp-mbus", "simple-bus"; 65279377Simp 66279377Simp bootrom { 67279377Simp compatible = "marvell,bootrom"; 68279377Simp reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>; 69279377Simp }; 70279377Simp 71279377Simp internal-regs { 72279377Simp sdramc@1400 { 73279377Simp compatible = "marvell,armada-xp-sdram-controller"; 74279377Simp reg = <0x1400 0x500>; 75279377Simp }; 76279377Simp 77279377Simp L2: l2-cache { 78279377Simp compatible = "marvell,aurora-system-cache"; 79279377Simp reg = <0x08000 0x1000>; 80279377Simp cache-id-part = <0x100>; 81279377Simp cache-unified; 82279377Simp wt-override; 83279377Simp }; 84279377Simp 85279377Simp spi0: spi@10600 { 86279377Simp pinctrl-0 = <&spi0_pins>; 87279377Simp pinctrl-names = "default"; 88279377Simp }; 89279377Simp 90279377Simp i2c0: i2c@11000 { 91279377Simp compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; 92279377Simp reg = <0x11000 0x100>; 93279377Simp }; 94279377Simp 95279377Simp i2c1: i2c@11100 { 96279377Simp compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; 97279377Simp reg = <0x11100 0x100>; 98279377Simp }; 99279377Simp 100279377Simp uart2: serial@12200 { 101279377Simp compatible = "snps,dw-apb-uart"; 102279377Simp pinctrl-0 = <&uart2_pins>; 103279377Simp pinctrl-names = "default"; 104279377Simp reg = <0x12200 0x100>; 105279377Simp reg-shift = <2>; 106279377Simp interrupts = <43>; 107279377Simp reg-io-width = <1>; 108279377Simp clocks = <&coreclk 0>; 109279377Simp status = "disabled"; 110279377Simp }; 111279377Simp 112279377Simp uart3: serial@12300 { 113279377Simp compatible = "snps,dw-apb-uart"; 114279377Simp pinctrl-0 = <&uart3_pins>; 115279377Simp pinctrl-names = "default"; 116279377Simp reg = <0x12300 0x100>; 117279377Simp reg-shift = <2>; 118279377Simp interrupts = <44>; 119279377Simp reg-io-width = <1>; 120279377Simp clocks = <&coreclk 0>; 121279377Simp status = "disabled"; 122279377Simp }; 123279377Simp 124279377Simp system-controller@18200 { 125279377Simp compatible = "marvell,armada-370-xp-system-controller"; 126279377Simp reg = <0x18200 0x500>; 127279377Simp }; 128279377Simp 129279377Simp gateclk: clock-gating-control@18220 { 130279377Simp compatible = "marvell,armada-xp-gating-clock"; 131279377Simp reg = <0x18220 0x4>; 132279377Simp clocks = <&coreclk 0>; 133279377Simp #clock-cells = <1>; 134279377Simp }; 135279377Simp 136279377Simp coreclk: mvebu-sar@18230 { 137279377Simp compatible = "marvell,armada-xp-core-clock"; 138279377Simp reg = <0x18230 0x08>; 139279377Simp #clock-cells = <1>; 140279377Simp }; 141279377Simp 142279377Simp thermal@182b0 { 143279377Simp compatible = "marvell,armadaxp-thermal"; 144279377Simp reg = <0x182b0 0x4 145279377Simp 0x184d0 0x4>; 146279377Simp status = "okay"; 147279377Simp }; 148279377Simp 149279377Simp cpuclk: clock-complex@18700 { 150279377Simp #clock-cells = <1>; 151279377Simp compatible = "marvell,armada-xp-cpu-clock"; 152279377Simp reg = <0x18700 0xA0>, <0x1c054 0x10>; 153279377Simp clocks = <&coreclk 1>; 154279377Simp }; 155279377Simp 156279377Simp interrupt-controller@20000 { 157279377Simp reg = <0x20a00 0x2d0>, <0x21070 0x58>; 158279377Simp }; 159279377Simp 160279377Simp timer@20300 { 161279377Simp compatible = "marvell,armada-xp-timer"; 162279377Simp clocks = <&coreclk 2>, <&refclk>; 163279377Simp clock-names = "nbclk", "fixed"; 164279377Simp }; 165279377Simp 166279377Simp watchdog@20300 { 167279377Simp compatible = "marvell,armada-xp-wdt"; 168279377Simp clocks = <&coreclk 2>, <&refclk>; 169279377Simp clock-names = "nbclk", "fixed"; 170279377Simp }; 171279377Simp 172279377Simp cpurst@20800 { 173279377Simp compatible = "marvell,armada-370-cpu-reset"; 174279377Simp reg = <0x20800 0x20>; 175279377Simp }; 176279377Simp 177279377Simp eth2: ethernet@30000 { 178279377Simp compatible = "marvell,armada-370-neta"; 179279377Simp reg = <0x30000 0x4000>; 180279377Simp interrupts = <12>; 181279377Simp clocks = <&gateclk 2>; 182279377Simp status = "disabled"; 183279377Simp }; 184279377Simp 185279377Simp usb@50000 { 186279377Simp clocks = <&gateclk 18>; 187279377Simp }; 188279377Simp 189279377Simp usb@51000 { 190279377Simp clocks = <&gateclk 19>; 191279377Simp }; 192279377Simp 193279377Simp usb@52000 { 194279377Simp compatible = "marvell,orion-ehci"; 195279377Simp reg = <0x52000 0x500>; 196279377Simp interrupts = <47>; 197279377Simp clocks = <&gateclk 20>; 198279377Simp status = "disabled"; 199279377Simp }; 200279377Simp 201279377Simp xor@60900 { 202279377Simp compatible = "marvell,orion-xor"; 203279377Simp reg = <0x60900 0x100 204279377Simp 0x60b00 0x100>; 205279377Simp clocks = <&gateclk 22>; 206279377Simp status = "okay"; 207279377Simp 208279377Simp xor10 { 209279377Simp interrupts = <51>; 210279377Simp dmacap,memcpy; 211279377Simp dmacap,xor; 212279377Simp }; 213279377Simp xor11 { 214279377Simp interrupts = <52>; 215279377Simp dmacap,memcpy; 216279377Simp dmacap,xor; 217279377Simp dmacap,memset; 218279377Simp }; 219279377Simp }; 220279377Simp 221279377Simp xor@f0900 { 222279377Simp compatible = "marvell,orion-xor"; 223279377Simp reg = <0xF0900 0x100 224279377Simp 0xF0B00 0x100>; 225279377Simp clocks = <&gateclk 28>; 226279377Simp status = "okay"; 227279377Simp 228279377Simp xor00 { 229279377Simp interrupts = <94>; 230279377Simp dmacap,memcpy; 231279377Simp dmacap,xor; 232279377Simp }; 233279377Simp xor01 { 234279377Simp interrupts = <95>; 235279377Simp dmacap,memcpy; 236279377Simp dmacap,xor; 237279377Simp dmacap,memset; 238279377Simp }; 239279377Simp }; 240279377Simp }; 241279377Simp }; 242279377Simp 243279377Simp clocks { 244279377Simp /* 25 MHz reference crystal */ 245279377Simp refclk: oscillator { 246279377Simp compatible = "fixed-clock"; 247279377Simp #clock-cells = <0>; 248279377Simp clock-frequency = <25000000>; 249279377Simp }; 250279377Simp }; 251279377Simp}; 252279377Simp 253279377Simp&pinctrl { 254279377Simp ge0_gmii_pins: ge0-gmii-pins { 255279377Simp marvell,pins = 256279377Simp "mpp0", "mpp1", "mpp2", "mpp3", 257279377Simp "mpp4", "mpp5", "mpp6", "mpp7", 258279377Simp "mpp8", "mpp9", "mpp10", "mpp11", 259279377Simp "mpp12", "mpp13", "mpp14", "mpp15", 260279377Simp "mpp16", "mpp17", "mpp18", "mpp19", 261279377Simp "mpp20", "mpp21", "mpp22", "mpp23"; 262279377Simp marvell,function = "ge0"; 263279377Simp }; 264279377Simp 265279377Simp ge0_rgmii_pins: ge0-rgmii-pins { 266279377Simp marvell,pins = 267279377Simp "mpp0", "mpp1", "mpp2", "mpp3", 268279377Simp "mpp4", "mpp5", "mpp6", "mpp7", 269279377Simp "mpp8", "mpp9", "mpp10", "mpp11"; 270279377Simp marvell,function = "ge0"; 271279377Simp }; 272279377Simp 273279377Simp ge1_rgmii_pins: ge1-rgmii-pins { 274279377Simp marvell,pins = 275279377Simp "mpp12", "mpp13", "mpp14", "mpp15", 276279377Simp "mpp16", "mpp17", "mpp18", "mpp19", 277279377Simp "mpp20", "mpp21", "mpp22", "mpp23"; 278279377Simp marvell,function = "ge1"; 279279377Simp }; 280279377Simp 281279377Simp sdio_pins: sdio-pins { 282279377Simp marvell,pins = "mpp30", "mpp31", "mpp32", 283279377Simp "mpp33", "mpp34", "mpp35"; 284279377Simp marvell,function = "sd0"; 285279377Simp }; 286279377Simp 287279377Simp spi0_pins: spi0-pins { 288279377Simp marvell,pins = "mpp36", "mpp37", 289279377Simp "mpp38", "mpp39"; 290279377Simp marvell,function = "spi"; 291279377Simp }; 292279377Simp 293279377Simp uart2_pins: uart2-pins { 294279377Simp marvell,pins = "mpp42", "mpp43"; 295279377Simp marvell,function = "uart2"; 296279377Simp }; 297279377Simp 298279377Simp uart3_pins: uart3-pins { 299279377Simp marvell,pins = "mpp44", "mpp45"; 300279377Simp marvell,function = "uart3"; 301279377Simp }; 302279377Simp}; 303