1279377Simp/* 2279377Simp * Device Tree file for Marvell RD-AXPWiFiAP. 3279377Simp * 4279377Simp * Note: this board is shipped with a new generation boot loader that 5279377Simp * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 6279377Simp * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the 7279377Simp * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used. 8279377Simp * 9279377Simp * Copyright (C) 2013 Marvell 10279377Simp * 11279377Simp * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12279377Simp * 13279377Simp * This file is dual-licensed: you can use it either under the terms 14279377Simp * of the GPL or the X11 license, at your option. Note that this dual 15279377Simp * licensing only applies to this file, and not this project as a 16279377Simp * whole. 17279377Simp * 18279377Simp * a) This file is free software; you can redistribute it and/or 19279377Simp * modify it under the terms of the GNU General Public License as 20279377Simp * published by the Free Software Foundation; either version 2 of the 21279377Simp * License, or (at your option) any later version. 22279377Simp * 23279377Simp * This file is distributed in the hope that it will be useful 24279377Simp * but WITHOUT ANY WARRANTY; without even the implied warranty of 25279377Simp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26279377Simp * GNU General Public License for more details. 27279377Simp * 28279377Simp * Or, alternatively 29279377Simp * 30279377Simp * b) Permission is hereby granted, free of charge, to any person 31279377Simp * obtaining a copy of this software and associated documentation 32279377Simp * files (the "Software"), to deal in the Software without 33279377Simp * restriction, including without limitation the rights to use 34279377Simp * copy, modify, merge, publish, distribute, sublicense, and/or 35279377Simp * sell copies of the Software, and to permit persons to whom the 36279377Simp * Software is furnished to do so, subject to the following 37279377Simp * conditions: 38279377Simp * 39279377Simp * The above copyright notice and this permission notice shall be 40279377Simp * included in all copies or substantial portions of the Software. 41279377Simp * 42279377Simp * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 43279377Simp * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 44279377Simp * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 45279377Simp * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 46279377Simp * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 47279377Simp * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 48279377Simp * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 49279377Simp * OTHER DEALINGS IN THE SOFTWARE. 50279377Simp */ 51279377Simp 52279377Simp/dts-v1/; 53279377Simp#include <dt-bindings/gpio/gpio.h> 54279377Simp#include <dt-bindings/input/input.h> 55279377Simp#include "armada-xp-mv78230.dtsi" 56279377Simp 57279377Simp/ { 58279377Simp model = "Marvell RD-AXPWiFiAP"; 59279377Simp compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; 60279377Simp 61279377Simp chosen { 62295436Sandrew stdout-path = "serial0:115200n8"; 63279377Simp }; 64279377Simp 65279377Simp memory { 66279377Simp device_type = "memory"; 67279377Simp reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */ 68279377Simp }; 69279377Simp 70279377Simp soc { 71279377Simp ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 72295436Sandrew MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 73295436Sandrew MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000 74295436Sandrew MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>; 75279377Simp 76279377Simp pcie-controller { 77279377Simp status = "okay"; 78279377Simp 79279377Simp /* First mini-PCIe port */ 80279377Simp pcie@1,0 { 81279377Simp /* Port 0, Lane 0 */ 82279377Simp status = "okay"; 83279377Simp }; 84279377Simp 85279377Simp /* Second mini-PCIe port */ 86279377Simp pcie@2,0 { 87279377Simp /* Port 0, Lane 1 */ 88279377Simp status = "okay"; 89279377Simp }; 90279377Simp 91279377Simp /* Renesas uPD720202 USB 3.0 controller */ 92279377Simp pcie@3,0 { 93279377Simp /* Port 0, Lane 3 */ 94279377Simp status = "okay"; 95279377Simp }; 96279377Simp }; 97279377Simp 98279377Simp internal-regs { 99279377Simp /* UART0 */ 100279377Simp serial@12000 { 101279377Simp status = "okay"; 102279377Simp }; 103279377Simp 104279377Simp /* UART1 */ 105279377Simp serial@12100 { 106279377Simp status = "okay"; 107279377Simp }; 108279377Simp 109279377Simp sata@a0000 { 110279377Simp nr-ports = <1>; 111279377Simp status = "okay"; 112279377Simp }; 113279377Simp 114279377Simp mdio { 115279377Simp phy0: ethernet-phy@0 { 116279377Simp reg = <0>; 117279377Simp }; 118279377Simp 119279377Simp phy1: ethernet-phy@1 { 120279377Simp reg = <1>; 121279377Simp }; 122279377Simp }; 123279377Simp 124279377Simp ethernet@70000 { 125279377Simp pinctrl-0 = <&ge0_rgmii_pins>; 126279377Simp pinctrl-names = "default"; 127279377Simp status = "okay"; 128279377Simp phy = <&phy0>; 129279377Simp phy-mode = "rgmii-id"; 130279377Simp }; 131279377Simp ethernet@74000 { 132279377Simp pinctrl-0 = <&ge1_rgmii_pins>; 133279377Simp pinctrl-names = "default"; 134279377Simp status = "okay"; 135279377Simp phy = <&phy1>; 136279377Simp phy-mode = "rgmii-id"; 137279377Simp }; 138279377Simp 139279377Simp spi0: spi@10600 { 140279377Simp status = "okay"; 141279377Simp 142279377Simp spi-flash@0 { 143279377Simp #address-cells = <1>; 144279377Simp #size-cells = <1>; 145295436Sandrew compatible = "n25q128a13", "jedec,spi-nor"; 146279377Simp reg = <0>; /* Chip select 0 */ 147279377Simp spi-max-frequency = <108000000>; 148279377Simp }; 149279377Simp }; 150279377Simp }; 151279377Simp }; 152279377Simp 153279377Simp gpio_keys { 154279377Simp compatible = "gpio-keys"; 155279377Simp #address-cells = <1>; 156279377Simp #size-cells = <0>; 157279377Simp pinctrl-0 = <&keys_pin>; 158279377Simp pinctrl-names = "default"; 159279377Simp 160279377Simp button@1 { 161279377Simp label = "Factory Reset Button"; 162279377Simp linux,code = <KEY_SETUP>; 163279377Simp gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 164279377Simp }; 165279377Simp }; 166279377Simp}; 167279377Simp 168279377Simp&pinctrl { 169279377Simp pinctrl-0 = <&phy_int_pin>; 170279377Simp pinctrl-names = "default"; 171279377Simp 172279377Simp keys_pin: keys-pin { 173279377Simp marvell,pins = "mpp33"; 174279377Simp marvell,function = "gpio"; 175279377Simp }; 176279377Simp 177279377Simp phy_int_pin: phy-int-pin { 178279377Simp marvell,pins = "mpp32"; 179279377Simp marvell,function = "gpio"; 180279377Simp }; 181279377Simp}; 182