1279377Simp/*
2279377Simp * Device Tree file for Marvell Armada 385 development board
3279377Simp * (RD-88F6820-GP)
4279377Simp *
5279377Simp * Copyright (C) 2014 Marvell
6279377Simp *
7279377Simp * Gregory CLEMENT <gregory.clement@free-electrons.com>
8279377Simp *
9279377Simp * This file is dual-licensed: you can use it either under the terms
10279377Simp * of the GPL or the X11 license, at your option. Note that this dual
11279377Simp * licensing only applies to this file, and not this project as a
12279377Simp * whole.
13279377Simp *
14279377Simp *  a) This file is licensed under the terms of the GNU General Public
15279377Simp *     License version 2.  This program is licensed "as is" without
16279377Simp *     any warranty of any kind, whether express or implied.
17279377Simp *
18279377Simp * Or, alternatively,
19279377Simp *
20279377Simp *  b) Permission is hereby granted, free of charge, to any person
21279377Simp *     obtaining a copy of this software and associated documentation
22279377Simp *     files (the "Software"), to deal in the Software without
23279377Simp *     restriction, including without limitation the rights to use,
24279377Simp *     copy, modify, merge, publish, distribute, sublicense, and/or
25279377Simp *     sell copies of the Software, and to permit persons to whom the
26279377Simp *     Software is furnished to do so, subject to the following
27279377Simp *     conditions:
28279377Simp *
29279377Simp *     The above copyright notice and this permission notice shall be
30279377Simp *     included in all copies or substantial portions of the Software.
31279377Simp *
32279377Simp *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33279377Simp *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34279377Simp *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35279377Simp *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36279377Simp *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37279377Simp *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38279377Simp *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39279377Simp *     OTHER DEALINGS IN THE SOFTWARE.
40279377Simp */
41279377Simp
42279377Simp/dts-v1/;
43279377Simp#include "armada-388.dtsi"
44279377Simp#include <dt-bindings/gpio/gpio.h>
45279377Simp
46279377Simp/ {
47279377Simp	model = "Marvell Armada 385 GP";
48279377Simp	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
49279377Simp
50279377Simp	chosen {
51295436Sandrew		stdout-path = "serial0:115200n8";
52279377Simp	};
53279377Simp
54279377Simp	memory {
55279377Simp		device_type = "memory";
56279377Simp		reg = <0x00000000 0x80000000>; /* 2 GB */
57279377Simp	};
58279377Simp
59279377Simp	soc {
60279377Simp		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61295436Sandrew			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62295436Sandrew			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63295436Sandrew			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
64279377Simp
65279377Simp		internal-regs {
66279377Simp			spi@10600 {
67279377Simp				pinctrl-names = "default";
68279377Simp				pinctrl-0 = <&spi0_pins>;
69279377Simp				status = "okay";
70279377Simp
71279377Simp				spi-flash@0 {
72279377Simp					#address-cells = <1>;
73279377Simp					#size-cells = <1>;
74295436Sandrew					compatible = "st,m25p128", "jedec,spi-nor";
75279377Simp					reg = <0>; /* Chip select 0 */
76279377Simp					spi-max-frequency = <50000000>;
77279377Simp					m25p,fast-read;
78279377Simp				};
79279377Simp			};
80279377Simp
81279377Simp			i2c@11000 {
82279377Simp				pinctrl-names = "default";
83279377Simp				pinctrl-0 = <&i2c0_pins>;
84279377Simp				status = "okay";
85279377Simp				clock-frequency = <100000>;
86279377Simp
87279377Simp				expander0: pca9555@20 {
88279377Simp					compatible = "nxp,pca9555";
89279377Simp					pinctrl-names = "default";
90279377Simp					pinctrl-0 = <&pca0_pins>;
91279377Simp					interrupt-parent = <&gpio0>;
92279377Simp					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
93279377Simp					gpio-controller;
94279377Simp					#gpio-cells = <2>;
95279377Simp					interrupt-controller;
96279377Simp					#interrupt-cells = <2>;
97279377Simp					reg = <0x20>;
98279377Simp				};
99279377Simp
100279377Simp				expander1: pca9555@21 {
101279377Simp					compatible = "nxp,pca9555";
102279377Simp					pinctrl-names = "default";
103279377Simp					interrupt-parent = <&gpio0>;
104279377Simp					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
105279377Simp					gpio-controller;
106279377Simp					#gpio-cells = <2>;
107279377Simp					interrupt-controller;
108279377Simp					#interrupt-cells = <2>;
109279377Simp					reg = <0x21>;
110279377Simp				};
111279377Simp
112295436Sandrew				eeprom@57 {
113295436Sandrew					compatible = "atmel,24c64";
114295436Sandrew					reg = <0x57>;
115295436Sandrew				};
116279377Simp			};
117279377Simp
118279377Simp			serial@12000 {
119279377Simp				/*
120279377Simp				 * Exported on the micro USB connector CON16
121279377Simp				 * through an FTDI
122279377Simp				 */
123279377Simp
124279377Simp				pinctrl-names = "default";
125279377Simp				pinctrl-0 = <&uart0_pins>;
126279377Simp				status = "okay";
127279377Simp			};
128279377Simp
129279377Simp			/* GE1 CON15 */
130279377Simp			ethernet@30000 {
131279377Simp				pinctrl-names = "default";
132279377Simp				pinctrl-0 = <&ge1_rgmii_pins>;
133279377Simp				status = "okay";
134279377Simp				phy = <&phy1>;
135279377Simp				phy-mode = "rgmii-id";
136279377Simp			};
137279377Simp
138279377Simp			/* CON4 */
139295436Sandrew			usb@58000 {
140279377Simp				vcc-supply = <&reg_usb2_0_vbus>;
141279377Simp				status = "okay";
142279377Simp			};
143279377Simp
144279377Simp			/* GE0 CON1 */
145279377Simp			ethernet@70000 {
146279377Simp				pinctrl-names = "default";
147279377Simp				/*
148279377Simp				 * The Reference Clock 0 is used to provide a
149279377Simp				 * clock to the PHY
150279377Simp				 */
151279377Simp				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
152279377Simp				status = "okay";
153279377Simp				phy = <&phy0>;
154279377Simp				phy-mode = "rgmii-id";
155279377Simp			};
156279377Simp
157279377Simp
158279377Simp			mdio@72004 {
159279377Simp				pinctrl-names = "default";
160279377Simp				pinctrl-0 = <&mdio_pins>;
161279377Simp
162279377Simp				phy0: ethernet-phy@1 {
163279377Simp					reg = <1>;
164279377Simp				};
165279377Simp
166279377Simp				phy1: ethernet-phy@0 {
167279377Simp					reg = <0>;
168279377Simp				};
169279377Simp			};
170279377Simp
171279377Simp			sata@a8000 {
172279377Simp				pinctrl-names = "default";
173279377Simp				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
174279377Simp				status = "okay";
175279377Simp				#address-cells = <1>;
176279377Simp				#size-cells = <0>;
177279377Simp
178279377Simp				sata0: sata-port@0 {
179279377Simp					reg = <0>;
180279377Simp					target-supply = <&reg_5v_sata0>;
181279377Simp				};
182279377Simp
183279377Simp				sata1: sata-port@1 {
184279377Simp					reg = <1>;
185279377Simp					target-supply = <&reg_5v_sata1>;
186279377Simp				};
187279377Simp			};
188279377Simp
189279377Simp			sata@e0000 {
190279377Simp				pinctrl-names = "default";
191279377Simp				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
192279377Simp				status = "okay";
193279377Simp				#address-cells = <1>;
194279377Simp				#size-cells = <0>;
195279377Simp
196279377Simp				sata2: sata-port@0 {
197279377Simp					reg = <0>;
198279377Simp					target-supply = <&reg_5v_sata2>;
199279377Simp				};
200279377Simp
201279377Simp				sata3: sata-port@1 {
202279377Simp					reg = <1>;
203279377Simp					target-supply = <&reg_5v_sata3>;
204279377Simp				};
205279377Simp			};
206279377Simp
207279377Simp			sdhci@d8000 {
208279377Simp				pinctrl-names = "default";
209279377Simp				pinctrl-0 = <&sdhci_pins>;
210279377Simp				no-1-8-v;
211295436Sandrew				/*
212295436Sandrew				 * A388-GP board v1.5 and higher replace
213295436Sandrew				 * hitherto card detection method based on GPIO
214295436Sandrew				 * with the one using DAT3 pin. As they are
215295436Sandrew				 * incompatible, software-based polling is
216295436Sandrew				 * enabled with 'broken-cd' property. For boards
217295436Sandrew				 * older than v1.5 it can be replaced with:
218295436Sandrew				 * 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;',
219295436Sandrew				 * whereas for the newer ones following can be
220295436Sandrew				 * used instead:
221295436Sandrew				 * 'dat3-cd;'
222295436Sandrew				 * 'cd-inverted;'
223295436Sandrew				 */
224295436Sandrew				broken-cd;
225279377Simp				wp-inverted;
226279377Simp				bus-width = <8>;
227279377Simp				status = "okay";
228279377Simp			};
229279377Simp
230279377Simp			/* CON5 */
231279377Simp			usb3@f0000 {
232279377Simp				vcc-supply = <&reg_usb2_1_vbus>;
233279377Simp				status = "okay";
234279377Simp			};
235279377Simp
236279377Simp			/* CON7 */
237279377Simp			usb3@f8000 {
238279377Simp				vcc-supply = <&reg_usb3_vbus>;
239279377Simp				status = "okay";
240279377Simp			};
241279377Simp		};
242279377Simp
243279377Simp		pcie-controller {
244279377Simp			status = "okay";
245279377Simp			/*
246279377Simp			 * One PCIe units is accessible through
247279377Simp			 * standard PCIe slot on the board.
248279377Simp			 */
249279377Simp			pcie@1,0 {
250279377Simp				/* Port 0, Lane 0 */
251279377Simp				status = "okay";
252279377Simp			};
253279377Simp
254279377Simp			/*
255279377Simp			 * The two other PCIe units are accessible
256279377Simp			 * through mini PCIe slot on the board.
257279377Simp			 */
258279377Simp			pcie@2,0 {
259279377Simp				/* Port 1, Lane 0 */
260279377Simp				status = "okay";
261279377Simp			};
262279377Simp			pcie@3,0 {
263279377Simp				/* Port 2, Lane 0 */
264279377Simp				status = "okay";
265279377Simp			};
266279377Simp		};
267279377Simp
268279377Simp		gpio-fan {
269279377Simp			compatible = "gpio-fan";
270279377Simp			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
271279377Simp			gpio-fan,speed-map = <	 0 0
272279377Simp					      3000 1>;
273279377Simp		};
274279377Simp	};
275279377Simp
276279377Simp	reg_usb3_vbus: usb3-vbus {
277279377Simp		compatible = "regulator-fixed";
278279377Simp		regulator-name = "usb3-vbus";
279279377Simp		regulator-min-microvolt = <5000000>;
280279377Simp		regulator-max-microvolt = <5000000>;
281279377Simp		enable-active-high;
282279377Simp		regulator-always-on;
283279377Simp		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
284279377Simp	};
285279377Simp
286279377Simp	reg_usb2_0_vbus: v5-vbus0 {
287279377Simp		compatible = "regulator-fixed";
288279377Simp		regulator-name = "v5.0-vbus0";
289279377Simp		regulator-min-microvolt = <5000000>;
290279377Simp		regulator-max-microvolt = <5000000>;
291279377Simp		enable-active-high;
292279377Simp		regulator-always-on;
293279377Simp		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
294279377Simp	};
295279377Simp
296279377Simp	reg_usb2_1_vbus: v5-vbus1 {
297279377Simp		compatible = "regulator-fixed";
298279377Simp		regulator-name = "v5.0-vbus1";
299279377Simp		regulator-min-microvolt = <5000000>;
300279377Simp		regulator-max-microvolt = <5000000>;
301279377Simp		enable-active-high;
302279377Simp		regulator-always-on;
303279377Simp		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
304279377Simp	};
305279377Simp
306279377Simp	reg_sata0: pwr-sata0 {
307279377Simp		compatible = "regulator-fixed";
308279377Simp		regulator-name = "pwr_en_sata0";
309295436Sandrew		regulator-min-microvolt = <12000000>;
310295436Sandrew		regulator-max-microvolt = <12000000>;
311279377Simp		enable-active-high;
312279377Simp		regulator-always-on;
313295436Sandrew		gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
314279377Simp	};
315279377Simp
316279377Simp	reg_5v_sata0: v5-sata0 {
317279377Simp		compatible = "regulator-fixed";
318279377Simp		regulator-name = "v5.0-sata0";
319279377Simp		regulator-min-microvolt = <5000000>;
320279377Simp		regulator-max-microvolt = <5000000>;
321279377Simp		regulator-always-on;
322279377Simp		vin-supply = <&reg_sata0>;
323279377Simp	};
324279377Simp
325279377Simp	reg_12v_sata0: v12-sata0 {
326279377Simp		compatible = "regulator-fixed";
327279377Simp		regulator-name = "v12.0-sata0";
328279377Simp		regulator-min-microvolt = <12000000>;
329279377Simp		regulator-max-microvolt = <12000000>;
330279377Simp		regulator-always-on;
331279377Simp		vin-supply = <&reg_sata0>;
332279377Simp	};
333279377Simp
334279377Simp	reg_sata1: pwr-sata1 {
335279377Simp		regulator-name = "pwr_en_sata1";
336279377Simp		compatible = "regulator-fixed";
337279377Simp		regulator-min-microvolt = <12000000>;
338279377Simp		regulator-max-microvolt = <12000000>;
339279377Simp		enable-active-high;
340279377Simp		regulator-always-on;
341279377Simp		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
342279377Simp	};
343279377Simp
344279377Simp	reg_5v_sata1: v5-sata1 {
345279377Simp		compatible = "regulator-fixed";
346279377Simp		regulator-name = "v5.0-sata1";
347279377Simp		regulator-min-microvolt = <5000000>;
348279377Simp		regulator-max-microvolt = <5000000>;
349279377Simp		regulator-always-on;
350279377Simp		vin-supply = <&reg_sata1>;
351279377Simp	};
352279377Simp
353279377Simp	reg_12v_sata1: v12-sata1 {
354279377Simp		compatible = "regulator-fixed";
355279377Simp		regulator-name = "v12.0-sata1";
356279377Simp		regulator-min-microvolt = <12000000>;
357279377Simp		regulator-max-microvolt = <12000000>;
358279377Simp		regulator-always-on;
359279377Simp		vin-supply = <&reg_sata1>;
360279377Simp	};
361279377Simp
362279377Simp	reg_sata2: pwr-sata2 {
363279377Simp		compatible = "regulator-fixed";
364279377Simp		regulator-name = "pwr_en_sata2";
365279377Simp		enable-active-high;
366279377Simp		regulator-always-on;
367279377Simp		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
368279377Simp	};
369279377Simp
370279377Simp	reg_5v_sata2: v5-sata2 {
371279377Simp		compatible = "regulator-fixed";
372279377Simp		regulator-name = "v5.0-sata2";
373279377Simp		regulator-min-microvolt = <5000000>;
374279377Simp		regulator-max-microvolt = <5000000>;
375279377Simp		regulator-always-on;
376279377Simp		vin-supply = <&reg_sata2>;
377279377Simp	};
378279377Simp
379279377Simp	reg_12v_sata2: v12-sata2 {
380279377Simp		compatible = "regulator-fixed";
381279377Simp		regulator-name = "v12.0-sata2";
382279377Simp		regulator-min-microvolt = <12000000>;
383279377Simp		regulator-max-microvolt = <12000000>;
384279377Simp		regulator-always-on;
385279377Simp		vin-supply = <&reg_sata2>;
386279377Simp	};
387279377Simp
388279377Simp	reg_sata3: pwr-sata3 {
389279377Simp		compatible = "regulator-fixed";
390279377Simp		regulator-name = "pwr_en_sata3";
391279377Simp		enable-active-high;
392279377Simp		regulator-always-on;
393279377Simp		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
394279377Simp	};
395279377Simp
396279377Simp	reg_5v_sata3: v5-sata3 {
397279377Simp		compatible = "regulator-fixed";
398279377Simp		regulator-name = "v5.0-sata3";
399279377Simp		regulator-min-microvolt = <5000000>;
400279377Simp		regulator-max-microvolt = <5000000>;
401279377Simp		regulator-always-on;
402279377Simp		vin-supply = <&reg_sata3>;
403279377Simp	};
404279377Simp
405279377Simp	reg_12v_sata3: v12-sata3 {
406279377Simp		compatible = "regulator-fixed";
407279377Simp		regulator-name = "v12.0-sata3";
408279377Simp		regulator-min-microvolt = <12000000>;
409279377Simp		regulator-max-microvolt = <12000000>;
410279377Simp		regulator-always-on;
411279377Simp		vin-supply = <&reg_sata3>;
412279377Simp	};
413279377Simp};
414279377Simp
415279377Simp&pinctrl {
416279377Simp	pca0_pins: pca0_pins {
417279377Simp		marvell,pins = "mpp18";
418279377Simp		marvell,function = "gpio";
419279377Simp	};
420279377Simp};
421