13584Ssos/*
23584Ssos * Device Tree file for D-Link DNS-327L
3230132Suqs *
43584Ssos * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
53584Ssos *
63584Ssos * This file is dual-licensed: you can use it either under the terms
73584Ssos * of the GPL or the X11 license, at your option. Note that this dual
83584Ssos * licensing only applies to this file, and not this project as a
93584Ssos * whole.
103584Ssos *
113584Ssos *  a) This file is free software; you can redistribute it and/or
123584Ssos *     modify it under the terms of the GNU General Public License as
133584Ssos *     published by the Free Software Foundation; either version 2 of the
143584Ssos *     License, or (at your option) any later version.
153584Ssos *
1613765Smpp *     This file is distributed in the hope that it will be useful
173584Ssos *     but WITHOUT ANY WARRANTY; without even the implied warranty of
183584Ssos *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
193584Ssos *     GNU General Public License for more details.
203584Ssos *
213584Ssos * Or, alternatively
223584Ssos *
233584Ssos *  b) Permission is hereby granted, free of charge, to any person
243584Ssos *     obtaining a copy of this software and associated documentation
253584Ssos *     files (the "Software"), to deal in the Software without
263584Ssos *     restriction, including without limitation the rights to use
273584Ssos *     copy, modify, merge, publish, distribute, sublicense, and/or
283584Ssos *     sell copies of the Software, and to permit persons to whom the
2950477Speter *     Software is furnished to do so, subject to the following
303584Ssos *     conditions:
313584Ssos *
323584Ssos *     The above copyright notice and this permission notice shall be
333584Ssos *     included in all copies or substantial portions of the Software.
343584Ssos *
353584Ssos *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
363584Ssos *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
373584Ssos *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
383584Ssos *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
393584Ssos *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
403584Ssos *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
413584Ssos *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
423584Ssos *     OTHER DEALINGS IN THE SOFTWARE.
433584Ssos */
443584Ssos
453584Ssos/* Remaining unsolved:
463584Ssos * There's still some unknown device on i2c address 0x13
473584Ssos */
483584Ssos
493584Ssos/dts-v1/;
503584Ssos
513584Ssos#include <dt-bindings/input/input.h>
523584Ssos#include <dt-bindings/gpio/gpio.h>
533584Ssos#include "armada-370.dtsi"
543584Ssos
553584Ssos/ {
563584Ssos	model = "D-Link DNS-327L";
573584Ssos	compatible = "dlink,dns327l",
583584Ssos		"marvell,armada370",
593584Ssos		"marvell,armada-370-xp";
603584Ssos
613584Ssos	chosen {
623584Ssos		stdout-path = &uart0;
633584Ssos	};
643584Ssos
653584Ssos	memory {
663584Ssos		device_type = "memory";
673584Ssos		reg = <0x00000000 0x20000000>; /* 512 MiB */
683584Ssos	};
693584Ssos
703584Ssos	soc {
713584Ssos		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
723584Ssos			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
733584Ssos			MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
743584Ssos
753584Ssos		pcie-controller {
763584Ssos			status = "okay";
773584Ssos
783584Ssos			pcie@1,0 {
793584Ssos				/* Port 0, Lane 0 */
803584Ssos				status = "okay";
813584Ssos			};
823584Ssos
833584Ssos			pcie@2,0 {
843584Ssos				/* Port 1, Lane 0 */
853584Ssos				status = "okay";
863584Ssos			};
873584Ssos		};
883584Ssos
893584Ssos		internal-regs {
903584Ssos			sata@a0000 {
913584Ssos				nr-ports = <2>;
923584Ssos				status = "okay";
933584Ssos			};
943584Ssos
953584Ssos			usb@50000 {
963584Ssos				status = "okay";
973584Ssos			};
983584Ssos
993584Ssos			nand@d0000 {
1003584Ssos				status = "okay";
1013584Ssos				num-cs = <1>;
1023584Ssos				marvell,nand-keep-config;
1033584Ssos				marvell,nand-enable-arbiter;
1043584Ssos				nand-on-flash-bbt;
1053584Ssos				nand-ecc-strength = <4>;
1063584Ssos				nand-ecc-step-size = <512>;
107
108				partition@0 {
109					label = "u-boot";
110					/* 1.0 MiB */
111					reg = <0x0000000 0x100000>;
112					read-only;
113				};
114
115				partition@100000 {
116					label = "u-boot-env";
117					/* 128 KiB */
118					reg = <0x100000 0x20000>;
119					read-only;
120				};
121
122				partition@120000 {
123					label = "uImage";
124					/* 7 MiB */
125					reg = <0x120000 0x700000>;
126				};
127
128				partition@820000 {
129					label = "ubifs";
130					/* ~ 84 MiB */
131					reg = <0x820000 0x54e0000>;
132				};
133
134				/* Hardcoded into stock bootloader */
135				partition@5d00000 {
136					label = "failsafe-uImage";
137					/* 5 MiB */
138					reg = <0x5d00000 0x500000>;
139				};
140
141				partition@6200000 {
142					label = "failsafe-fs";
143					/* 29 MiB */
144					reg = <0x6200000 0x1d00000>;
145				};
146
147				partition@7f00000 {
148					label = "bbt";
149					/* 1 MiB for BBT */
150					reg = <0x7f00000 0x100000>;
151				};
152			};
153		};
154	};
155
156	gpio-keys {
157		compatible = "gpio-keys";
158		pinctrl-0 = <
159			&backup_button_pin
160			&power_button_pin
161			&reset_button_pin>;
162		pinctrl-names = "default";
163
164		power-button {
165			label = "Power Button";
166			linux,code = <KEY_POWER>;
167			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
168		};
169
170		backup-button {
171			label = "Backup Button";
172			linux,code = <KEY_COPY>;
173			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
174		};
175
176		reset-button {
177			label = "Reset Button";
178			linux,code = <KEY_RESTART>;
179			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
180		};
181	};
182
183	gpio-leds {
184		compatible = "gpio-leds";
185		pinctrl-0 = <
186			&sata_l_amber_pin
187			&sata_r_amber_pin
188			&backup_led_pin
189			/* Ensure these are managed by hardware */
190			&sata_l_white_pin
191			&sata_r_white_pin>;
192
193		pinctrl-names = "default";
194
195		sata-r-amber-pin {
196			label = "dns327l:amber:sata-r";
197			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
198			default-state = "keep";
199		};
200
201		sata-l-amber-pin {
202			label = "dns327l:amber:sata-l";
203			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
204			default-state = "keep";
205		};
206
207		backup-led-pin {
208			label = "dns327l:white:usb";
209			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
210			default-state = "keep";
211		};
212	};
213
214	regulators {
215		compatible = "simple-bus";
216		#address-cells = <1>;
217		#size-cells = <0>;
218
219		usb_power: regulator@1 {
220			compatible = "regulator-fixed";
221			reg = <1>;
222			pinctrl-0 = <&xhci_pwr_pin>;
223			pinctrl-names = "default";
224			regulator-name = "USB3.0 Port Power";
225			regulator-min-microvolt = <5000000>;
226			regulator-max-microvolt = <5000000>;
227			enable-active-high;
228			regulator-boot-on;
229			regulator-always-on;
230			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
231		};
232
233		sata_r_power: regulator@2 {
234			compatible = "regulator-fixed";
235			reg = <2>;
236			pinctrl-0 = <&sata_r_pwr_pin>;
237			pinctrl-names = "default";
238			regulator-name = "SATA-R Power";
239			regulator-min-microvolt = <5000000>;
240			regulator-max-microvolt = <5000000>;
241			startup-delay-us = <2000000>;
242			enable-active-high;
243			regulator-always-on;
244			regulator-boot-on;
245			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
246		};
247
248		sata_l_power: regulator@3 {
249			compatible = "regulator-fixed";
250			reg = <3>;
251			pinctrl-0 = <&sata_l_pwr_pin>;
252			pinctrl-names = "default";
253			regulator-name = "SATA-L Power";
254			regulator-min-microvolt = <5000000>;
255			regulator-max-microvolt = <5000000>;
256			startup-delay-us = <4000000>;
257			enable-active-high;
258			regulator-always-on;
259			regulator-boot-on;
260			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
261		};
262	};
263};
264
265&pinctrl {
266	sata_l_white_pin: sata-l-white-pin {
267		marvell,pins = "mpp57";
268		marvell,function = "sata0";
269	};
270
271	sata_r_white_pin: sata-r-white-pin {
272		marvell,pins = "mpp55";
273		marvell,function = "sata1";
274	};
275
276	sata_r_amber_pin: sata-r-amber-pin {
277		marvell,pins = "mpp52";
278		marvell,function = "gpio";
279	};
280
281	sata_l_amber_pin: sata-l-amber-pin {
282		marvell,pins = "mpp53";
283		marvell,function = "gpio";
284	};
285
286	backup_led_pin: backup-led-pin {
287		marvell,pins = "mpp61";
288		marvell,function = "gpo";
289	};
290
291	xhci_pwr_pin: xhci-pwr-pin {
292		marvell,pins = "mpp13";
293		marvell,function = "gpio";
294	};
295
296	sata_r_pwr_pin: sata-r-pwr-pin {
297		marvell,pins = "mpp54";
298		marvell,function = "gpio";
299	};
300
301	sata_l_pwr_pin: sata-l-pwr-pin {
302		marvell,pins = "mpp56";
303		marvell,function = "gpio";
304	};
305
306	uart1_pins: uart1-pins {
307		marvell,pins = "mpp60", "mpp61";
308		marvell,function = "uart1";
309	};
310
311	power_button_pin: power-button-pin {
312		marvell,pins = "mpp65";
313		marvell,function = "gpio";
314	};
315
316	backup_button_pin: backup-button-pin {
317		marvell,pins = "mpp63";
318		marvell,function = "gpio";
319	};
320
321	reset_button_pin: reset-button-pin {
322		marvell,pins = "mpp64";
323		marvell,function = "gpio";
324	};
325};
326
327/* Serial console */
328&uart0 {
329	status = "okay";
330};
331
332/* Connected to Weltrend MCU */
333&uart1 {
334	pinctrl-0 = <&uart1_pins>;
335	pinctrl-names = "default";
336	status = "okay";
337};
338
339&mdio {
340	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
341		reg = <0>;
342		marvell,reg-init = <0x0 0x16 0x0 0x0002>,
343				<0x0 0x19 0x0 0x0077>,
344				<0x0 0x18 0x0 0x5747>;
345	};
346};
347
348&eth1 {
349	phy = <&phy0>;
350	phy-mode = "rgmii-id";
351	status = "okay";
352};
353
354&i2c0 {
355	compatible = "marvell,mv64xxx-i2c";
356	clock-frequency = <100000>;
357	status = "okay";
358};
359