am35xx-clocks.dtsi revision 303975
1409Sjjh/* 211884Sykantser * Device Tree Source for OMAP3 clock data 3409Sjjh * 4409Sjjh * Copyright (C) 2013 Texas Instruments, Inc. 5409Sjjh * 6409Sjjh * This program is free software; you can redistribute it and/or modify 7409Sjjh * it under the terms of the GNU General Public License version 2 as 8409Sjjh * published by the Free Software Foundation. 9409Sjjh */ 10409Sjjh&scm_clocks { 11409Sjjh emac_ick: emac_ick { 12409Sjjh #clock-cells = <0>; 13409Sjjh compatible = "ti,am35xx-gate-clock"; 14409Sjjh clocks = <&ipss_ick>; 15409Sjjh reg = <0x032c>; 16409Sjjh ti,bit-shift = <1>; 17409Sjjh }; 18409Sjjh 192362Sohair emac_fck: emac_fck { 202362Sohair #clock-cells = <0>; 212362Sohair compatible = "ti,gate-clock"; 22409Sjjh clocks = <&rmii_ck>; 23409Sjjh reg = <0x032c>; 24409Sjjh ti,bit-shift = <9>; 2516930Siignatyev }; 2616930Siignatyev 2716930Siignatyev vpfe_ick: vpfe_ick { 2816930Siignatyev #clock-cells = <0>; 29409Sjjh compatible = "ti,am35xx-gate-clock"; 3016930Siignatyev clocks = <&ipss_ick>; 3116930Siignatyev reg = <0x032c>; 3216930Siignatyev ti,bit-shift = <2>; 33409Sjjh }; 34409Sjjh 35409Sjjh vpfe_fck: vpfe_fck { 36409Sjjh #clock-cells = <0>; 37409Sjjh compatible = "ti,gate-clock"; 38409Sjjh clocks = <&pclk_ck>; 39409Sjjh reg = <0x032c>; 40409Sjjh ti,bit-shift = <10>; 41409Sjjh }; 42409Sjjh 43409Sjjh hsotgusb_ick_am35xx: hsotgusb_ick_am35xx { 44409Sjjh #clock-cells = <0>; 45409Sjjh compatible = "ti,am35xx-gate-clock"; 46409Sjjh clocks = <&ipss_ick>; 47409Sjjh reg = <0x032c>; 48409Sjjh ti,bit-shift = <0>; 49409Sjjh }; 50409Sjjh 51409Sjjh hsotgusb_fck_am35xx: hsotgusb_fck_am35xx { 52409Sjjh #clock-cells = <0>; 53409Sjjh compatible = "ti,gate-clock"; 54409Sjjh clocks = <&sys_ck>; 55409Sjjh reg = <0x032c>; 56409Sjjh ti,bit-shift = <8>; 57409Sjjh }; 58409Sjjh 59409Sjjh hecc_ck: hecc_ck { 60409Sjjh #clock-cells = <0>; 61409Sjjh compatible = "ti,am35xx-gate-clock"; 62409Sjjh clocks = <&sys_ck>; 63409Sjjh reg = <0x032c>; 64409Sjjh ti,bit-shift = <3>; 65409Sjjh }; 66409Sjjh}; 67409Sjjh&cm_clocks { 68409Sjjh ipss_ick: ipss_ick { 69409Sjjh #clock-cells = <0>; 70409Sjjh compatible = "ti,am35xx-interface-clock"; 71409Sjjh clocks = <&core_l3_ick>; 72409Sjjh reg = <0x0a10>; 73409Sjjh ti,bit-shift = <4>; 74409Sjjh }; 75409Sjjh 76409Sjjh rmii_ck: rmii_ck { 77409Sjjh #clock-cells = <0>; 78409Sjjh compatible = "fixed-clock"; 79409Sjjh clock-frequency = <50000000>; 80409Sjjh }; 81409Sjjh 82409Sjjh pclk_ck: pclk_ck { 83409Sjjh #clock-cells = <0>; 84409Sjjh compatible = "fixed-clock"; 85409Sjjh clock-frequency = <27000000>; 86409Sjjh }; 87409Sjjh 88409Sjjh uart4_ick_am35xx: uart4_ick_am35xx { 89409Sjjh #clock-cells = <0>; 90409Sjjh compatible = "ti,omap3-interface-clock"; 91409Sjjh clocks = <&core_l4_ick>; 92409Sjjh reg = <0x0a10>; 93409Sjjh ti,bit-shift = <23>; 94409Sjjh }; 95409Sjjh 96409Sjjh uart4_fck_am35xx: uart4_fck_am35xx { 97409Sjjh #clock-cells = <0>; 98409Sjjh compatible = "ti,wait-gate-clock"; 99409Sjjh clocks = <&core_48m_fck>; 100409Sjjh reg = <0x0a00>; 101409Sjjh ti,bit-shift = <23>; 102409Sjjh }; 103409Sjjh}; 104409Sjjh 105409Sjjh&cm_clockdomains { 106409Sjjh core_l3_clkdm: core_l3_clkdm { 107409Sjjh compatible = "ti,clockdomain"; 108409Sjjh clocks = <&sdrc_ick>, <&ipss_ick>, <&emac_ick>, <&vpfe_ick>, 109409Sjjh <&hsotgusb_ick_am35xx>, <&hsotgusb_fck_am35xx>, 110409Sjjh <&hecc_ck>; 111409Sjjh }; 112409Sjjh 113409Sjjh core_l4_clkdm: core_l4_clkdm { 114409Sjjh compatible = "ti,clockdomain"; 115409Sjjh clocks = <&cpefuse_fck>, <&ts_fck>, <&usbtll_fck>, 116409Sjjh <&usbtll_ick>, <&mmchs3_ick>, <&mmchs3_fck>, 117409Sjjh <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>, 118409Sjjh <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>, 119409Sjjh <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>, 120409Sjjh <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>, 121409Sjjh <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>, 122409Sjjh <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>, 123409Sjjh <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, 124409Sjjh <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, 125409Sjjh <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, 126409Sjjh <&uart4_ick_am35xx>, <&uart4_fck_am35xx>; 127409Sjjh }; 128409Sjjh}; 129409Sjjh