if_xlreg.h revision 183714
1109313Sobrien/*- 2110252Sobrien * Copyright (c) 1997, 1998 3109313Sobrien * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4109313Sobrien * 5109313Sobrien * Redistribution and use in source and binary forms, with or without 6109313Sobrien * modification, are permitted provided that the following conditions 7109313Sobrien * are met: 8109313Sobrien * 1. Redistributions of source code must retain the above copyright 9109313Sobrien * notice, this list of conditions and the following disclaimer. 10109313Sobrien * 2. Redistributions in binary form must reproduce the above copyright 11109313Sobrien * notice, this list of conditions and the following disclaimer in the 12109313Sobrien * documentation and/or other materials provided with the distribution. 13109313Sobrien * 3. All advertising materials mentioning features or use of this software 14109313Sobrien * must display the following acknowledgement: 15109313Sobrien * This product includes software developed by Bill Paul. 16109313Sobrien * 4. Neither the name of the author nor the names of any co-contributors 17109313Sobrien * may be used to endorse or promote products derived from this software 18109313Sobrien * without specific prior written permission. 19109313Sobrien * 20109313Sobrien * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21109313Sobrien * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22109313Sobrien * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23109313Sobrien * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24109313Sobrien * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25109313Sobrien * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26109313Sobrien * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27109313Sobrien * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28109313Sobrien * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29109313Sobrien * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30109313Sobrien * THE POSSIBILITY OF SUCH DAMAGE. 31109313Sobrien * 32275945Sbrueffer * $FreeBSD: head/sys/dev/xl/if_xlreg.h 183714 2008-10-09 02:25:18Z peter $ 33275945Sbrueffer */ 34109313Sobrien 35109313Sobrien#define XL_EE_READ 0x0080 /* read, 5 bit address */ 36118680Smarcel#define XL_EE_WRITE 0x0040 /* write, 5 bit address */ 37109313Sobrien#define XL_EE_ERASE 0x00c0 /* erase, 5 bit address */ 38109313Sobrien#define XL_EE_EWEN 0x0030 /* erase, no data needed */ 39109313Sobrien#define XL_EE_8BIT_READ 0x0200 /* read, 8 bit address */ 40275945Sbrueffer#define XL_EE_BUSY 0x8000 41109313Sobrien 42110257Sobrien#define XL_EE_EADDR0 0x00 /* station address, first word */ 43109313Sobrien#define XL_EE_EADDR1 0x01 /* station address, next word, */ 44109313Sobrien#define XL_EE_EADDR2 0x02 /* station address, last word */ 45109313Sobrien#define XL_EE_PRODID 0x03 /* product ID code */ 46109313Sobrien#define XL_EE_MDATA_DATE 0x04 /* manufacturing data, date */ 47109313Sobrien#define XL_EE_MDATA_DIV 0x05 /* manufacturing data, division */ 48109313Sobrien#define XL_EE_MDATA_PCODE 0x06 /* manufacturing data, product code */ 49109313Sobrien#define XL_EE_MFG_ID 0x07 50109313Sobrien#define XL_EE_PCI_PARM 0x08 51109313Sobrien#define XL_EE_ROM_ONFO 0x09 52109313Sobrien#define XL_EE_OEM_ADR0 0x0A 53109313Sobrien#define XL_EE_OEM_ADR1 0x0B 54109313Sobrien#define XL_EE_OEM_ADR2 0x0C 55109313Sobrien#define XL_EE_SOFTINFO1 0x0D 56109313Sobrien#define XL_EE_COMPAT 0x0E 57109313Sobrien#define XL_EE_SOFTINFO2 0x0F 58109313Sobrien#define XL_EE_CAPS 0x10 /* capabilities word */ 59109313Sobrien#define XL_EE_RSVD0 0x11 60109313Sobrien#define XL_EE_ICFG_0 0x12 61109313Sobrien#define XL_EE_ICFG_1 0x13 62109313Sobrien#define XL_EE_RSVD1 0x14 63109313Sobrien#define XL_EE_SOFTINFO3 0x15 64109313Sobrien#define XL_EE_RSVD_2 0x16 65109313Sobrien 66109313Sobrien/* 67109313Sobrien * Bits in the capabilities word 68109313Sobrien */ 69109313Sobrien#define XL_CAPS_PNP 0x0001 70109313Sobrien#define XL_CAPS_FULL_DUPLEX 0x0002 71109313Sobrien#define XL_CAPS_LARGE_PKTS 0x0004 72109313Sobrien#define XL_CAPS_SLAVE_DMA 0x0008 73109313Sobrien#define XL_CAPS_SECOND_DMA 0x0010 74109313Sobrien#define XL_CAPS_FULL_BM 0x0020 75109313Sobrien#define XL_CAPS_FRAG_BM 0x0040 76109313Sobrien#define XL_CAPS_CRC_PASSTHRU 0x0080 77109313Sobrien#define XL_CAPS_TXDONE 0x0100 78109313Sobrien#define XL_CAPS_NO_TXLENGTH 0x0200 79109313Sobrien#define XL_CAPS_RX_REPEAT 0x0400 80109313Sobrien#define XL_CAPS_SNOOPING 0x0800 81109313Sobrien#define XL_CAPS_100MBPS 0x1000 82109313Sobrien#define XL_CAPS_PWRMGMT 0x2000 83109313Sobrien 84109313Sobrien#define XL_PACKET_SIZE 1540 85109313Sobrien#define XL_MAX_FRAMELEN (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN) 86109313Sobrien 87109313Sobrien/* 88109313Sobrien * Register layouts. 89241737Sed */ 90109313Sobrien#define XL_COMMAND 0x0E 91109313Sobrien#define XL_STATUS 0x0E 92109313Sobrien 93109313Sobrien#define XL_TX_STATUS 0x1B 94109313Sobrien#define XL_TX_FREE 0x1C 95109313Sobrien#define XL_DMACTL 0x20 96109313Sobrien#define XL_DOWNLIST_PTR 0x24 97109313Sobrien#define XL_DOWN_POLL 0x2D /* 3c90xB only */ 98109313Sobrien#define XL_TX_FREETHRESH 0x2F 99109313Sobrien#define XL_UPLIST_PTR 0x38 100109313Sobrien#define XL_UPLIST_STATUS 0x30 101109313Sobrien#define XL_UP_POLL 0x3D /* 3c90xB only */ 102109313Sobrien 103109313Sobrien#define XL_PKTSTAT_UP_STALLED 0x00002000 104109313Sobrien#define XL_PKTSTAT_UP_ERROR 0x00004000 105109313Sobrien#define XL_PKTSTAT_UP_CMPLT 0x00008000 106109313Sobrien 107109313Sobrien#define XL_DMACTL_DN_CMPLT_REQ 0x00000002 108109313Sobrien#define XL_DMACTL_DOWN_STALLED 0x00000004 109109313Sobrien#define XL_DMACTL_UP_CMPLT 0x00000008 110109313Sobrien#define XL_DMACTL_DOWN_CMPLT 0x00000010 111109313Sobrien#define XL_DMACTL_UP_RX_EARLY 0x00000020 112109313Sobrien#define XL_DMACTL_ARM_COUNTDOWN 0x00000040 113109313Sobrien#define XL_DMACTL_DOWN_INPROG 0x00000080 114109313Sobrien#define XL_DMACTL_COUNTER_SPEED 0x00000100 115109313Sobrien#define XL_DMACTL_DOWNDOWN_MODE 0x00000200 116109313Sobrien#define XL_DMACTL_TARGET_ABORT 0x40000000 117109313Sobrien#define XL_DMACTL_MASTER_ABORT 0x80000000 118109313Sobrien 119109313Sobrien/* 120109313Sobrien * Command codes. Some command codes require that we wait for 121109313Sobrien * the CMD_BUSY flag to clear. Those codes are marked as 'mustwait.' 122109313Sobrien */ 123119794Sschweikh#define XL_CMD_RESET 0x0000 /* mustwait */ 124109313Sobrien#define XL_CMD_WINSEL 0x0800 125109313Sobrien#define XL_CMD_COAX_START 0x1000 126109313Sobrien#define XL_CMD_RX_DISABLE 0x1800 127109313Sobrien#define XL_CMD_RX_ENABLE 0x2000 128109313Sobrien#define XL_CMD_RX_RESET 0x2800 /* mustwait */ 129109313Sobrien#define XL_CMD_UP_STALL 0x3000 /* mustwait */ 130241737Sed#define XL_CMD_UP_UNSTALL 0x3001 131109313Sobrien#define XL_CMD_DOWN_STALL 0x3002 /* mustwait */ 132109313Sobrien#define XL_CMD_DOWN_UNSTALL 0x3003 133109313Sobrien#define XL_CMD_RX_DISCARD 0x4000 134109313Sobrien#define XL_CMD_TX_ENABLE 0x4800 135119794Sschweikh#define XL_CMD_TX_DISABLE 0x5000 136109313Sobrien#define XL_CMD_TX_RESET 0x5800 /* mustwait */ 137109313Sobrien#define XL_CMD_INTR_FAKE 0x6000 138109313Sobrien#define XL_CMD_INTR_ACK 0x6800 139109313Sobrien#define XL_CMD_INTR_ENB 0x7000 140109313Sobrien#define XL_CMD_STAT_ENB 0x7800 141109313Sobrien#define XL_CMD_RX_SET_FILT 0x8000 142109313Sobrien#define XL_CMD_RX_SET_THRESH 0x8800 143109313Sobrien#define XL_CMD_TX_SET_THRESH 0x9000 144109313Sobrien#define XL_CMD_TX_SET_START 0x9800 145109313Sobrien#define XL_CMD_DMA_UP 0xA000 146109313Sobrien#define XL_CMD_DMA_STOP 0xA001 147109313Sobrien#define XL_CMD_STATS_ENABLE 0xA800 148109313Sobrien#define XL_CMD_STATS_DISABLE 0xB000 149109313Sobrien#define XL_CMD_COAX_STOP 0xB800 150109313Sobrien 151109313Sobrien#define XL_CMD_SET_TX_RECLAIM 0xC000 /* 3c905B only */ 152109313Sobrien#define XL_CMD_RX_SET_HASH 0xC800 /* 3c905B only */ 153109313Sobrien 154109313Sobrien#define XL_HASH_SET 0x0400 155109313Sobrien#define XL_HASHFILT_SIZE 256 156109313Sobrien 157109313Sobrien/* 158109313Sobrien * status codes 159109313Sobrien * Note that bits 15 to 13 indicate the currently visible register window 160109313Sobrien * which may be anything from 0 to 7. 161109313Sobrien */ 162109313Sobrien#define XL_STAT_INTLATCH 0x0001 /* 0 */ 163109313Sobrien#define XL_STAT_ADFAIL 0x0002 /* 1 */ 164119794Sschweikh#define XL_STAT_TX_COMPLETE 0x0004 /* 2 */ 165109313Sobrien#define XL_STAT_TX_AVAIL 0x0008 /* 3 first generation */ 166109313Sobrien#define XL_STAT_RX_COMPLETE 0x0010 /* 4 */ 167109313Sobrien#define XL_STAT_RX_EARLY 0x0020 /* 5 */ 168109313Sobrien#define XL_STAT_INTREQ 0x0040 /* 6 */ 169109313Sobrien#define XL_STAT_STATSOFLOW 0x0080 /* 7 */ 170109313Sobrien#define XL_STAT_DMADONE 0x0100 /* 8 first generation */ 171109332Sobrien#define XL_STAT_LINKSTAT 0x0100 /* 8 3c509B */ 172110256Sobrien#define XL_STAT_DOWN_COMPLETE 0x0200 /* 9 */ 173270969Semaste#define XL_STAT_UP_COMPLETE 0x0400 /* 10 */ 174270969Semaste#define XL_STAT_DMABUSY 0x0800 /* 11 first generation */ 175270969Semaste#define XL_STAT_CMDBUSY 0x1000 /* 12 */ 176270969Semaste 177109332Sobrien/* 178270969Semaste * Interrupts we normally want enabled. 179270969Semaste */ 180270969Semaste#define XL_INTRS \ 181270969Semaste (XL_STAT_UP_COMPLETE|XL_STAT_STATSOFLOW|XL_STAT_ADFAIL| \ 182270969Semaste XL_STAT_DOWN_COMPLETE|XL_STAT_TX_COMPLETE|XL_STAT_INTLATCH) 183270969Semaste 184270969Semaste/* 185270969Semaste * Window 0 registers 186270969Semaste */ 187270969Semaste#define XL_W0_EE_DATA 0x0C 188270969Semaste#define XL_W0_EE_CMD 0x0A 189270969Semaste#define XL_W0_RSRC_CFG 0x08 190270969Semaste#define XL_W0_ADDR_CFG 0x06 191270969Semaste#define XL_W0_CFG_CTRL 0x04 192270969Semaste 193270969Semaste#define XL_W0_PROD_ID 0x02 194270969Semaste#define XL_W0_MFG_ID 0x00 195270969Semaste 196270969Semaste/* 197270969Semaste * Window 1 198270969Semaste */ 199270969Semaste 200270969Semaste#define XL_W1_TX_FIFO 0x10 201270969Semaste 202270969Semaste#define XL_W1_FREE_TX 0x0C 203270969Semaste#define XL_W1_TX_STATUS 0x0B 204270969Semaste#define XL_W1_TX_TIMER 0x0A 205270969Semaste#define XL_W1_RX_STATUS 0x08 206270969Semaste#define XL_W1_RX_FIFO 0x00 207270969Semaste 208270969Semaste/* 209270969Semaste * RX status codes 210270969Semaste */ 211109332Sobrien#define XL_RXSTATUS_OVERRUN 0x01 212270969Semaste#define XL_RXSTATUS_RUNT 0x02 213270969Semaste#define XL_RXSTATUS_ALIGN 0x04 214270969Semaste#define XL_RXSTATUS_CRC 0x08 215270969Semaste#define XL_RXSTATUS_OVERSIZE 0x10 216270969Semaste#define XL_RXSTATUS_DRIBBLE 0x20 217270969Semaste 218270969Semaste/* 219270969Semaste * TX status codes 220270969Semaste */ 221270969Semaste#define XL_TXSTATUS_RECLAIM 0x02 /* 3c905B only */ 222270969Semaste#define XL_TXSTATUS_OVERFLOW 0x04 223270969Semaste#define XL_TXSTATUS_MAXCOLS 0x08 224270969Semaste#define XL_TXSTATUS_UNDERRUN 0x10 225270969Semaste#define XL_TXSTATUS_JABBER 0x20 226270969Semaste#define XL_TXSTATUS_INTREQ 0x40 227270969Semaste#define XL_TXSTATUS_COMPLETE 0x80 228270969Semaste 229270969Semaste/* 230270969Semaste * Window 2 231270969Semaste */ 232270969Semaste#define XL_W2_RESET_OPTIONS 0x0C /* 3c905B only */ 233270969Semaste#define XL_W2_STATION_MASK_HI 0x0A 234270969Semaste#define XL_W2_STATION_MASK_MID 0x08 235270969Semaste#define XL_W2_STATION_MASK_LO 0x06 236270969Semaste#define XL_W2_STATION_ADDR_HI 0x04 237270969Semaste#define XL_W2_STATION_ADDR_MID 0x02 238270969Semaste#define XL_W2_STATION_ADDR_LO 0x00 239270969Semaste 240270969Semaste#define XL_RESETOPT_FEATUREMASK (0x0001 | 0x0002 | 0x004) 241109332Sobrien#define XL_RESETOPT_D3RESETDIS 0x0008 242270969Semaste#define XL_RESETOPT_DISADVFD 0x0010 243270969Semaste#define XL_RESETOPT_DISADV100 0x0020 244270969Semaste#define XL_RESETOPT_DISAUTONEG 0x0040 245270969Semaste#define XL_RESETOPT_DEBUGMODE 0x0080 246109332Sobrien#define XL_RESETOPT_FASTAUTO 0x0100 247270969Semaste#define XL_RESETOPT_FASTEE 0x0200 248270969Semaste#define XL_RESETOPT_FORCEDCONF 0x0400 249270969Semaste#define XL_RESETOPT_TESTPDTPDR 0x0800 250119794Sschweikh#define XL_RESETOPT_TEST100TX 0x1000 251109313Sobrien#define XL_RESETOPT_TEST100RX 0x2000 252110256Sobrien 253109457Smarcel#define XL_RESETOPT_INVERT_LED 0x0010 254109457Smarcel#define XL_RESETOPT_INVERT_MII 0x4000 255153500Smarcel 256153500Smarcel/* 257109457Smarcel * Window 3 (fifo management) 258109457Smarcel */ 259109457Smarcel#define XL_W3_INTERNAL_CFG 0x00 260109457Smarcel#define XL_W3_MAXPKTSIZE 0x04 /* 3c905B only */ 261109457Smarcel#define XL_W3_RESET_OPT 0x08 262109457Smarcel#define XL_W3_FREE_TX 0x0C 263109457Smarcel#define XL_W3_FREE_RX 0x0A 264288173Semaste#define XL_W3_MAC_CTRL 0x06 265109457Smarcel 266109457Smarcel#define XL_ICFG_CONNECTOR_MASK 0x00F00000 267153500Smarcel#define XL_ICFG_CONNECTOR_BITS 20 268261002Sjhibbits 269153500Smarcel#define XL_ICFG_RAMSIZE_MASK 0x00000007 270153500Smarcel#define XL_ICFG_RAMWIDTH 0x00000008 271153500Smarcel#define XL_ICFG_ROMSIZE_MASK (0x00000040 | 0x00000080) 272109457Smarcel#define XL_ICFG_DISABLE_BASSD 0x00000100 273153500Smarcel#define XL_ICFG_RAMLOC 0x00000200 274270969Semaste#define XL_ICFG_RAMPART (0x00010000 | 0x00020000) 275288171Semaste#define XL_ICFG_XCVRSEL (0x00100000 | 0x00200000 | 0x00400000) 276109457Smarcel#define XL_ICFG_AUTOSEL 0x01000000 277153500Smarcel 278153500Smarcel#define XL_XCVR_10BT 0x00 279153500Smarcel#define XL_XCVR_AUI 0x01 280119794Sschweikh#define XL_XCVR_RSVD_0 0x02 281109313Sobrien#define XL_XCVR_COAX 0x03 282241737Sed#define XL_XCVR_100BTX 0x04 283109313Sobrien#define XL_XCVR_100BFX 0x05 284109313Sobrien#define XL_XCVR_MII 0x06 285109313Sobrien#define XL_XCVR_RSVD_1 0x07 286241737Sed#define XL_XCVR_AUTO 0x08 /* 3c905B only */ 287109313Sobrien 288109313Sobrien#define XL_MACCTRL_DEFER_EXT_END 0x0001 289109313Sobrien#define XL_MACCTRL_DEFER_0 0x0002 290241737Sed#define XL_MACCTRL_DEFER_1 0x0004 291109313Sobrien#define XL_MACCTRL_DEFER_2 0x0008 292109313Sobrien#define XL_MACCTRL_DEFER_3 0x0010 293109313Sobrien#define XL_MACCTRL_DUPLEX 0x0020 294241737Sed#define XL_MACCTRL_ALLOW_LARGE_PACK 0x0040 295109313Sobrien#define XL_MACCTRL_EXTEND_AFTER_COL 0x0080 /* 3c905B only */ 296109313Sobrien#define XL_MACCTRL_FLOW_CONTROL_ENB 0x0100 /* 3c905B only */ 297109313Sobrien#define XL_MACCTRL_VLT_END 0x0200 /* 3c905B only */ 298241737Sed 299109313Sobrien/* 300226434Smarcel * The 'reset options' register contains power-on reset values 301226434Smarcel * loaded from the EEPROM. This includes the supported media 302226434Smarcel * types on the card. It is also known as the media options register. 303226434Smarcel */ 304109313Sobrien#define XL_W3_MEDIA_OPT 0x08 305109313Sobrien 306241737Sed#define XL_MEDIAOPT_BT4 0x0001 /* MII */ 307109313Sobrien#define XL_MEDIAOPT_BTX 0x0002 /* on-chip */ 308126484Sjake#define XL_MEDIAOPT_BFX 0x0004 /* on-chip */ 309109313Sobrien#define XL_MEDIAOPT_BT 0x0008 /* on-chip */ 310109313Sobrien#define XL_MEDIAOPT_BNC 0x0010 /* on-chip */ 311241737Sed#define XL_MEDIAOPT_AUI 0x0020 /* on-chip */ 312109313Sobrien#define XL_MEDIAOPT_MII 0x0040 /* MII */ 313109313Sobrien#define XL_MEDIAOPT_VCO 0x0100 /* 1st gen chip only */ 314109313Sobrien 315109313Sobrien#define XL_MEDIAOPT_10FL 0x0100 /* 3x905B only, on-chip */ 316109329Sobrien#define XL_MEDIAOPT_MASK 0x01FF 317110256Sobrien 318270969Semaste/* 319270969Semaste * Window 4 (diagnostics) 320270969Semaste */ 321270969Semaste#define XL_W4_UPPERBYTESOK 0x0D 322270969Semaste#define XL_W4_BADSSD 0x0C 323270969Semaste#define XL_W4_MEDIA_STATUS 0x0A 324270969Semaste#define XL_W4_PHY_MGMT 0x08 325270969Semaste#define XL_W4_NET_DIAG 0x06 326270969Semaste#define XL_W4_FIFO_DIAG 0x04 327270969Semaste#define XL_W4_VCO_DIAG 0x02 328270969Semaste 329270969Semaste#define XL_W4_CTRLR_STAT 0x08 330270969Semaste#define XL_W4_TX_DIAG 0x00 331270969Semaste 332270969Semaste#define XL_MII_CLK 0x01 333270969Semaste#define XL_MII_DATA 0x02 334270969Semaste#define XL_MII_DIR 0x04 335270969Semaste 336270969Semaste#define XL_MEDIA_SQE 0x0008 337270969Semaste#define XL_MEDIA_10TP 0x00C0 338270969Semaste#define XL_MEDIA_LNK 0x0080 339270969Semaste#define XL_MEDIA_LNKBEAT 0x0800 340270969Semaste 341270969Semaste#define XL_MEDIASTAT_CRCSTRIP 0x0004 342270969Semaste#define XL_MEDIASTAT_SQEENB 0x0008 343270969Semaste#define XL_MEDIASTAT_COLDET 0x0010 344270969Semaste#define XL_MEDIASTAT_CARRIER 0x0020 345270969Semaste#define XL_MEDIASTAT_JABGUARD 0x0040 346270969Semaste#define XL_MEDIASTAT_LINKBEAT 0x0080 347270969Semaste#define XL_MEDIASTAT_JABDETECT 0x0200 348270969Semaste#define XL_MEDIASTAT_POLREVERS 0x0400 349270969Semaste#define XL_MEDIASTAT_LINKDETECT 0x0800 350270969Semaste#define XL_MEDIASTAT_TXINPROG 0x1000 351270969Semaste#define XL_MEDIASTAT_DCENB 0x4000 352270969Semaste#define XL_MEDIASTAT_AUIDIS 0x8000 353270969Semaste 354270969Semaste#define XL_NETDIAG_TEST_LOWVOLT 0x0001 355270969Semaste#define XL_NETDIAG_ASIC_REVMASK \ 356270969Semaste (0x0002 | 0x0004 | 0x0008 | 0x0010 | 0x0020) 357270969Semaste#define XL_NETDIAG_UPPER_BYTES_ENABLE 0x0040 358270969Semaste#define XL_NETDIAG_STATS_ENABLED 0x0080 359270969Semaste#define XL_NETDIAG_TX_FATALERR 0x0100 360270969Semaste#define XL_NETDIAG_TRANSMITTING 0x0200 361270969Semaste#define XL_NETDIAG_RX_ENABLED 0x0400 362270969Semaste#define XL_NETDIAG_TX_ENABLED 0x0800 363270969Semaste#define XL_NETDIAG_FIFO_LOOPBACK 0x1000 364270969Semaste#define XL_NETDIAG_MAC_LOOPBACK 0x2000 365270969Semaste#define XL_NETDIAG_ENDEC_LOOPBACK 0x4000 366270969Semaste#define XL_NETDIAG_EXTERNAL_LOOP 0x8000 367270969Semaste 368270969Semaste/* 369270969Semaste * Window 5 370270969Semaste */ 371270969Semaste#define XL_W5_STAT_ENB 0x0C 372270969Semaste#define XL_W5_INTR_ENB 0x0A 373270969Semaste#define XL_W5_RECLAIM_THRESH 0x09 /* 3c905B only */ 374270969Semaste#define XL_W5_RX_FILTER 0x08 375270969Semaste#define XL_W5_RX_EARLYTHRESH 0x06 376270969Semaste#define XL_W5_TX_AVAILTHRESH 0x02 377270969Semaste#define XL_W5_TX_STARTTHRESH 0x00 378270969Semaste 379270969Semaste/* 380270969Semaste * RX filter bits 381270969Semaste */ 382294450Semaste#define XL_RXFILTER_INDIVIDUAL 0x01 383270969Semaste#define XL_RXFILTER_ALLMULTI 0x02 384294450Semaste#define XL_RXFILTER_BROADCAST 0x04 385270969Semaste#define XL_RXFILTER_ALLFRAMES 0x08 386270969Semaste#define XL_RXFILTER_MULTIHASH 0x10 /* 3c905B only */ 387270969Semaste 388270969Semaste/* 389270969Semaste * Window 6 (stats) 390270969Semaste */ 391270969Semaste#define XL_W6_TX_BYTES_OK 0x0C 392270969Semaste#define XL_W6_RX_BYTES_OK 0x0A 393270969Semaste#define XL_W6_UPPER_FRAMES_OK 0x09 394270969Semaste#define XL_W6_DEFERRED 0x08 395270969Semaste#define XL_W6_RX_OK 0x07 396270969Semaste#define XL_W6_TX_OK 0x06 397270969Semaste#define XL_W6_RX_OVERRUN 0x05 398270969Semaste#define XL_W6_COL_LATE 0x04 399270969Semaste#define XL_W6_COL_SINGLE 0x03 400270969Semaste#define XL_W6_COL_MULTIPLE 0x02 401270969Semaste#define XL_W6_SQE_ERRORS 0x01 402109329Sobrien#define XL_W6_CARRIER_LOST 0x00 403119795Sschweikh 404109313Sobrien/* 405241737Sed * Window 7 (bus master control) 406109313Sobrien */ 407109313Sobrien#define XL_W7_BM_ADDR 0x00 408109313Sobrien#define XL_W7_BM_LEN 0x06 409109313Sobrien#define XL_W7_BM_STATUS 0x0B 410109313Sobrien#define XL_W7_BM_TIMEr 0x0A 411241737Sed 412109313Sobrien/* 413109313Sobrien * bus master control registers 414109313Sobrien */ 415241737Sed#define XL_BM_PKTSTAT 0x20 416109313Sobrien#define XL_BM_DOWNLISTPTR 0x24 417109313Sobrien#define XL_BM_FRAGADDR 0x28 418109313Sobrien#define XL_BM_FRAGLEN 0x2C 419241737Sed#define XL_BM_TXFREETHRESH 0x2F 420241737Sed#define XL_BM_UPPKTSTAT 0x30 421241737Sed#define XL_BM_UPLISTPTR 0x38 422241737Sed 423109313Sobrien#define XL_LAST_FRAG 0x80000000 424241737Sed 425241737Sed#define XL_MAXFRAGS 63 426241737Sed#define XL_RX_LIST_CNT 128 427241737Sed#define XL_TX_LIST_CNT 256 428241737Sed#define XL_RX_LIST_SZ \ 429241737Sed (XL_RX_LIST_CNT * sizeof(struct xl_list_onefrag)) 430241737Sed#define XL_TX_LIST_SZ \ 431241737Sed (XL_TX_LIST_CNT * sizeof(struct xl_list)) 432109313Sobrien#define XL_MIN_FRAMELEN 60 433267958Semaste#define ETHER_ALIGN 2 434241737Sed#define XL_INC(x, y) (x) = (x + 1) % y 435241737Sed 436241737Sed/* 437241737Sed * Boomerang/Cyclone TX/RX list structure. 438241737Sed * For the TX lists, bits 0 to 12 of the status word indicate 439241737Sed * length. 440241737Sed * This looks suspiciously like the ThunderLAN, doesn't it. 441241737Sed */ 442241737Sedstruct xl_frag { 443241737Sed u_int32_t xl_addr; /* 63 addr/len pairs */ 444109313Sobrien u_int32_t xl_len; 445241737Sed}; 446109313Sobrien 447267958Semastestruct xl_list { 448267958Semaste u_int32_t xl_next; /* final entry has 0 nextptr */ 449267958Semaste u_int32_t xl_status; 450267958Semaste struct xl_frag xl_frag[XL_MAXFRAGS]; 451267958Semaste}; 452267958Semaste 453267958Semastestruct xl_list_onefrag { 454267958Semaste u_int32_t xl_next; /* final entry has 0 nextptr */ 455267958Semaste u_int32_t xl_status; 456267958Semaste struct xl_frag xl_frag; 457267958Semaste}; 458267958Semaste 459267958Semastestruct xl_list_data { 460267958Semaste struct xl_list_onefrag *xl_rx_list; 461267958Semaste struct xl_list *xl_tx_list; 462267958Semaste u_int32_t xl_rx_dmaaddr; 463267958Semaste bus_dma_tag_t xl_rx_tag; 464267958Semaste bus_dmamap_t xl_rx_dmamap; 465267958Semaste u_int32_t xl_tx_dmaaddr; 466267958Semaste bus_dma_tag_t xl_tx_tag; 467267958Semaste bus_dmamap_t xl_tx_dmamap; 468267958Semaste}; 469267958Semaste 470267958Semastestruct xl_chain { 471267958Semaste struct xl_list *xl_ptr; 472267958Semaste struct mbuf *xl_mbuf; 473267958Semaste struct xl_chain *xl_next; 474109313Sobrien struct xl_chain *xl_prev; 475109313Sobrien u_int32_t xl_phys; 476109313Sobrien bus_dmamap_t xl_map; 477275945Sbrueffer}; 478109313Sobrien 479109313Sobrienstruct xl_chain_onefrag { 480109313Sobrien struct xl_list_onefrag *xl_ptr; 481109313Sobrien struct mbuf *xl_mbuf; 482109313Sobrien struct xl_chain_onefrag *xl_next; 483109313Sobrien bus_dmamap_t xl_map; 484109313Sobrien}; 485109313Sobrien 486109313Sobrienstruct xl_chain_data { 487109313Sobrien struct xl_chain_onefrag xl_rx_chain[XL_RX_LIST_CNT]; 488109313Sobrien struct xl_chain xl_tx_chain[XL_TX_LIST_CNT]; 489109313Sobrien bus_dma_segment_t xl_tx_segs[XL_MAXFRAGS]; 490110252Sobrien 491109313Sobrien struct xl_chain_onefrag *xl_rx_head; 492109313Sobrien 493109313Sobrien /* 3c90x "boomerang" queuing stuff */ 494109313Sobrien struct xl_chain *xl_tx_head; 495109313Sobrien struct xl_chain *xl_tx_tail; 496109313Sobrien struct xl_chain *xl_tx_free; 497109313Sobrien 498109313Sobrien /* 3c90xB "cyclone/hurricane/tornado" stuff */ 499109313Sobrien int xl_tx_prod; 500109313Sobrien int xl_tx_cons; 501109313Sobrien int xl_tx_cnt; 502109313Sobrien}; 503109313Sobrien 504109313Sobrien#define XL_RXSTAT_LENMASK 0x00001FFF 505109313Sobrien#define XL_RXSTAT_UP_ERROR 0x00004000 506109313Sobrien#define XL_RXSTAT_UP_CMPLT 0x00008000 507109313Sobrien#define XL_RXSTAT_UP_OVERRUN 0x00010000 508109313Sobrien#define XL_RXSTAT_RUNT 0x00020000 509109313Sobrien#define XL_RXSTAT_ALIGN 0x00040000 510109313Sobrien#define XL_RXSTAT_CRC 0x00080000 511109313Sobrien#define XL_RXSTAT_OVERSIZE 0x00100000 512109313Sobrien#define XL_RXSTAT_DRIBBLE 0x00800000 513109313Sobrien#define XL_RXSTAT_UP_OFLOW 0x01000000 514109313Sobrien#define XL_RXSTAT_IPCKERR 0x02000000 /* 3c905B only */ 515109313Sobrien#define XL_RXSTAT_TCPCKERR 0x04000000 /* 3c905B only */ 516109313Sobrien#define XL_RXSTAT_UDPCKERR 0x08000000 /* 3c905B only */ 517109313Sobrien#define XL_RXSTAT_BUFEN 0x10000000 /* 3c905B only */ 518109313Sobrien#define XL_RXSTAT_IPCKOK 0x20000000 /* 3c905B only */ 519109313Sobrien#define XL_RXSTAT_TCPCOK 0x40000000 /* 3c905B only */ 520109313Sobrien#define XL_RXSTAT_UDPCKOK 0x80000000 /* 3c905B only */ 521109313Sobrien 522109313Sobrien#define XL_TXSTAT_LENMASK 0x00001FFF 523109313Sobrien#define XL_TXSTAT_CRCDIS 0x00002000 524109313Sobrien#define XL_TXSTAT_TX_INTR 0x00008000 525109313Sobrien#define XL_TXSTAT_DL_COMPLETE 0x00010000 526109313Sobrien#define XL_TXSTAT_IPCKSUM 0x02000000 /* 3c905B only */ 527109313Sobrien#define XL_TXSTAT_TCPCKSUM 0x04000000 /* 3c905B only */ 528109313Sobrien#define XL_TXSTAT_UDPCKSUM 0x08000000 /* 3c905B only */ 529109313Sobrien#define XL_TXSTAT_RND_DEFEAT 0x10000000 /* 3c905B only */ 530109313Sobrien#define XL_TXSTAT_EMPTY 0x20000000 /* 3c905B only */ 531109313Sobrien#define XL_TXSTAT_DL_INTR 0x80000000 532109313Sobrien 533109313Sobrien#define XL_CAPABILITY_BM 0x20 534109313Sobrien 535109313Sobrienstruct xl_type { 536109313Sobrien u_int16_t xl_vid; 537109313Sobrien u_int16_t xl_did; 538275945Sbrueffer char *xl_name; 539275945Sbrueffer}; 540275945Sbrueffer 541109313Sobrienstruct xl_mii_frame { 542109313Sobrien u_int8_t mii_stdelim; 543109313Sobrien u_int8_t mii_opcode; 544109313Sobrien u_int8_t mii_phyaddr; 545109313Sobrien u_int8_t mii_regaddr; 546109313Sobrien u_int8_t mii_turnaround; 547109313Sobrien u_int16_t mii_data; 548109313Sobrien}; 549109313Sobrien 550109313Sobrien/* 551109313Sobrien * MII constants 552117009Sru */ 553275945Sbrueffer#define XL_MII_STARTDELIM 0x01 554275945Sbrueffer#define XL_MII_READOP 0x02 555275945Sbrueffer#define XL_MII_WRITEOP 0x01 556275945Sbrueffer#define XL_MII_TURNAROUND 0x02 557275945Sbrueffer 558275945Sbrueffer/* 559275945Sbrueffer * The 3C905B adapters implement a few features that we want to 560275945Sbrueffer * take advantage of, namely the multicast hash filter. With older 561275945Sbrueffer * chips, you only have the option of turning on reception of all 562275945Sbrueffer * multicast frames, which is kind of lame. 563275945Sbrueffer * 564109313Sobrien * We also use this to decide on a transmit strategy. For the 3c90xB 565109313Sobrien * cards, we can use polled descriptor mode, which reduces CPU overhead. 566109313Sobrien */ 567109313Sobrien#define XL_TYPE_905B 1 568109313Sobrien#define XL_TYPE_90X 2 569109313Sobrien 570109313Sobrien#define XL_FLAG_FUNCREG 0x0001 571109313Sobrien#define XL_FLAG_PHYOK 0x0002 572109313Sobrien#define XL_FLAG_EEPROM_OFFSET_30 0x0004 573109313Sobrien#define XL_FLAG_WEIRDRESET 0x0008 574110256Sobrien#define XL_FLAG_8BITROM 0x0010 575267958Semaste#define XL_FLAG_INVERT_LED_PWR 0x0020 576267958Semaste#define XL_FLAG_INVERT_MII_PWR 0x0040 577267958Semaste#define XL_FLAG_NO_XCVR_PWR 0x0080 578267958Semaste#define XL_FLAG_USE_MMIO 0x0100 579267958Semaste#define XL_FLAG_NO_MMIO 0x0200 580267958Semaste 581267958Semaste#define XL_NO_XCVR_PWR_MAGICBITS 0x0900 582267958Semaste 583267958Semastestruct xl_softc { 584267958Semaste struct ifnet *xl_ifp; /* interface info */ 585267958Semaste device_t xl_dev; /* device info */ 586267958Semaste struct ifmedia ifmedia; /* media info */ 587267958Semaste bus_space_handle_t xl_bhandle; 588110256Sobrien bus_space_tag_t xl_btag; 589110256Sobrien void *xl_intrhand; 590110256Sobrien struct resource *xl_irq; 591109313Sobrien struct resource *xl_res; 592110252Sobrien device_t xl_miibus; 593109313Sobrien const struct xl_type *xl_info; /* 3Com adapter info */ 594110252Sobrien bus_dma_tag_t xl_mtag; 595109313Sobrien bus_dmamap_t xl_tmpmap; /* spare DMA map */ 596109313Sobrien u_int8_t xl_type; 597267958Semaste u_int32_t xl_xcvr; 598109313Sobrien u_int16_t xl_media; 599109313Sobrien u_int16_t xl_caps; 600109313Sobrien u_int8_t xl_stats_no_timeout; 601109313Sobrien u_int16_t xl_tx_thresh; 602110256Sobrien int xl_if_flags; 603110256Sobrien struct xl_list_data xl_ldata; 604109313Sobrien struct xl_chain_data xl_cdata; 605109313Sobrien struct callout xl_stat_callout; 606109313Sobrien int xl_wdog_timer; 607109313Sobrien int xl_flags; 608109313Sobrien struct resource *xl_fres; 609109313Sobrien bus_space_handle_t xl_fhandle; 610109313Sobrien bus_space_tag_t xl_ftag; 611109313Sobrien struct mtx xl_mtx; 612109313Sobrien struct task xl_task; 613109313Sobrien#ifdef DEVICE_POLLING 614109313Sobrien int rxcycles; 615109313Sobrien#endif 616109313Sobrien}; 617109313Sobrien 618109313Sobrien#define XL_LOCK(_sc) mtx_lock(&(_sc)->xl_mtx) 619110256Sobrien#define XL_UNLOCK(_sc) mtx_unlock(&(_sc)->xl_mtx) 620110256Sobrien#define XL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->xl_mtx, MA_OWNED) 621109313Sobrien 622109313Sobrien#define xl_rx_goodframes(x) \ 623109313Sobrien ((x.xl_upper_frames_ok & 0x03) << 8) | x.xl_rx_frames_ok 624109313Sobrien 625109313Sobrien#define xl_tx_goodframes(x) \ 626109313Sobrien ((x.xl_upper_frames_ok & 0x30) << 4) | x.xl_tx_frames_ok 627109313Sobrien 628109313Sobrienstruct xl_stats { 629109313Sobrien u_int8_t xl_carrier_lost; 630109313Sobrien u_int8_t xl_sqe_errs; 631109313Sobrien u_int8_t xl_tx_multi_collision; 632109313Sobrien u_int8_t xl_tx_single_collision; 633109313Sobrien u_int8_t xl_tx_late_collision; 634109313Sobrien u_int8_t xl_rx_overrun; 635109313Sobrien u_int8_t xl_tx_frames_ok; 636109313Sobrien u_int8_t xl_rx_frames_ok; 637109313Sobrien u_int8_t xl_tx_deferred; 638109313Sobrien u_int8_t xl_upper_frames_ok; 639109313Sobrien u_int16_t xl_rx_bytes_ok; 640109313Sobrien u_int16_t xl_tx_bytes_ok; 641109313Sobrien u_int16_t status; 642109313Sobrien}; 643109313Sobrien 644109313Sobrien/* 645109313Sobrien * register space access macros 646109313Sobrien */ 647109313Sobrien#define CSR_WRITE_4(sc, reg, val) \ 648109313Sobrien bus_space_write_4(sc->xl_btag, sc->xl_bhandle, reg, val) 649109313Sobrien#define CSR_WRITE_2(sc, reg, val) \ 650109313Sobrien bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val) 651109313Sobrien#define CSR_WRITE_1(sc, reg, val) \ 652109313Sobrien bus_space_write_1(sc->xl_btag, sc->xl_bhandle, reg, val) 653109313Sobrien 654109313Sobrien#define CSR_READ_4(sc, reg) \ 655109313Sobrien bus_space_read_4(sc->xl_btag, sc->xl_bhandle, reg) 656109313Sobrien#define CSR_READ_2(sc, reg) \ 657109313Sobrien bus_space_read_2(sc->xl_btag, sc->xl_bhandle, reg) 658109313Sobrien#define CSR_READ_1(sc, reg) \ 659109313Sobrien bus_space_read_1(sc->xl_btag, sc->xl_bhandle, reg) 660109313Sobrien 661109313Sobrien#define XL_SEL_WIN(x) \ 662109313Sobrien CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_WINSEL | x) 663109313Sobrien#define XL_TIMEOUT 1000 664109313Sobrien 665109313Sobrien/* 666109313Sobrien * General constants that are fun to know. 667109313Sobrien * 668109313Sobrien * 3Com PCI vendor ID 669109313Sobrien */ 670241737Sed#define TC_VENDORID 0x10B7 671267958Semaste 672109313Sobrien/* 673109313Sobrien * 3Com chip device IDs. 674109313Sobrien */ 675109313Sobrien#define TC_DEVICEID_BOOMERANG_10BT 0x9000 676109313Sobrien#define TC_DEVICEID_BOOMERANG_10BT_COMBO 0x9001 677109313Sobrien#define TC_DEVICEID_BOOMERANG_10_100BT 0x9050 678109313Sobrien#define TC_DEVICEID_BOOMERANG_100BT4 0x9051 679109313Sobrien#define TC_DEVICEID_KRAKATOA_10BT 0x9004 680109313Sobrien#define TC_DEVICEID_KRAKATOA_10BT_COMBO 0x9005 681109313Sobrien#define TC_DEVICEID_KRAKATOA_10BT_TPC 0x9006 682109313Sobrien#define TC_DEVICEID_CYCLONE_10FL 0x900A 683109313Sobrien#define TC_DEVICEID_HURRICANE_10_100BT 0x9055 684109313Sobrien#define TC_DEVICEID_CYCLONE_10_100BT4 0x9056 685109313Sobrien#define TC_DEVICEID_CYCLONE_10_100_COMBO 0x9058 686109313Sobrien#define TC_DEVICEID_CYCLONE_10_100FX 0x905A 687109313Sobrien#define TC_DEVICEID_TORNADO_10_100BT 0x9200 688109313Sobrien#define TC_DEVICEID_TORNADO_10_100BT_920B 0x9201 689109313Sobrien#define TC_DEVICEID_TORNADO_10_100BT_920B_WNM 0x9202 690109313Sobrien#define TC_DEVICEID_HURRICANE_10_100BT_SERV 0x9800 691109313Sobrien#define TC_DEVICEID_TORNADO_10_100BT_SERV 0x9805 692109313Sobrien#define TC_DEVICEID_HURRICANE_SOHO100TX 0x7646 693109313Sobrien#define TC_DEVICEID_TORNADO_HOMECONNECT 0x4500 694109313Sobrien#define TC_DEVICEID_HURRICANE_555 0x5055 695109313Sobrien#define TC_DEVICEID_HURRICANE_556 0x6055 696109313Sobrien#define TC_DEVICEID_HURRICANE_556B 0x6056 697109313Sobrien#define TC_DEVICEID_HURRICANE_575A 0x5057 698109313Sobrien#define TC_DEVICEID_HURRICANE_575B 0x5157 699109313Sobrien#define TC_DEVICEID_HURRICANE_575C 0x5257 700109313Sobrien#define TC_DEVICEID_HURRICANE_656 0x6560 701109313Sobrien#define TC_DEVICEID_HURRICANE_656B 0x6562 702109313Sobrien#define TC_DEVICEID_TORNADO_656C 0x6564 703109313Sobrien 704109313Sobrien/* 705109313Sobrien * PCI low memory base and low I/O base register, and 706109313Sobrien * other PCI registers. Note: some are only available on 707109313Sobrien * the 3c905B, in particular those that related to power management. 708109313Sobrien */ 709109457Smarcel#define XL_PCI_VENDOR_ID 0x00 710109313Sobrien#define XL_PCI_DEVICE_ID 0x02 711110257Sobrien#define XL_PCI_COMMAND 0x04 712110257Sobrien#define XL_PCI_STATUS 0x06 713110257Sobrien#define XL_PCI_CLASSCODE 0x09 714110257Sobrien#define XL_PCI_LATENCY_TIMER 0x0D 715110257Sobrien#define XL_PCI_HEADER_TYPE 0x0E 716110257Sobrien#define XL_PCI_LOIO 0x10 717110257Sobrien#define XL_PCI_LOMEM 0x14 718110257Sobrien#define XL_PCI_FUNCMEM 0x18 719267958Semaste#define XL_PCI_BIOSROM 0x30 720267958Semaste#define XL_PCI_INTLINE 0x3C 721267958Semaste#define XL_PCI_INTPIN 0x3D 722267958Semaste#define XL_PCI_MINGNT 0x3E 723267958Semaste#define XL_PCI_MINLAT 0x0F 724267958Semaste#define XL_PCI_RESETOPT 0x48 725109313Sobrien#define XL_PCI_EEPROM_DATA 0x4C 726109313Sobrien 727241737Sed/* 3c905B-only registers */ 728110252Sobrien#define XL_PCI_CAPID 0xDC /* 8 bits */ 729109313Sobrien#define XL_PCI_NEXTPTR 0xDD /* 8 bits */ 730109313Sobrien#define XL_PCI_PWRMGMTCAP 0xDE /* 16 bits */ 731109313Sobrien#define XL_PCI_PWRMGMTCTRL 0xE0 /* 16 bits */ 732109313Sobrien 733109313Sobrien#define XL_PSTATE_MASK 0x0003 734109313Sobrien#define XL_PSTATE_D0 0x0000 735109313Sobrien#define XL_PSTATE_D1 0x0002 736109313Sobrien#define XL_PSTATE_D2 0x0002 737109313Sobrien#define XL_PSTATE_D3 0x0003 738109313Sobrien#define XL_PME_EN 0x0010 739109313Sobrien#define XL_PME_STATUS 0x8000 740109313Sobrien 741109313Sobrien#ifndef IFM_10_FL 742109313Sobrien#define IFM_10_FL 13 /* 10baseFL - Fiber */ 743109313Sobrien#endif 744109313Sobrien