if_xereg.h revision 47133
132185Smsmith/*- 232185Smsmith * Copyright (c) 1998, 1999 Scott Mitchell 332185Smsmith * All rights reserved. 432185Smsmith * 550476Speter * Redistribution and use in source and binary forms, with or without 632185Smsmith * modification, are permitted provided that the following conditions 732185Smsmith * are met: 832185Smsmith * 1. Redistributions of source code must retain the above copyright 932185Smsmith * notice, this list of conditions and the following disclaimer. 1032185Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1132185Smsmith * notice, this list of conditions and the following disclaimer in the 1232185Smsmith * documentation and/or other materials provided with the distribution. 1332185Smsmith * 1432185Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1532185Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1632185Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1776815Sru * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1876815Sru * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1932185Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2032185Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2132185Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2232185Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2332185Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2432185Smsmith * SUCH DAMAGE. 2532185Smsmith * 2632185Smsmith * $Id: if_xereg.h,v 1.2 1999/01/24 22:15:30 root Exp $ 2732185Smsmith */ 2832185Smsmith 2932185Smsmith/* 3032185Smsmith * Register definitions for Xircom CreditCard Ethernet adapters. See if_xe.c 3132185Smsmith * for details of supported hardware. Adapted from Werner Koch's 'xirc2ps' 3232185Smsmith * driver for Linux. 3332185Smsmith */ 3432185Smsmith 3532185Smsmith#include "xe.h" 3632185Smsmith#if NXE > 0 3732185Smsmith 3832185Smsmith 3932185Smsmith/* 4032185Smsmith * Common registers 4132185Smsmith */ 4232185Smsmith#define XE_CR 0 /* Command register (write) */ 4332185Smsmith#define XE_ESR 0 /* Ethernet status register (read) */ 4432185Smsmith#define XE_PSR 1 /* Page select register */ 4532185Smsmith#define XE_EDP 4 /* Ethernet data port */ 4632185Smsmith#define XE_ISR 6 /* Interrupt status register */ 4732185Smsmith 4832185Smsmith/* 4932185Smsmith * Command register values 5032185Smsmith */ 5132185Smsmith#define XE_CR_TX_PACKET 0x01 5232185Smsmith#define XE_CR_SOFT_RESET 0x02 5332185Smsmith#define XE_CR_ENABLE_INTR 0x04 5432185Smsmith#define XE_CR_FORCE_INTR 0x08 5532185Smsmith#define XE_CR_CLEAR_FIFO 0x10 5632185Smsmith#define XE_CR_CLEAR_OVERRUN 0x20 5732185Smsmith#define XE_CR_RESTART_TX 0x40 5832185Smsmith 5932185Smsmith/* 6032185Smsmith * Status register values 6132185Smsmith */ 6232185Smsmith#define XE_ESR_FULL_PKT_RX 0x01 6332185Smsmith#define XE_ESR_PKT_REJECT 0x04 6432185Smsmith#define XE_ESR_TX_PENDING 0x08 6532185Smsmith#define XE_ESR_BAD_POLARITY 0x10 6632185Smsmith#define XE_ESR_MEDIA_SELECT 0x20 6732185Smsmith 6832185Smsmith/* 6932185Smsmith * Interrupt register values 7032185Smsmith */ 7132185Smsmith#define XE_ISR_TX_OVERFLOW 0x01 7232185Smsmith#define XE_ISR_TX_PACKET 0x02 7332185Smsmith#define XE_ISR_MAC_INTR 0x04 7432185Smsmith#define XE_ISR_TX_RES 0x08 7532185Smsmith#define XE_ISR_RX_PACKET 0x20 7632185Smsmith#define XE_ISR_RX_REJECT 0x40 7732185Smsmith#define XE_ISR_FORCE_INTR 0x80 7832185Smsmith 7932185Smsmith 8032185Smsmith/* 8132185Smsmith * Page 0 registers 8232185Smsmith */ 8332185Smsmith#define XE_TSO 8 /* Transmit space open */ 8432185Smsmith#define XE_TRS 10 /* Transmit reservation size */ 8532185Smsmith#define XE_DOR 12 /* Data offset register (write) */ 8632185Smsmith#define XE_RSR 12 /* Receive status register (read) */ 8732185Smsmith#define XE_PTR 13 /* Packets transmitted register (read) */ 8832185Smsmith#define XE_RBC 14 /* Received byte count (read) */ 8932185Smsmith 9032185Smsmith/* 9159711Sn_hibma * RSR values 9232185Smsmith */ 9332185Smsmith#define XE_RSR_PHYS_PKT 0x01 9432185Smsmith#define XE_RSR_BCAST_PKT 0x02 9532185Smsmith#define XE_RSR_LONG_PKT 0x04 9632185Smsmith#define XE_RSR_ALIGN_ERR 0x10 9732185Smsmith#define XE_RSR_CRC_ERR 0x20 9832185Smsmith#define XE_RSR_RX_OK 0x80 9932185Smsmith 10032185Smsmith 10132185Smsmith/* 10232185Smsmith * Page 1 registers 10332185Smsmith */ 10432185Smsmith#define XE_IMR0 12 /* Interrupt mask register, part 1 */ 10532185Smsmith#define XE_IMR1 13 /* Interrupt mask register, part 2 */ 10632185Smsmith#define XE_ECR 14 /* Ethernet configuration register */ 10732185Smsmith 10832185Smsmith/* 10932185Smsmith * ECR values 110118576Simp */ 11132185Smsmith#define XE_ECR_FULL_DUPLEX 0x04 11232185Smsmith#define XE_ECR_LONG_TPCABLE 0x08 11332185Smsmith#define XE_ECR_NO_POLCOL 0x10 11432185Smsmith#define XE_ECR_NO_LINKPULSE 0x20 11532185Smsmith#define XE_ECR_NO_AUTOTX 0x40 11632185Smsmith 11732185Smsmith 11832185Smsmith/* 11932185Smsmith * Page 2 registers 12032185Smsmith */ 12132185Smsmith#define XE_RBS 8 /* Receive buffer start */ 12232185Smsmith#define XE_LED 10 /* LED configuration register */ 12332185Smsmith#define XE_MSR 12 /* Mohawk specfic register (Mohawk = CE3) */ 12432185Smsmith#define XE_GPR2 13 /* General purpose register 2 */ 12532185Smsmith 12632185Smsmith 12732185Smsmith/* 12832185Smsmith * Page 4 registers 12932185Smsmith */ 13032185Smsmith#define XE_GPR0 8 /* General purpose register 0 */ 13132185Smsmith#define XE_GPR1 9 /* General purpose register 1 */ 13232185Smsmith#define XE_BOV 10 /* Bonding version register */ 13332185Smsmith#define XE_LMA 12 /* Local memory address */ 13432185Smsmith#define XE_LMD 14 /* Local memory data */ 13532185Smsmith 13632185Smsmith 13732185Smsmith/* 13832185Smsmith * Page 5 registers 13932185Smsmith */ 14032185Smsmith#define XE_RHS 10 /* Receive host start address */ 14132185Smsmith 14232185Smsmith 14332185Smsmith/* 14432185Smsmith * Page 0x40 registers 14532185Smsmith */ 14632185Smsmith#define XE_OCR 8 /* The Other command register */ 14732185Smsmith#define XE_RXS0 9 /* Receive status 0 */ 14832185Smsmith#define XE_TXS0 11 /* Transmit status 0 */ 14932185Smsmith#define XE_TXS1 12 /* Transmit status 1 */ 15032185Smsmith#define XE_RXM0 13 /* Receive mask register 0 */ 15132185Smsmith#define XE_TXM0 14 /* Transmit mask register 0 */ 15232185Smsmith#define XE_TXM1 15 /* Transmit mask register 1 */ 15332185Smsmith 15432185Smsmith/* 15532185Smsmith * OCR values 15632185Smsmith */ 15732185Smsmith#define XE_OCR_TX 0x01 15832185Smsmith#define XE_OCR_RX_ENABLE 0x04 15932185Smsmith#define XE_OCR_RX_DISABLE 0x08 16032185Smsmith#define XE_OCR_ABORT 0x10 16132185Smsmith#define XE_OCR_ONLINE 0x20 16232185Smsmith#define XE_OCR_ACK_INTR 0x40 16332185Smsmith#define XE_OCR_OFFLINE 0x80 16432185Smsmith 16532185Smsmith 16632185Smsmith/* 16732185Smsmith * Page 0x42 registers 16832185Smsmith */ 16932185Smsmith#define XE_SWC0 8 /* Software configuration register 0 */ 17032185Smsmith#define XE_SWC1 9 /* Software configuration register 1 */ 17132185Smsmith#define XE_BOC 10 /* Back-off configuration */ 17232185Smsmith 17332185Smsmith 17432185Smsmith/* 17532185Smsmith * Page 0x44 registers 17632185Smsmith */ 17732185Smsmith#define XE_TDR0 8 /* Time domain reflectometry register 0 */ 17832185Smsmith#define XE_TDR1 9 /* Time domain reflectometry register 1 */ 17932185Smsmith#define XE_RXC0 10 /* Receive byte count low */ 18032185Smsmith#define XE_RXC1 11 /* Receive byte count high */ 18132185Smsmith 18232185Smsmith 18332185Smsmith/* 18432185Smsmith * Page 0x45 registers 18532185Smsmith */ 18632185Smsmith#define XE_REV 15 /* Revision (read) */ 18732185Smsmith 18832185Smsmith 18932185Smsmith/* 19032185Smsmith * Page 0x50 registers 19132185Smsmith */ 19232185Smsmith#define XE_IAR 8 /* Individual address register */ 19332185Smsmith 19432185Smsmith 19532185Smsmith/* 19632185Smsmith * Pages 0x43, 0x46-0x4f and 0x51-0x5e apparently don't exist. 19732185Smsmith * The remainder of 0x0-0x8 and 0x40-0x5f exist, but I have no 19832185Smsmith * idea what's on most of them. 19932185Smsmith */ 20032185Smsmith 20132185Smsmith 20232185Smsmith/* 20332185Smsmith * MII/PHY defines adapted from the xl driver. These need cleaning up a 20432185Smsmith * little if we end up using them. 20532185Smsmith */ 20632185Smsmith#define XE_MII_CLK 0x01 20732185Smsmith#define XE_MII_DIR 0x08 20832185Smsmith#define XE_MII_WRD 0x02 20932185Smsmith#define XE_MII_RDD 0x20 21032185Smsmith#define XE_MII_STARTDELIM 0x01 21132185Smsmith#define XE_MII_READOP 0x02 21232185Smsmith#define XE_MII_WRITEOP 0x01 21332185Smsmith#define XE_MII_TURNAROUND 0x02 21432185Smsmith 21532185Smsmith#define XE_MII_SET(x) XE_OUTB(XE_GPR2, (XE_INB(XE_GPR2) | 0x04) | (x)) 21632185Smsmith#define XE_MII_CLR(x) XE_OUTB(XE_GPR2, (XE_INB(XE_GPR2) | 0x04) & ~(x)) 21732185Smsmith 21832185Smsmith#define XL_PHY_GENCTL 0x00 21932185Smsmith#define XL_PHY_GENSTS 0x01 22032185Smsmith#define XL_PHY_VENID 0x02 22132185Smsmith#define XL_PHY_DEVID 0x03 22232185Smsmith#define XL_PHY_ANAR 0x04 22332185Smsmith#define XL_PHY_LPAR 0x05 22432185Smsmith#define XL_PHY_ANER 0x06 22532185Smsmith 22632185Smsmith#define PHY_ANAR_NEXTPAGE 0x8000 22732185Smsmith#define PHY_ANAR_RSVD0 0x4000 22832185Smsmith#define PHY_ANAR_TLRFLT 0x2000 22932185Smsmith#define PHY_ANAR_RSVD1 0x1000 23032185Smsmith#define PHY_ANAR_RSVD2 0x0800 23132185Smsmith#define PHY_ANAR_RSVD3 0x0400 23232185Smsmith#define PHY_ANAR_100BT4 0x0200 23332185Smsmith#define PHY_ANAR_100BTXFULL 0x0100 23432185Smsmith#define PHY_ANAR_100BTXHALF 0x0080 23532185Smsmith#define PHY_ANAR_10BTFULL 0x0040 23632185Smsmith#define PHY_ANAR_10BTHALF 0x0020 23732185Smsmith#define PHY_ANAR_PROTO4 0x0010 23832185Smsmith#define PHY_ANAR_PROTO3 0x0008 23932185Smsmith#define PHY_ANAR_PROTO2 0x0004 24032185Smsmith#define PHY_ANAR_PROTO1 0x0002 24132185Smsmith#define PHY_ANAR_PROTO0 0x0001 24232185Smsmith 24332185Smsmith/* 24432185Smsmith * PHY BMCR Basic Mode Control Register 24532185Smsmith */ 24632185Smsmith#define PHY_BMCR 0x00 24732185Smsmith#define PHY_BMCR_RESET 0x8000 24832185Smsmith#define PHY_BMCR_LOOPBK 0x4000 24932185Smsmith#define PHY_BMCR_SPEEDSEL 0x2000 25032185Smsmith#define PHY_BMCR_AUTONEGENBL 0x1000 251145210Siedowse#define PHY_BMCR_RSVD0 0x0800 /* write as zero */ 25232185Smsmith#define PHY_BMCR_ISOLATE 0x0400 25332185Smsmith#define PHY_BMCR_AUTONEGRSTR 0x0200 25432185Smsmith#define PHY_BMCR_DUPLEX 0x0100 25532185Smsmith#define PHY_BMCR_COLLTEST 0x0080 25632185Smsmith#define PHY_BMCR_RSVD1 0x0040 /* write as zero, don't care */ 25732185Smsmith#define PHY_BMCR_RSVD2 0x0020 /* write as zero, don't care */ 25832185Smsmith#define PHY_BMCR_RSVD3 0x0010 /* write as zero, don't care */ 25932185Smsmith#define PHY_BMCR_RSVD4 0x0008 /* write as zero, don't care */ 26032185Smsmith#define PHY_BMCR_RSVD5 0x0004 /* write as zero, don't care */ 26132185Smsmith#define PHY_BMCR_RSVD6 0x0002 /* write as zero, don't care */ 26232185Smsmith#define PHY_BMCR_RSVD7 0x0001 /* write as zero, don't care */ 26332185Smsmith 26432185Smsmith/* 26532185Smsmith * PHY, BMSR Basic Mode Status Register 26632185Smsmith */ 26732185Smsmith#define PHY_BMSR 0x01 26832185Smsmith#define PHY_BMSR_100BT4 0x8000 26932185Smsmith#define PHY_BMSR_100BTXFULL 0x4000 27032185Smsmith#define PHY_BMSR_100BTXHALF 0x2000 27132185Smsmith#define PHY_BMSR_10BTFULL 0x1000 272250460Seadler#define PHY_BMSR_10BTHALF 0x0800 27332185Smsmith#define PHY_BMSR_RSVD1 0x0400 /* write as zero, don't care */ 27432185Smsmith#define PHY_BMSR_RSVD2 0x0200 /* write as zero, don't care */ 27532185Smsmith#define PHY_BMSR_RSVD3 0x0100 /* write as zero, don't care */ 27632185Smsmith#define PHY_BMSR_RSVD4 0x0080 /* write as zero, don't care */ 27732185Smsmith#define PHY_BMSR_MFPRESUP 0x0040 27832185Smsmith#define PHY_BMSR_AUTONEGCOMP 0x0020 27932185Smsmith#define PHY_BMSR_REMFAULT 0x0010 28032185Smsmith#define PHY_BMSR_CANAUTONEG 0x0008 28132185Smsmith#define PHY_BMSR_LINKSTAT 0x0004 28232185Smsmith#define PHY_BMSR_JABBER 0x0002 28332185Smsmith#define PHY_BMSR_EXTENDED 0x0001 28432185Smsmith 28532185Smsmith 28632185Smsmith#endif /* NXE > 0 */ 28732185Smsmith