if_urtw.c revision 196969
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 196969 2009-09-08 13:16:55Z phk $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 64#define nitems(a) (sizeof(a) / sizeof((a)[0])) 65 66SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 67#ifdef URTW_DEBUG 68int urtw_debug = 0; 69SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 70 "control debugging printfs"); 71TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 72enum { 73 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 74 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 75 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 76 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 77 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 78 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 79 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 80 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 81 URTW_DEBUG_ANY = 0xffffffff 82}; 83#define DPRINTF(sc, m, fmt, ...) do { \ 84 if (sc->sc_debug & (m)) \ 85 printf(fmt, __VA_ARGS__); \ 86} while (0) 87#else 88#define DPRINTF(sc, m, fmt, ...) do { \ 89 (void) sc; \ 90} while (0) 91#endif 92static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 93SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW, 94 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 95TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 96 97/* recognized device vendors/products */ 98#define urtw_lookup(v, p) \ 99 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 100#define URTW_DEV_B(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 102#define URTW_DEV_L(v,p) \ 103 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 104#define URTW_REV_RTL8187B 0 105#define URTW_REV_RTL8187L 1 106static const struct usb_device_id urtw_devs[] = { 107 { USB_VPI(USB_VENDOR_BELKIN, 0x705e, URTW_REV_RTL8187B) }, 108 { USB_VPI(USB_VENDOR_REALTEK, 0x8189, URTW_REV_RTL8187B) }, 109 { USB_VPI(USB_VENDOR_REALTEK, 0x8197, URTW_REV_RTL8187B) }, 110 { USB_VPI(USB_VENDOR_REALTEK, 0x8198, URTW_REV_RTL8187B) }, 111 { USB_VPI(USB_VENDOR_NETGEAR, 0x4260, URTW_REV_RTL8187B) }, 112 { USB_VPI(0x1b75, 0x8187, URTW_REV_RTL8187L) }, 113 { USB_VPI(USB_VENDOR_ASUS, 0x171d, URTW_REV_RTL8187L) }, 114 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 115 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 116 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 117 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 118 URTW_DEV_L(NETGEAR, WG111V2), 119 URTW_DEV_L(REALTEK, RTL8187), 120 { USB_VPI(USB_VENDOR_SITECOMEU, 0x000d, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_SITECOMEU, 0x0028, URTW_REV_RTL8187B) }, 122 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_SURECOM, 0x11f2, URTW_REV_RTL8187L) }, 124 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 125#undef URTW_DEV_L 126#undef URTW_DEV_B 127}; 128 129#define urtw_read8_m(sc, val, data) do { \ 130 error = urtw_read8_c(sc, val, data); \ 131 if (error != 0) \ 132 goto fail; \ 133} while (0) 134#define urtw_write8_m(sc, val, data) do { \ 135 error = urtw_write8_c(sc, val, data); \ 136 if (error != 0) \ 137 goto fail; \ 138} while (0) 139#define urtw_read16_m(sc, val, data) do { \ 140 error = urtw_read16_c(sc, val, data); \ 141 if (error != 0) \ 142 goto fail; \ 143} while (0) 144#define urtw_write16_m(sc, val, data) do { \ 145 error = urtw_write16_c(sc, val, data); \ 146 if (error != 0) \ 147 goto fail; \ 148} while (0) 149#define urtw_read32_m(sc, val, data) do { \ 150 error = urtw_read32_c(sc, val, data); \ 151 if (error != 0) \ 152 goto fail; \ 153} while (0) 154#define urtw_write32_m(sc, val, data) do { \ 155 error = urtw_write32_c(sc, val, data); \ 156 if (error != 0) \ 157 goto fail; \ 158} while (0) 159#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 160 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 161 if (error != 0) \ 162 goto fail; \ 163} while (0) 164#define urtw_8187_write_phy_cck(sc, val, data) do { \ 165 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 166 if (error != 0) \ 167 goto fail; \ 168} while (0) 169#define urtw_8225_write(sc, val, data) do { \ 170 error = urtw_8225_write_c(sc, val, data); \ 171 if (error != 0) \ 172 goto fail; \ 173} while (0) 174 175struct urtw_pair { 176 uint32_t reg; 177 uint32_t val; 178}; 179 180static const uint8_t urtw_8187b_reg_table[][3] = { 181 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 182 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 183 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 184 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 185 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 186 { 0xff, 0x00, 0 }, 187 188 { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, { 0x5a, 0x4b, 1 }, 189 { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, { 0x61, 0x09, 1 }, 190 { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, { 0xce, 0x0f, 1 }, 191 { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, { 0xe1, 0x0f, 1 }, 192 { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, { 0xf1, 0x01, 1 }, 193 { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, { 0xf4, 0x04, 1 }, 194 { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, { 0xf7, 0x07, 1 }, 195 { 0xf8, 0x08, 1 }, 196 197 { 0x4e, 0x00, 2 }, { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, 198 { 0x22, 0x68, 2 }, { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, 199 { 0x25, 0x7d, 2 }, { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, 200 { 0x4d, 0x08, 2 }, { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, 201 { 0x52, 0x04, 2 }, { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, 202 { 0x55, 0x23, 2 }, { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, 203 { 0x58, 0x08, 2 }, { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, 204 { 0x5b, 0x08, 2 }, { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, 205 { 0x62, 0x08, 2 }, { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, 206 { 0x72, 0x56, 2 }, { 0x73, 0x9a, 2 }, 207 208 { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, { 0x5b, 0x40, 0 }, 209 { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, { 0x88, 0x54, 0 }, 210 { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, { 0x8d, 0x00, 0 }, 211 { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, { 0x96, 0x00, 0 }, 212 { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, { 0x9f, 0x10, 0 }, 213 { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, { 0xdb, 0x00, 0 }, 214 { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 215 216 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 217 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 218}; 219 220static uint8_t urtw_8225_agc[] = { 221 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 222 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 223 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 224 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 225 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 226 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 227 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 228 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 229 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 230 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 231 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 232 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 233}; 234 235static uint32_t urtw_8225_channel[] = { 236 0x0000, /* dummy channel 0 */ 237 0x085c, /* 1 */ 238 0x08dc, /* 2 */ 239 0x095c, /* 3 */ 240 0x09dc, /* 4 */ 241 0x0a5c, /* 5 */ 242 0x0adc, /* 6 */ 243 0x0b5c, /* 7 */ 244 0x0bdc, /* 8 */ 245 0x0c5c, /* 9 */ 246 0x0cdc, /* 10 */ 247 0x0d5c, /* 11 */ 248 0x0ddc, /* 12 */ 249 0x0e5c, /* 13 */ 250 0x0f72, /* 14 */ 251}; 252 253static uint8_t urtw_8225_gain[] = { 254 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 255 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 256 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 257 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 258 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 259 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 260 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 261}; 262 263static struct urtw_pair urtw_8225_rf_part1[] = { 264 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 265 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 266 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 267 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 } 268}; 269 270static struct urtw_pair urtw_8225_rf_part2[] = { 271 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 272 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 273 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 274 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 275 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 276 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 277 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 278 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 279 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 280 { 0x27, 0x88 } 281}; 282 283static struct urtw_pair urtw_8225_rf_part3[] = { 284 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 285 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 286 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 287 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 288 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 289 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 290 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 291}; 292 293static uint16_t urtw_8225_rxgain[] = { 294 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 295 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 296 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 297 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 298 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 299 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 300 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 301 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 302 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 303 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 304 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 305 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 306}; 307 308static uint8_t urtw_8225_threshold[] = { 309 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd 310}; 311 312static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 313 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 314}; 315 316static uint8_t urtw_8225_txpwr_cck[] = { 317 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 318 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 319 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 320 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 321 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 322 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 323}; 324 325static uint8_t urtw_8225_txpwr_cck_ch14[] = { 326 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 327 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 328 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 329 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 330 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 331 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 332}; 333 334static uint8_t urtw_8225_txpwr_ofdm[] = { 335 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 336}; 337 338static uint8_t urtw_8225z2_agc[] = { 339 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 340 0x55, 0x53, 0x51, 0x4f, 0x4d, 0x4b, 0x49, 0x47, 341 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 0x39, 0x37, 342 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 343 0x25, 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 344 0x15, 0x13, 0x11, 0x0f, 0x0d, 0x0b, 0x09, 0x07, 345 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 346 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 347 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 348 0x19, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 349 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 350 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 351 0x2d, 0x2d, 0x2d, 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 352 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 0x31, 0x31, 353 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 354 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 355}; 356 357static uint8_t urtw_8225v2_gain_bg[]={ 358 0x23, 0x15, 0xa5, /* -82-1dbm */ 359 0x23, 0x15, 0xb5, /* -82-2dbm */ 360 0x23, 0x15, 0xc5, /* -82-3dbm */ 361 0x33, 0x15, 0xc5, /* -78dbm */ 362 0x43, 0x15, 0xc5, /* -74dbm */ 363 0x53, 0x15, 0xc5, /* -70dbm */ 364 0x63, 0x15, 0xc5, /* -66dbm */ 365}; 366 367static struct urtw_pair urtw_8225v2_rf_part1[] = { 368 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 369 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 370 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 371 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 372}; 373 374static struct urtw_pair urtw_8225v2b_rf_part1[] = { 375 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 376 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 377 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 378 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 379}; 380 381static struct urtw_pair urtw_8225v2_rf_part2[] = { 382 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 383 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 384 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 385 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 386 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 387 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 388 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 389 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 390 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 391 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 392}; 393 394static struct urtw_pair urtw_8225v2b_rf_part2[] = { 395 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 396 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 397 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 398 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 399 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 400 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 401 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 402 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 403 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 404 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 405 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 406 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 407 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 408 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 409 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 410}; 411 412static struct urtw_pair urtw_8225v2_rf_part3[] = { 413 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 414 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 415 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 416 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 417 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 418 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 419 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 420 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 421}; 422 423static uint16_t urtw_8225v2_rxgain[] = { 424 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 425 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 426 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 427 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 428 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 429 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 430 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 431 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 432 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 433 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 434 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 435 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 436}; 437 438static uint16_t urtw_8225v2b_rxgain[] = { 439 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 440 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 441 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 442 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 443 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 444 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 445 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 446 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 447 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 448 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 449 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 450 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 451}; 452 453static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 454 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 455 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 456 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 457 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 458 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 459 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23 460}; 461 462static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 463 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 464}; 465 466static uint8_t urtw_8225v2b_txpwr_cck[] = { 467 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 468 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 469 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 470 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 471}; 472 473static uint8_t urtw_8225v2_txpwr_cck[] = { 474 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 475}; 476 477static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 478 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 479 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 480 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 481 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 482}; 483 484static struct urtw_pair urtw_ratetable[] = { 485 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 486 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 487 { 96, 10 }, { 108, 11 } 488}; 489 490static usb_callback_t urtw_bulk_rx_callback; 491static usb_callback_t urtw_bulk_tx_callback; 492 493static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 494 [URTW_8187B_BULK_RX] = { 495 .type = UE_BULK, 496 .endpoint = 0x83, 497 .direction = UE_DIR_IN, 498 .bufsize = MCLBYTES, 499 .flags = { 500 .ext_buffer = 1, 501 .pipe_bof = 1, 502 .short_xfer_ok = 1 503 }, 504 .callback = urtw_bulk_rx_callback 505 }, 506 [URTW_8187B_BULK_TX_BE] = { 507 .type = UE_BULK, 508 .endpoint = URTW_8187B_TXPIPE_BE, 509 .direction = UE_DIR_OUT, 510 .bufsize = URTW_TX_MAXSIZE, 511 .flags = { 512 .ext_buffer = 1, 513 .force_short_xfer = 1, 514 .pipe_bof = 1, 515 }, 516 .callback = urtw_bulk_tx_callback, 517 .timeout = URTW_DATA_TIMEOUT 518 }, 519 [URTW_8187B_BULK_TX_BK] = { 520 .type = UE_BULK, 521 .endpoint = URTW_8187B_TXPIPE_BK, 522 .direction = UE_DIR_OUT, 523 .bufsize = URTW_TX_MAXSIZE, 524 .flags = { 525 .ext_buffer = 1, 526 .force_short_xfer = 1, 527 .pipe_bof = 1, 528 }, 529 .callback = urtw_bulk_tx_callback, 530 .timeout = URTW_DATA_TIMEOUT 531 }, 532 [URTW_8187B_BULK_TX_VI] = { 533 .type = UE_BULK, 534 .endpoint = URTW_8187B_TXPIPE_VI, 535 .direction = UE_DIR_OUT, 536 .bufsize = URTW_TX_MAXSIZE, 537 .flags = { 538 .ext_buffer = 1, 539 .force_short_xfer = 1, 540 .pipe_bof = 1, 541 }, 542 .callback = urtw_bulk_tx_callback, 543 .timeout = URTW_DATA_TIMEOUT 544 }, 545 [URTW_8187B_BULK_TX_VO] = { 546 .type = UE_BULK, 547 .endpoint = URTW_8187B_TXPIPE_VO, 548 .direction = UE_DIR_OUT, 549 .bufsize = URTW_TX_MAXSIZE, 550 .flags = { 551 .ext_buffer = 1, 552 .force_short_xfer = 1, 553 .pipe_bof = 1, 554 }, 555 .callback = urtw_bulk_tx_callback, 556 .timeout = URTW_DATA_TIMEOUT 557 }, 558 [URTW_8187B_BULK_TX_EP12] = { 559 .type = UE_BULK, 560 .endpoint = 0xc, 561 .direction = UE_DIR_OUT, 562 .bufsize = URTW_TX_MAXSIZE, 563 .flags = { 564 .ext_buffer = 1, 565 .force_short_xfer = 1, 566 .pipe_bof = 1, 567 }, 568 .callback = urtw_bulk_tx_callback, 569 .timeout = URTW_DATA_TIMEOUT 570 } 571}; 572 573static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 574 [URTW_8187L_BULK_RX] = { 575 .type = UE_BULK, 576 .endpoint = 0x81, 577 .direction = UE_DIR_IN, 578 .bufsize = MCLBYTES, 579 .flags = { 580 .ext_buffer = 1, 581 .pipe_bof = 1, 582 .short_xfer_ok = 1 583 }, 584 .callback = urtw_bulk_rx_callback 585 }, 586 [URTW_8187L_BULK_TX_LOW] = { 587 .type = UE_BULK, 588 .endpoint = 0x2, 589 .direction = UE_DIR_OUT, 590 .bufsize = URTW_TX_MAXSIZE, 591 .flags = { 592 .ext_buffer = 1, 593 .force_short_xfer = 1, 594 .pipe_bof = 1, 595 }, 596 .callback = urtw_bulk_tx_callback, 597 .timeout = URTW_DATA_TIMEOUT 598 }, 599 [URTW_8187L_BULK_TX_NORMAL] = { 600 .type = UE_BULK, 601 .endpoint = 0x3, 602 .direction = UE_DIR_OUT, 603 .bufsize = URTW_TX_MAXSIZE, 604 .flags = { 605 .ext_buffer = 1, 606 .force_short_xfer = 1, 607 .pipe_bof = 1, 608 }, 609 .callback = urtw_bulk_tx_callback, 610 .timeout = URTW_DATA_TIMEOUT 611 }, 612}; 613 614static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 615 const char name[IFNAMSIZ], int unit, int opmode, 616 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 617 const uint8_t mac[IEEE80211_ADDR_LEN]); 618static void urtw_vap_delete(struct ieee80211vap *); 619static void urtw_init(void *); 620static void urtw_stop(struct ifnet *, int); 621static void urtw_stop_locked(struct ifnet *, int); 622static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 623static void urtw_start(struct ifnet *); 624static int urtw_alloc_rx_data_list(struct urtw_softc *); 625static int urtw_alloc_tx_data_list(struct urtw_softc *); 626static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 627 const struct ieee80211_bpf_params *); 628static void urtw_scan_start(struct ieee80211com *); 629static void urtw_scan_end(struct ieee80211com *); 630static void urtw_set_channel(struct ieee80211com *); 631static void urtw_update_mcast(struct ifnet *); 632static int urtw_tx_start(struct urtw_softc *, 633 struct ieee80211_node *, struct mbuf *, 634 struct urtw_data *, int); 635static int urtw_newstate(struct ieee80211vap *, 636 enum ieee80211_state, int); 637static void urtw_led_ch(void *); 638static void urtw_ledtask(void *, int); 639static void urtw_watchdog(void *); 640static void urtw_set_multi(void *); 641static int urtw_isbmode(uint16_t); 642static uint16_t urtw_rate2rtl(int); 643static uint16_t urtw_rtl2rate(int); 644static usb_error_t urtw_set_rate(struct urtw_softc *); 645static usb_error_t urtw_update_msr(struct urtw_softc *); 646static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 647static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 648static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 649static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 650static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 651static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 652static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 653static usb_error_t urtw_eprom_ck(struct urtw_softc *); 654static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 655 int); 656static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 657 uint32_t *); 658static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 659static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 660static usb_error_t urtw_get_macaddr(struct urtw_softc *); 661static usb_error_t urtw_get_txpwr(struct urtw_softc *); 662static usb_error_t urtw_get_rfchip(struct urtw_softc *); 663static usb_error_t urtw_led_init(struct urtw_softc *); 664static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 665static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 666static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 667 uint32_t); 668static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 669 uint8_t, uint32_t); 670static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 671 uint32_t); 672static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 673static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 674static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 675 uint16_t); 676static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 677 uint16_t *); 678static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 679 uint32_t *); 680static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 681static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 682static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 683static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 684static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 685static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 686static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 687static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 688static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 689static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 690static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 691static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 692static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 693static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 694static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 695static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 696static usb_error_t urtw_intr_enable(struct urtw_softc *); 697static usb_error_t urtw_intr_disable(struct urtw_softc *); 698static usb_error_t urtw_reset(struct urtw_softc *); 699static usb_error_t urtw_led_on(struct urtw_softc *, int); 700static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 701static usb_error_t urtw_led_blink(struct urtw_softc *); 702static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 703static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 704static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 705static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 706static usb_error_t urtw_rx_setconf(struct urtw_softc *); 707static usb_error_t urtw_rx_enable(struct urtw_softc *); 708static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 709static void urtw_free_tx_data_list(struct urtw_softc *); 710static void urtw_free_rx_data_list(struct urtw_softc *); 711static void urtw_free_data_list(struct urtw_softc *, 712 struct urtw_data data[], int, int); 713static usb_error_t urtw_adapter_start(struct urtw_softc *); 714static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 715static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 716static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 717static usb_error_t urtw_write16_i(struct urtw_softc *, int, uint16_t, int); 718static usb_error_t urtw_write8_i(struct urtw_softc *, int, uint8_t, int); 719static usb_error_t urtw_write32_i(struct urtw_softc *, int, uint32_t, int); 720static usb_error_t urtw_do_request(struct urtw_softc *, 721 struct usb_device_request *, void *); 722static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 723static usb_error_t urtw_led_off(struct urtw_softc *, int); 724static void urtw_abort_xfers(struct urtw_softc *); 725static struct urtw_data * 726 urtw_getbuf(struct urtw_softc *sc); 727 728static int 729urtw_match(device_t dev) 730{ 731 struct usb_attach_arg *uaa = device_get_ivars(dev); 732 733 if (uaa->usb_mode != USB_MODE_HOST) 734 return (ENXIO); 735 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 736 return (ENXIO); 737 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 738 return (ENXIO); 739 740 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 741} 742 743static int 744urtw_attach(device_t dev) 745{ 746 const struct usb_config *setup_start; 747 int ret = ENXIO; 748 struct urtw_softc *sc = device_get_softc(dev); 749 struct usb_attach_arg *uaa = device_get_ivars(dev); 750 struct ieee80211com *ic; 751 struct ifnet *ifp; 752 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 753 uint16_t n_setup; 754 uint32_t data; 755 usb_error_t error; 756 757 device_set_usb_desc(dev); 758 759 sc->sc_dev = dev; 760 sc->sc_udev = uaa->device; 761 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 762 sc->sc_flags |= URTW_RTL8187B; 763#ifdef URTW_DEBUG 764 sc->sc_debug = urtw_debug; 765#endif 766 767 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 768 MTX_DEF); 769 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 770 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 771 callout_init(&sc->sc_watchdog_ch, 0); 772 773 if (sc->sc_flags & URTW_RTL8187B) { 774 setup_start = urtw_8187b_usbconfig; 775 n_setup = URTW_8187B_N_XFERS; 776 } else { 777 setup_start = urtw_8187l_usbconfig; 778 n_setup = URTW_8187L_N_XFERS; 779 } 780 781 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 782 setup_start, n_setup, sc, &sc->sc_mtx); 783 if (error) { 784 device_printf(dev, "could not allocate USB transfers, " 785 "err=%s\n", usbd_errstr(error)); 786 ret = ENXIO; 787 goto fail0; 788 } 789 790 URTW_LOCK(sc); 791 792 urtw_read32_m(sc, URTW_RX, &data); 793 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 794 URTW_EEPROM_93C46; 795 796 error = urtw_get_rfchip(sc); 797 if (error != 0) 798 goto fail; 799 error = urtw_get_macaddr(sc); 800 if (error != 0) 801 goto fail; 802 error = urtw_get_txpwr(sc); 803 if (error != 0) 804 goto fail; 805 error = urtw_led_init(sc); 806 if (error != 0) 807 goto fail; 808 809 URTW_UNLOCK(sc); 810 811 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 812 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 813 sc->sc_currate = 3; 814 sc->sc_preamble_mode = urtw_preamble_mode; 815 816 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 817 if (ifp == NULL) { 818 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 819 ret = ENOMEM; 820 goto fail1; 821 } 822 823 ifp->if_softc = sc; 824 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 825 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 826 ifp->if_init = urtw_init; 827 ifp->if_ioctl = urtw_ioctl; 828 ifp->if_start = urtw_start; 829 /* XXX URTW_TX_DATA_LIST_COUNT */ 830 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 831 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 832 IFQ_SET_READY(&ifp->if_snd); 833 834 ic = ifp->if_l2com; 835 ic->ic_ifp = ifp; 836 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 837 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 838 839 /* set device capabilities */ 840 ic->ic_caps = 841 IEEE80211_C_STA | /* station mode */ 842 IEEE80211_C_MONITOR | /* monitor mode supported */ 843 IEEE80211_C_TXPMGT | /* tx power management */ 844 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 845 IEEE80211_C_SHSLOT | /* short slot time supported */ 846 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 847 IEEE80211_C_WPA; /* 802.11i */ 848 849 bands = 0; 850 setbit(&bands, IEEE80211_MODE_11B); 851 setbit(&bands, IEEE80211_MODE_11G); 852 ieee80211_init_channels(ic, NULL, &bands); 853 854 ieee80211_ifattach(ic, sc->sc_bssid); 855 ic->ic_raw_xmit = urtw_raw_xmit; 856 ic->ic_scan_start = urtw_scan_start; 857 ic->ic_scan_end = urtw_scan_end; 858 ic->ic_set_channel = urtw_set_channel; 859 860 ic->ic_vap_create = urtw_vap_create; 861 ic->ic_vap_delete = urtw_vap_delete; 862 ic->ic_update_mcast = urtw_update_mcast; 863 864 ieee80211_radiotap_attach(ic, 865 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 866 URTW_TX_RADIOTAP_PRESENT, 867 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 868 URTW_RX_RADIOTAP_PRESENT); 869 870 if (bootverbose) 871 ieee80211_announce(ic); 872 return (0); 873 874fail: URTW_UNLOCK(sc); 875fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 876 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 877fail0: 878 return (ret); 879} 880 881static int 882urtw_detach(device_t dev) 883{ 884 struct urtw_softc *sc = device_get_softc(dev); 885 struct ifnet *ifp = sc->sc_ifp; 886 struct ieee80211com *ic = ifp->if_l2com; 887 888 if (!device_is_attached(dev)) 889 return (0); 890 891 urtw_stop(ifp, 1); 892 ieee80211_draintask(ic, &sc->sc_led_task); 893 894 usb_callout_drain(&sc->sc_led_ch); 895 callout_drain(&sc->sc_watchdog_ch); 896 897 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 898 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 899 ieee80211_ifdetach(ic); 900 901 urtw_free_tx_data_list(sc); 902 urtw_free_rx_data_list(sc); 903 904 if_free(ifp); 905 mtx_destroy(&sc->sc_mtx); 906 907 return (0); 908} 909 910static void 911urtw_free_tx_data_list(struct urtw_softc *sc) 912{ 913 914 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 915} 916 917static void 918urtw_free_rx_data_list(struct urtw_softc *sc) 919{ 920 921 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 922} 923 924static void 925urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 926 int fillmbuf) 927{ 928 int i; 929 930 for (i = 0; i < ndata; i++) { 931 struct urtw_data *dp = &data[i]; 932 933 if (fillmbuf == 1) { 934 if (dp->m != NULL) { 935 m_freem(dp->m); 936 dp->m = NULL; 937 dp->buf = NULL; 938 } 939 } else { 940 if (dp->buf != NULL) { 941 free(dp->buf, M_USBDEV); 942 dp->buf = NULL; 943 } 944 } 945 if (dp->ni != NULL) { 946 ieee80211_free_node(dp->ni); 947 dp->ni = NULL; 948 } 949 } 950} 951 952static struct ieee80211vap * 953urtw_vap_create(struct ieee80211com *ic, 954 const char name[IFNAMSIZ], int unit, int opmode, int flags, 955 const uint8_t bssid[IEEE80211_ADDR_LEN], 956 const uint8_t mac[IEEE80211_ADDR_LEN]) 957{ 958 struct urtw_vap *uvp; 959 struct ieee80211vap *vap; 960 961 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 962 return (NULL); 963 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 964 M_80211_VAP, M_NOWAIT | M_ZERO); 965 if (uvp == NULL) 966 return (NULL); 967 vap = &uvp->vap; 968 /* enable s/w bmiss handling for sta mode */ 969 ieee80211_vap_setup(ic, vap, name, unit, opmode, 970 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 971 972 /* override state transition machine */ 973 uvp->newstate = vap->iv_newstate; 974 vap->iv_newstate = urtw_newstate; 975 976 /* complete setup */ 977 ieee80211_vap_attach(vap, ieee80211_media_change, 978 ieee80211_media_status); 979 ic->ic_opmode = opmode; 980 return (vap); 981} 982 983static void 984urtw_vap_delete(struct ieee80211vap *vap) 985{ 986 struct urtw_vap *uvp = URTW_VAP(vap); 987 988 ieee80211_vap_detach(vap); 989 free(uvp, M_80211_VAP); 990} 991 992static void 993urtw_init_locked(void *arg) 994{ 995 int ret; 996 struct urtw_softc *sc = arg; 997 struct ifnet *ifp = sc->sc_ifp; 998 usb_error_t error; 999 1000 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1001 urtw_stop_locked(ifp, 0); 1002 1003 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1004 urtw_adapter_start(sc); 1005 if (error != 0) 1006 goto fail; 1007 1008 /* reset softc variables */ 1009 sc->sc_txtimer = 0; 1010 1011 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1012 ret = urtw_alloc_rx_data_list(sc); 1013 if (error != 0) 1014 goto fail; 1015 ret = urtw_alloc_tx_data_list(sc); 1016 if (error != 0) 1017 goto fail; 1018 sc->sc_flags |= URTW_INIT_ONCE; 1019 } 1020 1021 error = urtw_rx_enable(sc); 1022 if (error != 0) 1023 goto fail; 1024 error = urtw_tx_enable(sc); 1025 if (error != 0) 1026 goto fail; 1027 1028 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1029 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1030 1031 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1032fail: 1033 return; 1034} 1035 1036static void 1037urtw_init(void *arg) 1038{ 1039 struct urtw_softc *sc = arg; 1040 1041 URTW_LOCK(sc); 1042 urtw_init_locked(arg); 1043 URTW_UNLOCK(sc); 1044} 1045 1046static usb_error_t 1047urtw_adapter_start_b(struct urtw_softc *sc) 1048{ 1049 int i; 1050 uint8_t data8; 1051 usb_error_t error; 1052 1053 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1054 if (error) 1055 goto fail; 1056 1057 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1058 urtw_write8_m(sc, URTW_CONFIG3, 1059 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1060 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1061 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1062 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1063 1064 urtw_write8_m(sc, 0x61, 0x10); 1065 urtw_read8_m(sc, 0x62, &data8); 1066 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1067 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1068 1069 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1070 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1071 urtw_write8_m(sc, URTW_CONFIG3, data8); 1072 1073 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1074 if (error) 1075 goto fail; 1076 1077 error = urtw_8187b_cmd_reset(sc); 1078 if (error) 1079 goto fail; 1080 1081 urtw_write16_m(sc, 0x2d, 0xfff); 1082 urtw_read8_m(sc, URTW_CW_CONF, &data8); 1083 urtw_write8_m(sc, URTW_CW_CONF, data8 | URTW_CW_CONF_PERPACKET_RETRY); 1084 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 1085 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN | 1086 URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 1087 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 1088 1089 error = urtw_write16_i(sc, 0xe0, 0xfff, 1); 1090 if (error) 1091 goto fail; 1092 1093 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 1094 urtw_write8_m(sc, URTW_RATE_FALLBACK, data8 | URTW_RATE_FALLBACK_ENABLE); 1095 1096 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1097 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1098 error = urtw_write16_i(sc, 0xd4, 0xffff, 1); 1099 if (error) 1100 goto fail; 1101 1102 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1103 if (error) 1104 goto fail; 1105 urtw_read8_m(sc, URTW_CONFIG1, &data8); 1106 urtw_write8_m(sc, URTW_CONFIG1, (data8 & 0x3f) | 0x80); 1107 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1108 if (error) 1109 goto fail; 1110 1111 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1112 for (i = 0; i < nitems(urtw_8187b_reg_table); i++) { 1113 error = urtw_write8_i(sc, urtw_8187b_reg_table[i][0], 1114 urtw_8187b_reg_table[i][1], urtw_8187b_reg_table[i][2]); 1115 if (error) 1116 goto fail; 1117 } 1118 1119 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 1120 urtw_write16_m(sc, URTW_INT_MIG, 0); 1121 1122 error = urtw_write32_i(sc, 0xf0, 0, 1); 1123 if (error) 1124 goto fail; 1125 error = urtw_write32_i(sc, 0xf4, 0, 1); 1126 if (error) 1127 goto fail; 1128 error = urtw_write8_i(sc, 0xf8, 0, 1); 1129 if (error) 1130 goto fail; 1131 1132 urtw_write32_m(sc, URTW_RF_TIMING, 0x00004001); 1133 1134 error = urtw_write16_i(sc, 0x72, 0x569a, 2); 1135 if (error) 1136 goto fail; 1137 1138 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1139 if (error) 1140 goto fail; 1141 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1142 urtw_write8_m(sc, URTW_CONFIG3, data8 | URTW_CONFIG3_ANAPARAM_WRITE); 1143 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1144 if (error) 1145 goto fail; 1146 1147 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 1148 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 1149 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 1150 usb_pause_mtx(&sc->sc_mtx, 100); 1151 1152 error = sc->sc_rf_init(sc); 1153 if (error != 0) 1154 goto fail; 1155 1156 error = urtw_intr_enable(sc); 1157 if (error) 1158 goto fail; 1159 1160 error = urtw_write8e(sc, 0x41, 0xf4); 1161 if (error) 1162 goto fail; 1163 error = urtw_write8e(sc, 0x40, 0x00); 1164 if (error) 1165 goto fail; 1166 error = urtw_write8e(sc, 0x42, 0x00); 1167 if (error) 1168 goto fail; 1169 error = urtw_write8e(sc, 0x42, 0x01); 1170 if (error) 1171 goto fail; 1172 error = urtw_write8e(sc, 0x40, 0x0f); 1173 if (error) 1174 goto fail; 1175 error = urtw_write8e(sc, 0x42, 0x00); 1176 if (error) 1177 goto fail; 1178 error = urtw_write8e(sc, 0x42, 0x01); 1179 if (error) 1180 goto fail; 1181 1182 urtw_read8_m(sc, 0xdb, &data8); 1183 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1184 error = urtw_write16_i(sc, 0x72, 0x59fa, 3); 1185 if (error) 1186 goto fail; 1187 error = urtw_write16_i(sc, 0x74, 0x59d2, 3); 1188 if (error) 1189 goto fail; 1190 error = urtw_write16_i(sc, 0x76, 0x59d2, 3); 1191 if (error) 1192 goto fail; 1193 error = urtw_write16_i(sc, 0x78, 0x19fa, 3); 1194 if (error) 1195 goto fail; 1196 error = urtw_write16_i(sc, 0x7a, 0x19fa, 3); 1197 if (error) 1198 goto fail; 1199 error = urtw_write16_i(sc, 0x7c, 0x00d0, 3); 1200 if (error) 1201 goto fail; 1202 urtw_write8_m(sc, 0x61, 0); 1203 error = urtw_write8_i(sc, 0x80, 0x0f, 1); 1204 if (error) 1205 goto fail; 1206 error = urtw_write8_i(sc, 0x83, 0x03, 1); 1207 if (error) 1208 goto fail; 1209 urtw_write8_m(sc, 0xda, 0x10); 1210 error = urtw_write8_i(sc, 0x4d, 0x08, 2); 1211 if (error) 1212 goto fail; 1213 1214 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321B); 1215 1216 error = urtw_write16_i(sc, 0xec, 0x800, 1); 1217 if (error) 1218 goto fail; 1219 1220fail: 1221 return (error); 1222} 1223 1224static usb_error_t 1225urtw_adapter_start(struct urtw_softc *sc) 1226{ 1227 usb_error_t error; 1228 1229 error = urtw_reset(sc); 1230 if (error) 1231 goto fail; 1232 1233 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1234 urtw_write8_m(sc, URTW_GPIO, 0); 1235 1236 /* for led */ 1237 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1238 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1239 if (error != 0) 1240 goto fail; 1241 1242 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1243 if (error) 1244 goto fail; 1245 /* applying MAC address again. */ 1246 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1247 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1248 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1249 if (error) 1250 goto fail; 1251 1252 error = urtw_update_msr(sc); 1253 if (error) 1254 goto fail; 1255 1256 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1257 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1258 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1259 error = urtw_set_rate(sc); 1260 if (error != 0) 1261 goto fail; 1262 1263 error = sc->sc_rf_init(sc); 1264 if (error != 0) 1265 goto fail; 1266 if (sc->sc_rf_set_sens != NULL) 1267 sc->sc_rf_set_sens(sc, sc->sc_sens); 1268 1269 /* XXX correct? to call write16 */ 1270 urtw_write16_m(sc, URTW_PSR, 1); 1271 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1272 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1273 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1274 /* XXX correct? to call write16 */ 1275 urtw_write16_m(sc, URTW_PSR, 0); 1276 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1277 1278 error = urtw_intr_enable(sc); 1279 if (error != 0) 1280 goto fail; 1281 1282fail: 1283 return (error); 1284} 1285 1286 1287static usb_error_t 1288urtw_8187b_cmd_reset(struct urtw_softc *sc) 1289{ 1290 int i; 1291 uint8_t data8; 1292 usb_error_t error; 1293 1294 /* XXX the code can be duplicate with urtw_reset(). */ 1295 urtw_read8_m(sc, URTW_CMD, &data8); 1296 data8 = (data8 & 0x2) | URTW_CMD_RST; 1297 urtw_write8_m(sc, URTW_CMD, data8); 1298 1299 for (i = 0; i < 20; i++) { 1300 usb_pause_mtx(&sc->sc_mtx, 2); 1301 urtw_read8_m(sc, URTW_CMD, &data8); 1302 if (!(data8 & URTW_CMD_RST)) 1303 break; 1304 } 1305 if (i >= 20) { 1306 device_printf(sc->sc_dev, "reset timeout\n"); 1307 goto fail; 1308 } 1309 1310 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 1311 if (error) 1312 goto fail; 1313 1314 for (i = 0; i < 20; i++) { 1315 usb_pause_mtx(&sc->sc_mtx, 4); 1316 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 1317 if (!(data8 & URTW_EPROM_CMD_CONFIG)) 1318 break; 1319 } 1320 if (i >= 20) { 1321 device_printf(sc->sc_dev, "eeprom reset timeout\n"); 1322 goto fail; 1323 } 1324 1325fail: 1326 return (error); 1327} 1328 1329static usb_error_t 1330urtw_write16_i(struct urtw_softc *sc, int val, uint16_t data, int idx) 1331{ 1332 struct usb_device_request req; 1333 1334 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1335 req.bRequest = URTW_8187_SETREGS_REQ; 1336 USETW(req.wValue, val | 0xff00); 1337 USETW(req.wIndex, idx & 0x3); 1338 USETW(req.wLength, sizeof(uint16_t)); 1339 1340 return (urtw_do_request(sc, &req, &data)); 1341} 1342 1343static usb_error_t 1344urtw_do_request(struct urtw_softc *sc, 1345 struct usb_device_request *req, void *data) 1346{ 1347 usb_error_t err; 1348 int ntries = 10; 1349 1350 URTW_ASSERT_LOCKED(sc); 1351 1352 while (ntries--) { 1353 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1354 req, data, 0, NULL, 250 /* ms */); 1355 if (err == 0) 1356 break; 1357 1358 DPRINTF(sc, URTW_DEBUG_INIT, 1359 "Control request failed, %s (retrying)\n", 1360 usbd_errstr(err)); 1361 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1362 } 1363 return (err); 1364} 1365 1366static usb_error_t 1367urtw_write8_i(struct urtw_softc *sc, int val, uint8_t data, int idx) 1368{ 1369 struct usb_device_request req; 1370 1371 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1372 req.bRequest = URTW_8187_SETREGS_REQ; 1373 USETW(req.wValue, val | 0xff00); 1374 USETW(req.wIndex, idx & 0x3); 1375 USETW(req.wLength, sizeof(uint8_t)); 1376 1377 return (urtw_do_request(sc, &req, &data)); 1378} 1379 1380static usb_error_t 1381urtw_write32_i(struct urtw_softc *sc, int val, uint32_t data, int idx) 1382{ 1383 struct usb_device_request req; 1384 1385 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1386 req.bRequest = URTW_8187_SETREGS_REQ; 1387 USETW(req.wValue, val | 0xff00); 1388 USETW(req.wIndex, idx & 0x3); 1389 USETW(req.wLength, sizeof(uint32_t)); 1390 1391 return (urtw_do_request(sc, &req, &data)); 1392} 1393 1394static void 1395urtw_abort_xfers(struct urtw_softc *sc) 1396{ 1397 int i, max; 1398 1399 URTW_ASSERT_LOCKED(sc); 1400 1401 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1402 URTW_8187L_N_XFERS; 1403 1404 /* abort any pending transfers */ 1405 for (i = 0; i < max; i++) 1406 usbd_transfer_stop(sc->sc_xfer[i]); 1407} 1408 1409static int 1410urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1411{ 1412 struct urtw_softc *sc = ifp->if_softc; 1413 struct ieee80211com *ic = ifp->if_l2com; 1414 struct ifreq *ifr = (struct ifreq *) data; 1415 int error = 0, startall = 0; 1416 1417 switch (cmd) { 1418 case SIOCSIFFLAGS: 1419 if (ifp->if_flags & IFF_UP) { 1420 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1421 if ((ifp->if_flags ^ sc->sc_if_flags) & 1422 (IFF_ALLMULTI | IFF_PROMISC)) 1423 urtw_set_multi(sc); 1424 } else { 1425 urtw_init(ifp->if_softc); 1426 startall = 1; 1427 } 1428 } else { 1429 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1430 urtw_stop(ifp, 1); 1431 } 1432 sc->sc_if_flags = ifp->if_flags; 1433 if (startall) 1434 ieee80211_start_all(ic); 1435 break; 1436 case SIOCGIFMEDIA: 1437 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1438 break; 1439 case SIOCGIFADDR: 1440 error = ether_ioctl(ifp, cmd, data); 1441 break; 1442 default: 1443 error = EINVAL; 1444 break; 1445 } 1446 1447 return (error); 1448} 1449 1450static void 1451urtw_start(struct ifnet *ifp) 1452{ 1453 struct urtw_data *bf; 1454 struct urtw_softc *sc = ifp->if_softc; 1455 struct ieee80211_node *ni; 1456 struct mbuf *m; 1457 1458 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1459 return; 1460 1461 URTW_LOCK(sc); 1462 for (;;) { 1463 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1464 if (m == NULL) 1465 break; 1466 bf = urtw_getbuf(sc); 1467 if (bf == NULL) { 1468 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1469 break; 1470 } 1471 1472 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1473 m->m_pkthdr.rcvif = NULL; 1474 1475 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1476 ifp->if_oerrors++; 1477 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1478 ieee80211_free_node(ni); 1479 break; 1480 } 1481 1482 sc->sc_txtimer = 5; 1483 } 1484 URTW_UNLOCK(sc); 1485} 1486 1487static int 1488urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1489 int ndata, int maxsz, int fillmbuf) 1490{ 1491 int i, error; 1492 1493 for (i = 0; i < ndata; i++) { 1494 struct urtw_data *dp = &data[i]; 1495 1496 dp->sc = sc; 1497 if (fillmbuf) { 1498 dp->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1499 if (dp->m == NULL) { 1500 device_printf(sc->sc_dev, 1501 "could not allocate rx mbuf\n"); 1502 error = ENOMEM; 1503 goto fail; 1504 } 1505 dp->buf = mtod(dp->m, uint8_t *); 1506 } else { 1507 dp->m = NULL; 1508 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1509 if (dp->buf == NULL) { 1510 device_printf(sc->sc_dev, 1511 "could not allocate buffer\n"); 1512 error = ENOMEM; 1513 goto fail; 1514 } 1515 if (((unsigned long)dp->buf) % 4) 1516 device_printf(sc->sc_dev, 1517 "warn: unaligned buffer %p\n", dp->buf); 1518 } 1519 dp->ni = NULL; 1520 } 1521 1522 return 0; 1523 1524fail: urtw_free_data_list(sc, data, ndata, fillmbuf); 1525 return error; 1526} 1527 1528static int 1529urtw_alloc_rx_data_list(struct urtw_softc *sc) 1530{ 1531 int error, i; 1532 1533 error = urtw_alloc_data_list(sc, 1534 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, MCLBYTES, 1 /* mbufs */); 1535 if (error != 0) 1536 return (error); 1537 1538 STAILQ_INIT(&sc->sc_rx_active); 1539 STAILQ_INIT(&sc->sc_rx_inactive); 1540 1541 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1542 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1543 1544 return (0); 1545} 1546 1547static int 1548urtw_alloc_tx_data_list(struct urtw_softc *sc) 1549{ 1550 int error, i; 1551 1552 error = urtw_alloc_data_list(sc, 1553 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1554 0 /* no mbufs */); 1555 if (error != 0) 1556 return (error); 1557 1558 STAILQ_INIT(&sc->sc_tx_active); 1559 STAILQ_INIT(&sc->sc_tx_inactive); 1560 STAILQ_INIT(&sc->sc_tx_pending); 1561 1562 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1563 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1564 next); 1565 1566 return (0); 1567} 1568 1569static int 1570urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1571 const struct ieee80211_bpf_params *params) 1572{ 1573 struct ieee80211com *ic = ni->ni_ic; 1574 struct ifnet *ifp = ic->ic_ifp; 1575 struct urtw_data *bf; 1576 struct urtw_softc *sc = ifp->if_softc; 1577 1578 /* prevent management frames from being sent if we're not ready */ 1579 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1580 m_freem(m); 1581 ieee80211_free_node(ni); 1582 return ENETDOWN; 1583 } 1584 URTW_LOCK(sc); 1585 bf = urtw_getbuf(sc); 1586 if (bf == NULL) { 1587 ieee80211_free_node(ni); 1588 m_freem(m); 1589 URTW_UNLOCK(sc); 1590 return (ENOBUFS); /* XXX */ 1591 } 1592 1593 ifp->if_opackets++; 1594 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1595 ieee80211_free_node(ni); 1596 ifp->if_oerrors++; 1597 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1598 URTW_UNLOCK(sc); 1599 return (EIO); 1600 } 1601 URTW_UNLOCK(sc); 1602 1603 sc->sc_txtimer = 5; 1604 return (0); 1605} 1606 1607static void 1608urtw_scan_start(struct ieee80211com *ic) 1609{ 1610 1611 /* XXX do nothing? */ 1612} 1613 1614static void 1615urtw_scan_end(struct ieee80211com *ic) 1616{ 1617 1618 /* XXX do nothing? */ 1619} 1620 1621static void 1622urtw_set_channel(struct ieee80211com *ic) 1623{ 1624 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1625 struct ifnet *ifp = sc->sc_ifp; 1626 uint32_t data, orig; 1627 usb_error_t error; 1628 1629 /* 1630 * if the user set a channel explicitly using ifconfig(8) this function 1631 * can be called earlier than we're expected that in some cases the 1632 * initialization would be failed if setting a channel is called before 1633 * the init have done. 1634 */ 1635 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1636 return; 1637 1638 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1639 return; 1640 1641 URTW_LOCK(sc); 1642 1643 /* 1644 * during changing th channel we need to temporarily be disable 1645 * TX. 1646 */ 1647 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1648 data = orig & ~URTW_TX_LOOPBACK_MASK; 1649 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1650 1651 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1652 if (error != 0) 1653 goto fail; 1654 usb_pause_mtx(&sc->sc_mtx, 10); 1655 urtw_write32_m(sc, URTW_TX_CONF, orig); 1656 1657 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1658 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1659 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1660 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1661 1662fail: 1663 URTW_UNLOCK(sc); 1664 1665 sc->sc_curchan = ic->ic_curchan; 1666 1667 if (error != 0) 1668 device_printf(sc->sc_dev, "could not change the channel\n"); 1669} 1670 1671static void 1672urtw_update_mcast(struct ifnet *ifp) 1673{ 1674 1675 /* XXX do nothing? */ 1676} 1677 1678static int 1679urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1680 struct urtw_data *data, int prior) 1681{ 1682 int xferlen; 1683 struct ifnet *ifp = sc->sc_ifp; 1684 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1685 struct ieee80211_key *k; 1686 const struct ieee80211_txparam *tp; 1687 struct ieee80211com *ic = ifp->if_l2com; 1688 struct ieee80211vap *vap = ni->ni_vap; 1689 struct urtw_8187b_txhdr *hdr; 1690 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1691 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1692 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1693 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1694 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1695 }; 1696 struct usb_xfer *xfer; 1697 usb_error_t error; 1698 1699 URTW_ASSERT_LOCKED(sc); 1700 1701 /* 1702 * Software crypto. 1703 */ 1704 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1705 k = ieee80211_crypto_encap(ni, m0); 1706 if (k == NULL) { 1707 device_printf(sc->sc_dev, 1708 "ieee80211_crypto_encap returns NULL.\n"); 1709 /* XXX we don't expect the fragmented frames */ 1710 m_freem(m0); 1711 return (ENOBUFS); 1712 } 1713 1714 /* in case packet header moved, reset pointer */ 1715 wh = mtod(m0, struct ieee80211_frame *); 1716 } 1717 1718 if (ieee80211_radiotap_active_vap(vap)) { 1719 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1720 1721 /* XXX Are variables correct? */ 1722 tap->wt_flags = 0; 1723 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1724 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1725 1726 ieee80211_radiotap_tx(vap, m0); 1727 } 1728 1729 xferlen = m0->m_pkthdr.len; 1730 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1731 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1732 xferlen += 1; 1733 1734 bzero(data->buf, URTW_TX_MAXSIZE); 1735 data->buf[0] = m0->m_pkthdr.len & 0xff; 1736 data->buf[1] = (m0->m_pkthdr.len & 0x0f00) >> 8; 1737 data->buf[1] |= (1 << 7); 1738 1739 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1740 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1741 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1742 (sc->sc_currate != 0)) 1743 data->buf[2] |= 1; 1744 if ((m0->m_pkthdr.len > vap->iv_rtsthreshold) && 1745 prior == URTW_PRIORITY_LOW) { 1746 device_printf(sc->sc_dev, "TODO tx.\n"); 1747 return (EIO); 1748 } 1749 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1750 data->buf[2] |= (1 << 1); 1751 /* RTS rate - 10 means we use a basic rate. */ 1752 data->buf[2] |= (urtw_rate2rtl(2) << 3); 1753 /* 1754 * XXX currently TX rate control depends on the rate value of 1755 * RX descriptor because I don't know how to we can control TX rate 1756 * in more smart way. Please fix me you find a thing. 1757 */ 1758 data->buf[3] = sc->sc_currate; 1759 if (prior == URTW_PRIORITY_NORMAL) { 1760 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1761 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1762 data->buf[3] = urtw_rate2rtl(tp->mcastrate); 1763 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1764 data->buf[3] = urtw_rate2rtl(tp->ucastrate); 1765 } 1766 1767 if (sc->sc_flags & URTW_RTL8187B) { 1768 hdr = (struct urtw_8187b_txhdr *)data->buf; 1769 hdr->rts_duration = 0; 1770 hdr->len = 0; 1771 hdr->retry = 3 | (7 << 4) | 11; 1772 hdr->tx_duration = ieee80211_compute_duration(ic->ic_rt, 1773 m0->m_pkthdr.len + IEEE80211_CRC_LEN, 1774 urtw_rtl2rate(data->buf[3]), 1775 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0); 1776 /* XXX MUST fill another variables like rts_duration, tx_.. */ 1777 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[32]); 1778 } else { 1779 data->buf[8] = 3; /* CW minimum */ 1780 data->buf[8] |= (7 << 4); /* CW maximum */ 1781 data->buf[9] |= 11; /* retry limitation */ 1782 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[12]); 1783 } 1784 1785 data->buflen = xferlen; 1786 data->ni = ni; 1787 data->m = m0; 1788 1789 if (sc->sc_flags & URTW_RTL8187B) { 1790 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1791 case IEEE80211_FC0_TYPE_CTL: 1792 case IEEE80211_FC0_TYPE_MGT: 1793 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1794 break; 1795 default: 1796 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1797 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1798 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1799 break; 1800 } 1801 } else 1802 xfer = (prior == URTW_PRIORITY_LOW) ? 1803 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1804 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1805 1806 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1807 usbd_transfer_start(xfer); 1808 1809 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1810 if (error != 0) 1811 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1812 error); 1813 return (0); 1814} 1815 1816static int 1817urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1818{ 1819 struct ieee80211_node *ni = vap->iv_bss; 1820 struct ieee80211com *ic = vap->iv_ic; 1821 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1822 struct urtw_vap *uvp = URTW_VAP(vap); 1823 usb_error_t error = 0; 1824 1825 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1826 ieee80211_state_name[vap->iv_state], 1827 ieee80211_state_name[nstate]); 1828 1829 sc->sc_state = nstate; 1830 1831 IEEE80211_UNLOCK(ic); 1832 URTW_LOCK(sc); 1833 usb_callout_stop(&sc->sc_led_ch); 1834 callout_stop(&sc->sc_watchdog_ch); 1835 1836 switch (nstate) { 1837 case IEEE80211_S_INIT: 1838 case IEEE80211_S_SCAN: 1839 case IEEE80211_S_AUTH: 1840 case IEEE80211_S_ASSOC: 1841 break; 1842 case IEEE80211_S_RUN: 1843 /* setting bssid. */ 1844 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1845 urtw_write16_m(sc, URTW_BSSID + 4, 1846 ((uint16_t *)ni->ni_bssid)[2]); 1847 urtw_update_msr(sc); 1848 /* XXX maybe the below would be incorrect. */ 1849 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1850 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1851 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1852 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1853 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1854 if (error != 0) 1855 device_printf(sc->sc_dev, 1856 "could not control LED (%d)\n", error); 1857 break; 1858 default: 1859 break; 1860 } 1861fail: 1862 URTW_UNLOCK(sc); 1863 IEEE80211_LOCK(ic); 1864 return (uvp->newstate(vap, nstate, arg)); 1865} 1866 1867static void 1868urtw_watchdog(void *arg) 1869{ 1870 struct urtw_softc *sc = arg; 1871 struct ifnet *ifp = sc->sc_ifp; 1872 1873 if (sc->sc_txtimer > 0) { 1874 if (--sc->sc_txtimer == 0) { 1875 device_printf(sc->sc_dev, "device timeout\n"); 1876 ifp->if_oerrors++; 1877 return; 1878 } 1879 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1880 } 1881} 1882 1883static void 1884urtw_set_multi(void *arg) 1885{ 1886 struct urtw_softc *sc = arg; 1887 struct ifnet *ifp = sc->sc_ifp; 1888 1889 if (!(ifp->if_flags & IFF_UP)) 1890 return; 1891 1892 /* 1893 * XXX don't know how to set a device. Lack of docs. Just try to set 1894 * IFF_ALLMULTI flag here. 1895 */ 1896 ifp->if_flags |= IFF_ALLMULTI; 1897} 1898 1899 1900static usb_error_t 1901urtw_get_macaddr(struct urtw_softc *sc) 1902{ 1903 uint32_t data; 1904 usb_error_t error; 1905 1906 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 1907 if (error != 0) 1908 goto fail; 1909 sc->sc_bssid[0] = data & 0xff; 1910 sc->sc_bssid[1] = (data & 0xff00) >> 8; 1911 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 1912 if (error != 0) 1913 goto fail; 1914 sc->sc_bssid[2] = data & 0xff; 1915 sc->sc_bssid[3] = (data & 0xff00) >> 8; 1916 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 1917 if (error != 0) 1918 goto fail; 1919 sc->sc_bssid[4] = data & 0xff; 1920 sc->sc_bssid[5] = (data & 0xff00) >> 8; 1921fail: 1922 return (error); 1923} 1924 1925static usb_error_t 1926urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 1927{ 1928#define URTW_READCMD_LEN 3 1929 int addrlen, i; 1930 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 1931 usb_error_t error; 1932 1933 /* NB: make sure the buffer is initialized */ 1934 *data = 0; 1935 1936 /* enable EPROM programming */ 1937 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 1938 DELAY(URTW_EPROM_DELAY); 1939 1940 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 1941 if (error != 0) 1942 goto fail; 1943 error = urtw_eprom_ck(sc); 1944 if (error != 0) 1945 goto fail; 1946 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 1947 if (error != 0) 1948 goto fail; 1949 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 1950 addrlen = 8; 1951 addrstr[0] = addr & (1 << 7); 1952 addrstr[1] = addr & (1 << 6); 1953 addrstr[2] = addr & (1 << 5); 1954 addrstr[3] = addr & (1 << 4); 1955 addrstr[4] = addr & (1 << 3); 1956 addrstr[5] = addr & (1 << 2); 1957 addrstr[6] = addr & (1 << 1); 1958 addrstr[7] = addr & (1 << 0); 1959 } else { 1960 addrlen=6; 1961 addrstr[0] = addr & (1 << 5); 1962 addrstr[1] = addr & (1 << 4); 1963 addrstr[2] = addr & (1 << 3); 1964 addrstr[3] = addr & (1 << 2); 1965 addrstr[4] = addr & (1 << 1); 1966 addrstr[5] = addr & (1 << 0); 1967 } 1968 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 1969 if (error != 0) 1970 goto fail; 1971 1972 error = urtw_eprom_writebit(sc, 0); 1973 if (error != 0) 1974 goto fail; 1975 1976 for (i = 0; i < 16; i++) { 1977 error = urtw_eprom_ck(sc); 1978 if (error != 0) 1979 goto fail; 1980 error = urtw_eprom_readbit(sc, &data16); 1981 if (error != 0) 1982 goto fail; 1983 1984 (*data) |= (data16 << (15 - i)); 1985 } 1986 1987 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 1988 if (error != 0) 1989 goto fail; 1990 error = urtw_eprom_ck(sc); 1991 if (error != 0) 1992 goto fail; 1993 1994 /* now disable EPROM programming */ 1995 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 1996fail: 1997 return (error); 1998#undef URTW_READCMD_LEN 1999} 2000 2001static usb_error_t 2002urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2003{ 2004 uint8_t data8; 2005 usb_error_t error; 2006 2007 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2008 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2009 DELAY(URTW_EPROM_DELAY); 2010 2011fail: 2012 return (error); 2013} 2014 2015static usb_error_t 2016urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2017{ 2018 int i = 0; 2019 usb_error_t error = 0; 2020 2021 for (i = 0; i < buflen; i++) { 2022 error = urtw_eprom_writebit(sc, buf[i]); 2023 if (error != 0) 2024 goto fail; 2025 error = urtw_eprom_ck(sc); 2026 if (error != 0) 2027 goto fail; 2028 } 2029fail: 2030 return (error); 2031} 2032 2033static usb_error_t 2034urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2035{ 2036 uint8_t data; 2037 usb_error_t error; 2038 2039 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2040 if (bit != 0) 2041 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2042 else 2043 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2044 DELAY(URTW_EPROM_DELAY); 2045fail: 2046 return (error); 2047} 2048 2049static usb_error_t 2050urtw_eprom_ck(struct urtw_softc *sc) 2051{ 2052 uint8_t data; 2053 usb_error_t error; 2054 2055 /* masking */ 2056 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2057 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2058 DELAY(URTW_EPROM_DELAY); 2059 /* unmasking */ 2060 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2061 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2062 DELAY(URTW_EPROM_DELAY); 2063fail: 2064 return (error); 2065} 2066 2067 2068static usb_error_t 2069urtw_eprom_cs(struct urtw_softc *sc, int able) 2070{ 2071 uint8_t data; 2072 usb_error_t error; 2073 2074 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2075 if (able == URTW_EPROM_ENABLE) 2076 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2077 else 2078 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2079 DELAY(URTW_EPROM_DELAY); 2080fail: 2081 return (error); 2082} 2083 2084 2085 2086static usb_error_t 2087urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2088{ 2089 struct usb_device_request req; 2090 usb_error_t error; 2091 2092 URTW_ASSERT_LOCKED(sc); 2093 2094 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2095 req.bRequest = URTW_8187_GETREGS_REQ; 2096 USETW(req.wValue, val | 0xff00); 2097 USETW(req.wIndex, 0); 2098 USETW(req.wLength, sizeof(uint8_t)); 2099 2100 error = urtw_do_request(sc, &req, data); 2101 return (error); 2102} 2103 2104static usb_error_t 2105urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 2106{ 2107 struct usb_device_request req; 2108 usb_error_t error; 2109 2110 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2111 req.bRequest = URTW_8187_GETREGS_REQ; 2112 USETW(req.wValue, val | 0xfe00); 2113 USETW(req.wIndex, 0); 2114 USETW(req.wLength, sizeof(uint8_t)); 2115 2116 error = urtw_do_request(sc, &req, data); 2117 return (error); 2118} 2119 2120static usb_error_t 2121urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2122{ 2123 struct usb_device_request req; 2124 usb_error_t error; 2125 2126 URTW_ASSERT_LOCKED(sc); 2127 2128 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2129 req.bRequest = URTW_8187_GETREGS_REQ; 2130 USETW(req.wValue, val | 0xff00); 2131 USETW(req.wIndex, 0); 2132 USETW(req.wLength, sizeof(uint16_t)); 2133 2134 error = urtw_do_request(sc, &req, data); 2135 return (error); 2136} 2137 2138static usb_error_t 2139urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2140{ 2141 struct usb_device_request req; 2142 usb_error_t error; 2143 2144 URTW_ASSERT_LOCKED(sc); 2145 2146 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2147 req.bRequest = URTW_8187_GETREGS_REQ; 2148 USETW(req.wValue, val | 0xff00); 2149 USETW(req.wIndex, 0); 2150 USETW(req.wLength, sizeof(uint32_t)); 2151 2152 error = urtw_do_request(sc, &req, data); 2153 return (error); 2154} 2155 2156static usb_error_t 2157urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2158{ 2159 struct usb_device_request req; 2160 2161 URTW_ASSERT_LOCKED(sc); 2162 2163 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2164 req.bRequest = URTW_8187_SETREGS_REQ; 2165 USETW(req.wValue, val | 0xff00); 2166 USETW(req.wIndex, 0); 2167 USETW(req.wLength, sizeof(uint8_t)); 2168 2169 return (urtw_do_request(sc, &req, &data)); 2170} 2171 2172static usb_error_t 2173urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 2174{ 2175 struct usb_device_request req; 2176 2177 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2178 req.bRequest = URTW_8187_SETREGS_REQ; 2179 USETW(req.wValue, val | 0xfe00); 2180 USETW(req.wIndex, 0); 2181 USETW(req.wLength, sizeof(uint8_t)); 2182 2183 return (urtw_do_request(sc, &req, &data)); 2184} 2185 2186static usb_error_t 2187urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2188{ 2189 struct usb_device_request req; 2190 2191 URTW_ASSERT_LOCKED(sc); 2192 2193 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2194 req.bRequest = URTW_8187_SETREGS_REQ; 2195 USETW(req.wValue, val | 0xff00); 2196 USETW(req.wIndex, 0); 2197 USETW(req.wLength, sizeof(uint16_t)); 2198 2199 return (urtw_do_request(sc, &req, &data)); 2200} 2201 2202static usb_error_t 2203urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2204{ 2205 struct usb_device_request req; 2206 2207 URTW_ASSERT_LOCKED(sc); 2208 2209 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2210 req.bRequest = URTW_8187_SETREGS_REQ; 2211 USETW(req.wValue, val | 0xff00); 2212 USETW(req.wIndex, 0); 2213 USETW(req.wLength, sizeof(uint32_t)); 2214 2215 return (urtw_do_request(sc, &req, &data)); 2216} 2217 2218static usb_error_t 2219urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 2220{ 2221 uint8_t data; 2222 usb_error_t error; 2223 2224 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2225 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 2226 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 2227 urtw_write8_m(sc, URTW_EPROM_CMD, data); 2228fail: 2229 return (error); 2230} 2231 2232static usb_error_t 2233urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 2234{ 2235 uint8_t data; 2236 usb_error_t error; 2237 2238 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2239 if (error) 2240 goto fail; 2241 2242 urtw_read8_m(sc, URTW_CONFIG3, &data); 2243 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2244 urtw_write32_m(sc, URTW_ANAPARAM, val); 2245 urtw_read8_m(sc, URTW_CONFIG3, &data); 2246 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2247 2248 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2249 if (error) 2250 goto fail; 2251fail: 2252 return (error); 2253} 2254 2255static usb_error_t 2256urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 2257{ 2258 uint8_t data; 2259 usb_error_t error; 2260 2261 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2262 if (error) 2263 goto fail; 2264 2265 urtw_read8_m(sc, URTW_CONFIG3, &data); 2266 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2267 urtw_write32_m(sc, URTW_ANAPARAM2, val); 2268 urtw_read8_m(sc, URTW_CONFIG3, &data); 2269 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2270 2271 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2272 if (error) 2273 goto fail; 2274fail: 2275 return (error); 2276} 2277 2278 2279static usb_error_t 2280urtw_intr_disable(struct urtw_softc *sc) 2281{ 2282 usb_error_t error; 2283 2284 urtw_write16_m(sc, URTW_INTR_MASK, 0); 2285fail: 2286 return (error); 2287} 2288 2289static usb_error_t 2290urtw_reset(struct urtw_softc *sc) 2291{ 2292 uint8_t data; 2293 usb_error_t error; 2294 2295 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2296 if (error) 2297 goto fail; 2298 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2299 if (error) 2300 goto fail; 2301 2302 error = urtw_intr_disable(sc); 2303 if (error) 2304 goto fail; 2305 usb_pause_mtx(&sc->sc_mtx, 100); 2306 2307 error = urtw_write8e(sc, 0x18, 0x10); 2308 if (error != 0) 2309 goto fail; 2310 error = urtw_write8e(sc, 0x18, 0x11); 2311 if (error != 0) 2312 goto fail; 2313 error = urtw_write8e(sc, 0x18, 0x00); 2314 if (error != 0) 2315 goto fail; 2316 usb_pause_mtx(&sc->sc_mtx, 100); 2317 2318 urtw_read8_m(sc, URTW_CMD, &data); 2319 data = (data & 0x2) | URTW_CMD_RST; 2320 urtw_write8_m(sc, URTW_CMD, data); 2321 usb_pause_mtx(&sc->sc_mtx, 100); 2322 2323 urtw_read8_m(sc, URTW_CMD, &data); 2324 if (data & URTW_CMD_RST) { 2325 device_printf(sc->sc_dev, "reset timeout\n"); 2326 goto fail; 2327 } 2328 2329 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 2330 if (error) 2331 goto fail; 2332 usb_pause_mtx(&sc->sc_mtx, 100); 2333 2334 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2335 if (error) 2336 goto fail; 2337 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2338 if (error) 2339 goto fail; 2340fail: 2341 return (error); 2342} 2343 2344static usb_error_t 2345urtw_led_on(struct urtw_softc *sc, int type) 2346{ 2347 usb_error_t error; 2348 2349 if (type == URTW_LED_GPIO) { 2350 switch (sc->sc_gpio_ledpin) { 2351 case URTW_LED_PIN_GPIO0: 2352 urtw_write8_m(sc, URTW_GPIO, 0x01); 2353 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 2354 break; 2355 default: 2356 panic("unsupported LED PIN type 0x%x", 2357 sc->sc_gpio_ledpin); 2358 /* never reach */ 2359 } 2360 } else { 2361 panic("unsupported LED type 0x%x", type); 2362 /* never reach */ 2363 } 2364 2365 sc->sc_gpio_ledon = 1; 2366fail: 2367 return (error); 2368} 2369 2370static usb_error_t 2371urtw_led_off(struct urtw_softc *sc, int type) 2372{ 2373 usb_error_t error; 2374 2375 if (type == URTW_LED_GPIO) { 2376 switch (sc->sc_gpio_ledpin) { 2377 case URTW_LED_PIN_GPIO0: 2378 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 2379 urtw_write8_m(sc, 2380 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 2381 break; 2382 default: 2383 panic("unsupported LED PIN type 0x%x", 2384 sc->sc_gpio_ledpin); 2385 /* never reach */ 2386 } 2387 } else { 2388 panic("unsupported LED type 0x%x", type); 2389 /* never reach */ 2390 } 2391 2392 sc->sc_gpio_ledon = 0; 2393 2394fail: 2395 return (error); 2396} 2397 2398 2399static usb_error_t 2400urtw_led_mode0(struct urtw_softc *sc, int mode) 2401{ 2402 2403 switch (mode) { 2404 case URTW_LED_CTL_POWER_ON: 2405 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 2406 break; 2407 case URTW_LED_CTL_TX: 2408 if (sc->sc_gpio_ledinprogress == 1) 2409 return (0); 2410 2411 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 2412 sc->sc_gpio_blinktime = 2; 2413 break; 2414 case URTW_LED_CTL_LINK: 2415 sc->sc_gpio_ledstate = URTW_LED_ON; 2416 break; 2417 default: 2418 panic("unsupported LED mode 0x%x", mode); 2419 /* never reach */ 2420 } 2421 2422 switch (sc->sc_gpio_ledstate) { 2423 case URTW_LED_ON: 2424 if (sc->sc_gpio_ledinprogress != 0) 2425 break; 2426 urtw_led_on(sc, URTW_LED_GPIO); 2427 break; 2428 case URTW_LED_BLINK_NORMAL: 2429 if (sc->sc_gpio_ledinprogress != 0) 2430 break; 2431 sc->sc_gpio_ledinprogress = 1; 2432 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 2433 URTW_LED_OFF : URTW_LED_ON; 2434 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 2435 break; 2436 case URTW_LED_POWER_ON_BLINK: 2437 urtw_led_on(sc, URTW_LED_GPIO); 2438 usb_pause_mtx(&sc->sc_mtx, 100); 2439 urtw_led_off(sc, URTW_LED_GPIO); 2440 break; 2441 default: 2442 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 2443 /* never reach */ 2444 } 2445 return (0); 2446} 2447 2448static usb_error_t 2449urtw_led_mode1(struct urtw_softc *sc, int mode) 2450{ 2451 2452 return (USB_ERR_INVAL); 2453} 2454 2455static usb_error_t 2456urtw_led_mode2(struct urtw_softc *sc, int mode) 2457{ 2458 2459 return (USB_ERR_INVAL); 2460} 2461 2462static usb_error_t 2463urtw_led_mode3(struct urtw_softc *sc, int mode) 2464{ 2465 2466 return (USB_ERR_INVAL); 2467} 2468 2469static void 2470urtw_ledtask(void *arg, int pending) 2471{ 2472 struct urtw_softc *sc = arg; 2473 2474 if (sc->sc_strategy != URTW_SW_LED_MODE0) 2475 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 2476 2477 URTW_LOCK(sc); 2478 urtw_led_blink(sc); 2479 URTW_UNLOCK(sc); 2480} 2481 2482static usb_error_t 2483urtw_led_ctl(struct urtw_softc *sc, int mode) 2484{ 2485 usb_error_t error = 0; 2486 2487 switch (sc->sc_strategy) { 2488 case URTW_SW_LED_MODE0: 2489 error = urtw_led_mode0(sc, mode); 2490 break; 2491 case URTW_SW_LED_MODE1: 2492 error = urtw_led_mode1(sc, mode); 2493 break; 2494 case URTW_SW_LED_MODE2: 2495 error = urtw_led_mode2(sc, mode); 2496 break; 2497 case URTW_SW_LED_MODE3: 2498 error = urtw_led_mode3(sc, mode); 2499 break; 2500 default: 2501 panic("unsupported LED mode %d\n", sc->sc_strategy); 2502 /* never reach */ 2503 } 2504 2505 return (error); 2506} 2507 2508static usb_error_t 2509urtw_led_blink(struct urtw_softc *sc) 2510{ 2511 uint8_t ing = 0; 2512 usb_error_t error; 2513 2514 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 2515 error = urtw_led_on(sc, URTW_LED_GPIO); 2516 else 2517 error = urtw_led_off(sc, URTW_LED_GPIO); 2518 sc->sc_gpio_blinktime--; 2519 if (sc->sc_gpio_blinktime == 0) 2520 ing = 1; 2521 else { 2522 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 2523 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 2524 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 2525 ing = 1; 2526 } 2527 if (ing == 1) { 2528 if (sc->sc_gpio_ledstate == URTW_LED_ON && 2529 sc->sc_gpio_ledon == 0) 2530 error = urtw_led_on(sc, URTW_LED_GPIO); 2531 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 2532 sc->sc_gpio_ledon == 1) 2533 error = urtw_led_off(sc, URTW_LED_GPIO); 2534 2535 sc->sc_gpio_blinktime = 0; 2536 sc->sc_gpio_ledinprogress = 0; 2537 return (0); 2538 } 2539 2540 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 2541 URTW_LED_ON : URTW_LED_OFF; 2542 2543 switch (sc->sc_gpio_ledstate) { 2544 case URTW_LED_BLINK_NORMAL: 2545 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 2546 break; 2547 default: 2548 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 2549 /* never reach */ 2550 } 2551 return (0); 2552} 2553 2554static usb_error_t 2555urtw_update_msr(struct urtw_softc *sc) 2556{ 2557 struct ifnet *ifp = sc->sc_ifp; 2558 struct ieee80211com *ic = ifp->if_l2com; 2559 uint8_t data; 2560 usb_error_t error; 2561 2562 urtw_read8_m(sc, URTW_MSR, &data); 2563 data &= ~URTW_MSR_LINK_MASK; 2564 2565 if (sc->sc_state == IEEE80211_S_RUN) { 2566 switch (ic->ic_opmode) { 2567 case IEEE80211_M_STA: 2568 case IEEE80211_M_MONITOR: 2569 data |= URTW_MSR_LINK_STA; 2570 if (sc->sc_flags & URTW_RTL8187B) 2571 data |= URTW_MSR_LINK_ENEDCA; 2572 break; 2573 case IEEE80211_M_IBSS: 2574 data |= URTW_MSR_LINK_ADHOC; 2575 break; 2576 case IEEE80211_M_HOSTAP: 2577 data |= URTW_MSR_LINK_HOSTAP; 2578 break; 2579 default: 2580 panic("unsupported operation mode 0x%x\n", 2581 ic->ic_opmode); 2582 /* never reach */ 2583 } 2584 } else 2585 data |= URTW_MSR_LINK_NONE; 2586 2587 urtw_write8_m(sc, URTW_MSR, data); 2588fail: 2589 return (error); 2590} 2591 2592static uint16_t 2593urtw_rate2rtl(int rate) 2594{ 2595 int i; 2596 2597 for (i = 0; i < nitems(urtw_ratetable); i++) { 2598 if (rate == urtw_ratetable[i].reg) 2599 return urtw_ratetable[i].val; 2600 } 2601 2602 return (3); 2603} 2604 2605static uint16_t 2606urtw_rtl2rate(int rate) 2607{ 2608 int i; 2609 2610 for (i = 0; i < nitems(urtw_ratetable); i++) { 2611 if (rate == urtw_ratetable[i].val) 2612 return urtw_ratetable[i].reg; 2613 } 2614 2615 return (0); 2616} 2617 2618static usb_error_t 2619urtw_set_rate(struct urtw_softc *sc) 2620{ 2621 int i, basic_rate, min_rr_rate, max_rr_rate; 2622 uint16_t data; 2623 usb_error_t error; 2624 2625 basic_rate = urtw_rate2rtl(48); 2626 min_rr_rate = urtw_rate2rtl(12); 2627 max_rr_rate = urtw_rate2rtl(48); 2628 2629 urtw_write8_m(sc, URTW_RESP_RATE, 2630 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 2631 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 2632 2633 urtw_read16_m(sc, URTW_BRSR, &data); 2634 data &= ~URTW_BRSR_MBR_8185; 2635 2636 for (i = 0; i <= basic_rate; i++) 2637 data |= (1 << i); 2638 2639 urtw_write16_m(sc, URTW_BRSR, data); 2640fail: 2641 return (error); 2642} 2643 2644static usb_error_t 2645urtw_intr_enable(struct urtw_softc *sc) 2646{ 2647 usb_error_t error; 2648 2649 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 2650fail: 2651 return (error); 2652} 2653 2654static usb_error_t 2655urtw_rx_setconf(struct urtw_softc *sc) 2656{ 2657 struct ifnet *ifp = sc->sc_ifp; 2658 struct ieee80211com *ic = ifp->if_l2com; 2659 uint32_t data; 2660 usb_error_t error; 2661 2662 urtw_read32_m(sc, URTW_RX, &data); 2663 data = data &~ URTW_RX_FILTER_MASK; 2664 if (sc->sc_flags & URTW_RTL8187B) { 2665 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 2666 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 2667 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 2668 URTW_RX_FIFO_THRESHOLD_NONE | 2669 URTW_MAX_RX_DMA_2048 | 2670 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 2671 } else { 2672 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 2673 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 2674 2675 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 2676 data = data | URTW_RX_FILTER_ICVERR; 2677 data = data | URTW_RX_FILTER_PWR; 2678 } 2679 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 2680 data = data | URTW_RX_FILTER_CRCERR; 2681 2682 if (ic->ic_opmode == IEEE80211_M_MONITOR || 2683 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 2684 data = data | URTW_RX_FILTER_ALLMAC; 2685 } else { 2686 data = data | URTW_RX_FILTER_NICMAC; 2687 data = data | URTW_RX_CHECK_BSSID; 2688 } 2689 2690 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 2691 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 2692 URTW_RX_AUTORESETPHY; 2693 data = data &~ URTW_MAX_RX_DMA_MASK; 2694 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 2695 } 2696 2697 urtw_write32_m(sc, URTW_RX, data); 2698fail: 2699 return (error); 2700} 2701 2702 2703static usb_error_t 2704urtw_rx_enable(struct urtw_softc *sc) 2705{ 2706 uint8_t data; 2707 usb_error_t error; 2708 2709 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 2710 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 2711 2712 error = urtw_rx_setconf(sc); 2713 if (error != 0) 2714 goto fail; 2715 2716 urtw_read8_m(sc, URTW_CMD, &data); 2717 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 2718fail: 2719 return (error); 2720} 2721 2722static usb_error_t 2723urtw_tx_enable(struct urtw_softc *sc) 2724{ 2725 uint8_t data8; 2726 uint32_t data; 2727 usb_error_t error; 2728 2729 if (sc->sc_flags & URTW_RTL8187B) { 2730 urtw_read32_m(sc, URTW_TX_CONF, &data); 2731 data &= ~URTW_TX_LOOPBACK_MASK; 2732 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 2733 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 2734 data &= ~URTW_TX_SWPLCPLEN; 2735 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 2736 (7 << 8) | /* short retry limit */ 2737 (7 << 0) | /* long retry limit */ 2738 (7 << 21); /* MAX TX DMA */ 2739 urtw_write32_m(sc, URTW_TX_CONF, data); 2740 2741 urtw_read8_m(sc, URTW_CMD, &data8); 2742 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 2743 return (error); 2744 } 2745 2746 urtw_read8_m(sc, URTW_CW_CONF, &data8); 2747 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 2748 urtw_write8_m(sc, URTW_CW_CONF, data8); 2749 2750 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 2751 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 2752 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 2753 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 2754 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 2755 2756 urtw_read32_m(sc, URTW_TX_CONF, &data); 2757 data &= ~URTW_TX_LOOPBACK_MASK; 2758 data |= URTW_TX_LOOPBACK_NONE; 2759 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 2760 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 2761 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 2762 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 2763 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 2764 data &= ~URTW_TX_SWPLCPLEN; 2765 data |= URTW_TX_NOICV; 2766 urtw_write32_m(sc, URTW_TX_CONF, data); 2767 2768 urtw_read8_m(sc, URTW_CMD, &data8); 2769 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 2770fail: 2771 return (error); 2772} 2773 2774 2775static usb_error_t 2776urtw_get_txpwr(struct urtw_softc *sc) 2777{ 2778 int i, j; 2779 uint32_t data; 2780 usb_error_t error; 2781 2782 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2783 if (error != 0) 2784 goto fail; 2785 sc->sc_txpwr_cck_base = data & 0xf; 2786 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2787 2788 for (i = 1, j = 0; i < 6; i += 2, j++) { 2789 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2790 if (error != 0) 2791 goto fail; 2792 sc->sc_txpwr_cck[i] = data & 0xf; 2793 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2794 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2795 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2796 } 2797 for (i = 1, j = 0; i < 4; i += 2, j++) { 2798 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2799 if (error != 0) 2800 goto fail; 2801 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2802 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2803 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2804 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2805 } 2806 if (sc->sc_flags & URTW_RTL8187B) { 2807 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2808 if (error != 0) 2809 goto fail; 2810 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2811 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2812 error = urtw_eprom_read32(sc, 0x0a, &data); 2813 if (error != 0) 2814 goto fail; 2815 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2816 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2817 error = urtw_eprom_read32(sc, 0x1c, &data); 2818 if (error != 0) 2819 goto fail; 2820 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2821 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2822 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2823 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2824 } else { 2825 for (i = 1, j = 0; i < 4; i += 2, j++) { 2826 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2827 &data); 2828 if (error != 0) 2829 goto fail; 2830 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2831 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2832 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2833 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2834 } 2835 } 2836fail: 2837 return (error); 2838} 2839 2840 2841static usb_error_t 2842urtw_get_rfchip(struct urtw_softc *sc) 2843{ 2844 int ret; 2845 uint8_t data8; 2846 uint32_t data; 2847 usb_error_t error; 2848 2849 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2850 if (error != 0) 2851 goto fail; 2852 switch (data & 0xff) { 2853 case URTW_EPROM_RFCHIPID_RTL8225U: 2854 error = urtw_8225_isv2(sc, &ret); 2855 if (error != 0) 2856 goto fail; 2857 if (ret == 0) { 2858 sc->sc_rf_init = urtw_8225_rf_init; 2859 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2860 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2861 sc->sc_rf_stop = urtw_8225_rf_stop; 2862 } else { 2863 sc->sc_rf_init = urtw_8225v2_rf_init; 2864 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2865 sc->sc_rf_stop = urtw_8225_rf_stop; 2866 } 2867 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2868 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2869 break; 2870 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2871 sc->sc_rf_init = urtw_8225v2b_rf_init; 2872 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2873 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2874 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2875 sc->sc_rf_stop = urtw_8225_rf_stop; 2876 break; 2877 default: 2878 panic("unsupported RF chip %d\n", data & 0xff); 2879 /* never reach */ 2880 } 2881 2882 if (sc->sc_flags & URTW_RTL8187B) { 2883 urtw_read8_m(sc, 0xe1, &data8); 2884 sc->sc_flags |= (data8 == 0) ? URTW_RTL8187B_REV_B : 2885 (data8 == 1) ? URTW_RTL8187B_REV_D : URTW_RTL8187B_REV_E; 2886 } 2887 2888 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2889 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2890 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2891 "rtl8225z2", 2892 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2893 (data8 == 1) ? "d" : "e") : "none"); 2894 2895fail: 2896 return (error); 2897} 2898 2899 2900static usb_error_t 2901urtw_led_init(struct urtw_softc *sc) 2902{ 2903 uint32_t rev; 2904 usb_error_t error; 2905 2906 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2907 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2908 if (error != 0) 2909 goto fail; 2910 2911 switch (rev & URTW_EPROM_CID_MASK) { 2912 case URTW_EPROM_CID_ALPHA0: 2913 sc->sc_strategy = URTW_SW_LED_MODE1; 2914 break; 2915 case URTW_EPROM_CID_SERCOMM_PS: 2916 sc->sc_strategy = URTW_SW_LED_MODE3; 2917 break; 2918 case URTW_EPROM_CID_HW_LED: 2919 sc->sc_strategy = URTW_HW_LED; 2920 break; 2921 case URTW_EPROM_CID_RSVD0: 2922 case URTW_EPROM_CID_RSVD1: 2923 default: 2924 sc->sc_strategy = URTW_SW_LED_MODE0; 2925 break; 2926 } 2927 2928 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2929 2930fail: 2931 return (error); 2932} 2933 2934static usb_error_t 2935urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2936{ 2937 usb_error_t error = 0; 2938 2939 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2940fail: 2941 return (error); 2942} 2943 2944static usb_error_t 2945urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2946{ 2947 usb_error_t error; 2948 2949 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2950 usb_pause_mtx(&sc->sc_mtx, 1); 2951fail: 2952 return (error); 2953} 2954 2955static usb_error_t 2956urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2957{ 2958 2959 data = data & 0xff; 2960 return urtw_8187_write_phy(sc, addr, data); 2961} 2962 2963static usb_error_t 2964urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2965{ 2966 2967 data = data & 0xff; 2968 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2969} 2970 2971static usb_error_t 2972urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2973{ 2974 uint32_t phyw; 2975 usb_error_t error; 2976 2977 phyw = ((data << 8) | (addr | 0x80)); 2978 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2979 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2980 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2981 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2982 usb_pause_mtx(&sc->sc_mtx, 1); 2983fail: 2984 return (error); 2985} 2986 2987static usb_error_t 2988urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2989{ 2990 usb_error_t error; 2991 2992 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2993 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2994 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2995 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2996fail: 2997 return (error); 2998} 2999 3000static usb_error_t 3001urtw_8225_usb_init(struct urtw_softc *sc) 3002{ 3003 uint8_t data; 3004 usb_error_t error; 3005 3006 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 3007 urtw_write8_m(sc, URTW_GPIO, 0); 3008 error = urtw_read8e(sc, 0x53, &data); 3009 if (error) 3010 goto fail; 3011 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 3012 if (error) 3013 goto fail; 3014 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 3015 urtw_write8_m(sc, URTW_GPIO, 0x20); 3016 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 3017 3018 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 3019 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 3020 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 3021 3022 usb_pause_mtx(&sc->sc_mtx, 500); 3023fail: 3024 return (error); 3025} 3026 3027static usb_error_t 3028urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 3029{ 3030 uint16_t d80, d82, d84; 3031 usb_error_t error; 3032 3033 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 3034 d80 &= URTW_RF_PINS_MAGIC1; 3035 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 3036 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 3037 d84 &= URTW_RF_PINS_MAGIC2; 3038 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 3039 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 3040 DELAY(10); 3041 3042 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 3043 DELAY(2); 3044 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 3045 DELAY(10); 3046 3047 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 3048 if (error != 0) 3049 goto fail; 3050 3051 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 3052 DELAY(10); 3053 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 3054 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 3055 usb_pause_mtx(&sc->sc_mtx, 2); 3056fail: 3057 return (error); 3058} 3059 3060/* XXX why we should allocalte memory buffer instead of using memory stack? */ 3061static usb_error_t 3062urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 3063 uint16_t *data) 3064{ 3065 uint8_t *buf; 3066 uint16_t data16; 3067 struct usb_device_request *req; 3068 usb_error_t error = 0; 3069 3070 data16 = *data; 3071 req = (usb_device_request_t *)malloc(sizeof(usb_device_request_t), 3072 M_80211_VAP, M_NOWAIT | M_ZERO); 3073 if (req == NULL) { 3074 device_printf(sc->sc_dev, "could not allocate a memory\n"); 3075 goto fail0; 3076 } 3077 buf = (uint8_t *)malloc(2, M_80211_VAP, M_NOWAIT | M_ZERO); 3078 if (req == NULL) { 3079 device_printf(sc->sc_dev, "could not allocate a memory\n"); 3080 goto fail1; 3081 } 3082 3083 req->bmRequestType = UT_WRITE_VENDOR_DEVICE; 3084 req->bRequest = URTW_8187_SETREGS_REQ; 3085 USETW(req->wValue, addr); 3086 USETW(req->wIndex, index); 3087 USETW(req->wLength, sizeof(uint16_t)); 3088 buf[0] = (data16 & 0x00ff); 3089 buf[1] = (data16 & 0xff00) >> 8; 3090 3091 error = urtw_do_request(sc, req, buf); 3092 3093 free(buf, M_80211_VAP); 3094fail1: free(req, M_80211_VAP); 3095fail0: return (error); 3096} 3097 3098 3099static usb_error_t 3100urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 3101{ 3102 int i, idx, set; 3103 uint8_t *cck_pwltable; 3104 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 3105 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3106 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3107 usb_error_t error; 3108 3109 cck_pwrlvl_max = 11; 3110 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 3111 ofdm_pwrlvl_min = 10; 3112 3113 /* CCK power setting */ 3114 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3115 idx = cck_pwrlvl % 6; 3116 set = cck_pwrlvl / 6; 3117 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 3118 urtw_8225_txpwr_cck; 3119 3120 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3121 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 3122 for (i = 0; i < 8; i++) { 3123 urtw_8187_write_phy_cck(sc, 0x44 + i, 3124 cck_pwltable[idx * 8 + i]); 3125 } 3126 usb_pause_mtx(&sc->sc_mtx, 1); 3127 3128 /* OFDM power setting */ 3129 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3130 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3131 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3132 3133 idx = ofdm_pwrlvl % 6; 3134 set = ofdm_pwrlvl / 6; 3135 3136 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3137 if (error) 3138 goto fail; 3139 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3140 urtw_8187_write_phy_ofdm(sc, 6, 0); 3141 urtw_8187_write_phy_ofdm(sc, 8, 0); 3142 3143 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3144 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 3145 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 3146 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 3147 usb_pause_mtx(&sc->sc_mtx, 1); 3148fail: 3149 return (error); 3150} 3151 3152 3153static usb_error_t 3154urtw_8225_rf_stop(struct urtw_softc *sc) 3155{ 3156 uint8_t data; 3157 usb_error_t error; 3158 3159 urtw_8225_write(sc, 0x4, 0x1f); 3160 3161 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3162 if (error) 3163 goto fail; 3164 3165 urtw_read8_m(sc, URTW_CONFIG3, &data); 3166 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3167 if (sc->sc_flags & URTW_RTL8187B) { 3168 urtw_write32_m(sc, URTW_ANAPARAM2, 3169 URTW_8187B_8225_ANAPARAM2_OFF); 3170 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 3171 urtw_write32_m(sc, URTW_ANAPARAM3, 3172 URTW_8187B_8225_ANAPARAM3_OFF); 3173 } else { 3174 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 3175 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 3176 } 3177 3178 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3179 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3180 if (error) 3181 goto fail; 3182 3183fail: 3184 return (error); 3185} 3186 3187 3188static usb_error_t 3189urtw_8225_rf_init(struct urtw_softc *sc) 3190{ 3191 int i; 3192 uint16_t data; 3193 usb_error_t error; 3194 3195 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3196 if (error) 3197 goto fail; 3198 3199 error = urtw_8225_usb_init(sc); 3200 if (error) 3201 goto fail; 3202 3203 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 3204 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 3205 urtw_write16_m(sc, URTW_BRSR, 0xffff); 3206 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 3207 3208 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3209 if (error) 3210 goto fail; 3211 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 3212 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3213 if (error) 3214 goto fail; 3215 3216 error = urtw_8185_rf_pins_enable(sc); 3217 if (error) 3218 goto fail; 3219 usb_pause_mtx(&sc->sc_mtx, 1000); 3220 3221 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) { 3222 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 3223 urtw_8225_rf_part1[i].val); 3224 usb_pause_mtx(&sc->sc_mtx, 1); 3225 } 3226 usb_pause_mtx(&sc->sc_mtx, 100); 3227 urtw_8225_write(sc, 3228 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 3229 usb_pause_mtx(&sc->sc_mtx, 200); 3230 urtw_8225_write(sc, 3231 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 3232 usb_pause_mtx(&sc->sc_mtx, 200); 3233 urtw_8225_write(sc, 3234 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 3235 3236 for (i = 0; i < nitems(urtw_8225_rxgain); i++) { 3237 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3238 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 3239 } 3240 3241 urtw_8225_write(sc, 3242 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 3243 urtw_8225_write(sc, 3244 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 3245 3246 for (i = 0; i < nitems(urtw_8225_agc); i++) { 3247 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3248 usb_pause_mtx(&sc->sc_mtx, 1); 3249 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3250 usb_pause_mtx(&sc->sc_mtx, 1); 3251 } 3252 3253 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) { 3254 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 3255 urtw_8225_rf_part2[i].val); 3256 usb_pause_mtx(&sc->sc_mtx, 1); 3257 } 3258 3259 error = urtw_8225_setgain(sc, 4); 3260 if (error) 3261 goto fail; 3262 3263 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) { 3264 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 3265 urtw_8225_rf_part3[i].val); 3266 usb_pause_mtx(&sc->sc_mtx, 1); 3267 } 3268 3269 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3270 3271 error = urtw_8225_set_txpwrlvl(sc, 1); 3272 if (error) 3273 goto fail; 3274 3275 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3276 usb_pause_mtx(&sc->sc_mtx, 1); 3277 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3278 usb_pause_mtx(&sc->sc_mtx, 1); 3279 3280 /* TX ant A, 0x0 for B */ 3281 error = urtw_8185_tx_antenna(sc, 0x3); 3282 if (error) 3283 goto fail; 3284 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3285 3286 error = urtw_8225_rf_set_chan(sc, 1); 3287fail: 3288 return (error); 3289} 3290 3291static usb_error_t 3292urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 3293{ 3294 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3295 struct ieee80211_channel *c = ic->ic_curchan; 3296 usb_error_t error; 3297 3298 error = urtw_8225_set_txpwrlvl(sc, chan); 3299 if (error) 3300 goto fail; 3301 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3302 usb_pause_mtx(&sc->sc_mtx, 10); 3303 3304 urtw_write8_m(sc, URTW_SIFS, 0x22); 3305 3306 if (sc->sc_state == IEEE80211_S_ASSOC && 3307 ic->ic_flags & IEEE80211_F_SHSLOT) 3308 urtw_write8_m(sc, URTW_SLOT, 0x9); 3309 else 3310 urtw_write8_m(sc, URTW_SLOT, 0x14); 3311 3312 if (IEEE80211_IS_CHAN_G(c)) { 3313 /* for G */ 3314 urtw_write8_m(sc, URTW_DIFS, 0x14); 3315 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 3316 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 3317 } else { 3318 /* for B */ 3319 urtw_write8_m(sc, URTW_DIFS, 0x24); 3320 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 3321 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 3322 } 3323 3324fail: 3325 return (error); 3326} 3327 3328static usb_error_t 3329urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 3330{ 3331 usb_error_t error; 3332 3333 if (sens < 0 || sens > 6) 3334 return -1; 3335 3336 if (sens > 4) 3337 urtw_8225_write(sc, 3338 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 3339 else 3340 urtw_8225_write(sc, 3341 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 3342 3343 sens = 6 - sens; 3344 error = urtw_8225_setgain(sc, sens); 3345 if (error) 3346 goto fail; 3347 3348 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 3349 3350fail: 3351 return (error); 3352} 3353 3354static void 3355urtw_stop_locked(struct ifnet *ifp, int disable) 3356{ 3357 struct urtw_softc *sc = ifp->if_softc; 3358 uint8_t data8; 3359 usb_error_t error; 3360 3361 (void)disable; 3362 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 3363 3364 error = urtw_intr_disable(sc); 3365 if (error) 3366 goto fail; 3367 urtw_read8_m(sc, URTW_CMD, &data8); 3368 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 3369 urtw_write8_m(sc, URTW_CMD, data8); 3370 3371 error = sc->sc_rf_stop(sc); 3372 if (error != 0) 3373 goto fail; 3374 3375 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3376 if (error) 3377 goto fail; 3378 urtw_read8_m(sc, URTW_CONFIG4, &data8); 3379 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 3380 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3381 if (error) 3382 goto fail; 3383fail: 3384 if (error) 3385 device_printf(sc->sc_dev, "failed to stop (%s)\n", 3386 usbd_errstr(error)); 3387 3388 usb_callout_stop(&sc->sc_led_ch); 3389 callout_stop(&sc->sc_watchdog_ch); 3390 3391 urtw_abort_xfers(sc); 3392} 3393 3394static void 3395urtw_stop(struct ifnet *ifp, int disable) 3396{ 3397 struct urtw_softc *sc = ifp->if_softc; 3398 3399 URTW_LOCK(sc); 3400 urtw_stop_locked(ifp, disable); 3401 URTW_UNLOCK(sc); 3402} 3403 3404 3405static int 3406urtw_isbmode(uint16_t rate) 3407{ 3408 3409 rate = urtw_rtl2rate(rate); 3410 3411 return ((rate <= 22 && rate != 12 && rate != 18) || 3412 rate == 44) ? (1) : (0); 3413} 3414 3415static struct mbuf * 3416urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3417 int8_t *nf_p) 3418{ 3419 int actlen, flen, len, nf = -95, rssi; 3420 struct ieee80211_frame *wh; 3421 struct mbuf *m, *mnew; 3422 struct urtw_8187b_rxhdr *bhdr; 3423 struct urtw_softc *sc = data->sc; 3424 struct ifnet *ifp = sc->sc_ifp; 3425 struct ieee80211com *ic = ifp->if_l2com; 3426 uint8_t *desc, quality = 0, rate; 3427 3428 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3429 3430 if (actlen < URTW_MIN_RXBUFSZ) { 3431 ifp->if_ierrors++; 3432 return (NULL); 3433 } 3434 3435 if (sc->sc_flags & URTW_RTL8187B) { 3436 len = actlen - (sizeof(struct urtw_8187b_rxhdr)); 3437 bhdr = (struct urtw_8187b_rxhdr *)(data->buf + len); 3438 desc = data->buf + len; 3439 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3440 if (flen > actlen) { 3441 ifp->if_ierrors++; 3442 return (NULL); 3443 } 3444 rate = (le32toh(bhdr->flags) >> 20) & 0xf; 3445 rssi = 14 + (bhdr->rssi / 2); 3446 if (rssi > 95) 3447 rssi = 95; 3448 } else { 3449 /* 4 dword and 4 byte CRC */ 3450 len = actlen - (4 * 4); 3451 desc = data->buf + len; 3452 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3453 if (flen > actlen) { 3454 ifp->if_ierrors++; 3455 return (NULL); 3456 } 3457 3458 rate = (desc[2] & 0xf0) >> 4; 3459 quality = desc[4] & 0xff; 3460 /* XXX correct? */ 3461 rssi = (desc[6] & 0xfe) >> 1; 3462 if (!urtw_isbmode(rate)) { 3463 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 3464 rssi = ((90 - rssi) * 100) / 65; 3465 } else { 3466 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 3467 rssi = ((95 - rssi) * 100) / 65; 3468 } 3469 } 3470 3471 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3472 if (mnew == NULL) { 3473 ifp->if_ierrors++; 3474 return (NULL); 3475 } 3476 3477 m = data->m; 3478 data->m = mnew; 3479 data->buf = mtod(mnew, uint8_t *); 3480 3481 /* finalize mbuf */ 3482 m->m_pkthdr.rcvif = ifp; 3483 m->m_pkthdr.len = m->m_len = flen - 4; 3484 3485 if (ieee80211_radiotap_active(ic)) { 3486 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3487 3488 /* XXX Are variables correct? */ 3489 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 3490 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 3491 tap->wr_dbm_antsignal = (int8_t)rssi; 3492 } 3493 3494 wh = mtod(m, struct ieee80211_frame *); 3495 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 3496 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 3497 /* XXX correct? */ 3498 if ((sc->sc_flags & URTW_RTL8187B) == 0) 3499 nf = (quality > 64) ? 0 : ((64 - quality) * 100) / 64; 3500 3501 *rssi_p = rssi; 3502 *nf_p = nf; 3503 3504 return (m); 3505} 3506 3507static usb_error_t 3508urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3509{ 3510 uint8_t *gainp; 3511 usb_error_t error; 3512 3513 /* XXX for A? */ 3514 gainp = urtw_8225v2_gain_bg; 3515 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3516 usb_pause_mtx(&sc->sc_mtx, 1); 3517 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3518 usb_pause_mtx(&sc->sc_mtx, 1); 3519 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3520 usb_pause_mtx(&sc->sc_mtx, 1); 3521 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3522 usb_pause_mtx(&sc->sc_mtx, 1); 3523fail: 3524 return (error); 3525} 3526 3527static usb_error_t 3528urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3529{ 3530 int i; 3531 uint8_t *cck_pwrtable; 3532 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3533 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3534 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3535 usb_error_t error; 3536 3537 /* CCK power setting */ 3538 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3539 cck_pwrlvl += sc->sc_txpwr_cck_base; 3540 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3541 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3542 urtw_8225v2_txpwr_cck; 3543 3544 for (i = 0; i < 8; i++) 3545 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3546 3547 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3548 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3549 usb_pause_mtx(&sc->sc_mtx, 1); 3550 3551 /* OFDM power setting */ 3552 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3553 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3554 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3555 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3556 3557 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3558 if (error) 3559 goto fail; 3560 3561 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3562 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3563 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3564 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3565 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3566 3567 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3568 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3569 usb_pause_mtx(&sc->sc_mtx, 1); 3570fail: 3571 return (error); 3572} 3573 3574 3575static usb_error_t 3576urtw_8225v2_rf_init(struct urtw_softc *sc) 3577{ 3578 int i; 3579 uint16_t data; 3580 uint32_t data32; 3581 usb_error_t error; 3582 3583 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3584 if (error) 3585 goto fail; 3586 3587 error = urtw_8225_usb_init(sc); 3588 if (error) 3589 goto fail; 3590 3591 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 3592 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 3593 urtw_write16_m(sc, URTW_BRSR, 0xffff); 3594 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 3595 3596 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3597 if (error) 3598 goto fail; 3599 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 3600 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3601 if (error) 3602 goto fail; 3603 3604 error = urtw_8185_rf_pins_enable(sc); 3605 if (error) 3606 goto fail; 3607 3608 usb_pause_mtx(&sc->sc_mtx, 500); 3609 3610 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) { 3611 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 3612 urtw_8225v2_rf_part1[i].val); 3613 } 3614 usb_pause_mtx(&sc->sc_mtx, 50); 3615 3616 urtw_8225_write(sc, 3617 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 3618 3619 for (i = 0; i < 95; i++) { 3620 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3621 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3622 urtw_8225v2_rxgain[i]); 3623 } 3624 3625 urtw_8225_write(sc, 3626 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 3627 urtw_8225_write(sc, 3628 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 3629 urtw_8225_write(sc, 3630 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 3631 urtw_8225_write(sc, 3632 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 3633 usb_pause_mtx(&sc->sc_mtx, 100); 3634 urtw_8225_write(sc, 3635 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 3636 usb_pause_mtx(&sc->sc_mtx, 100); 3637 3638 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 3639 if (error != 0) 3640 goto fail; 3641 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 3642 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 3643 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 3644 urtw_8225_write(sc, 3645 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 3646 usb_pause_mtx(&sc->sc_mtx, 100); 3647 urtw_8225_write(sc, 3648 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 3649 usb_pause_mtx(&sc->sc_mtx, 50); 3650 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 3651 if (error != 0) 3652 goto fail; 3653 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 3654 device_printf(sc->sc_dev, "RF calibration failed\n"); 3655 } 3656 usb_pause_mtx(&sc->sc_mtx, 100); 3657 3658 urtw_8225_write(sc, 3659 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 3660 for (i = 0; i < 128; i++) { 3661 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3662 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3663 } 3664 3665 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) { 3666 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 3667 urtw_8225v2_rf_part2[i].val); 3668 } 3669 3670 error = urtw_8225v2_setgain(sc, 4); 3671 if (error) 3672 goto fail; 3673 3674 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) { 3675 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3676 urtw_8225v2_rf_part3[i].val); 3677 } 3678 3679 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3680 3681 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3682 if (error) 3683 goto fail; 3684 3685 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3686 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3687 3688 /* TX ant A, 0x0 for B */ 3689 error = urtw_8185_tx_antenna(sc, 0x3); 3690 if (error) 3691 goto fail; 3692 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3693 3694 error = urtw_8225_rf_set_chan(sc, 1); 3695fail: 3696 return (error); 3697} 3698 3699static usb_error_t 3700urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3701{ 3702 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3703 struct ieee80211_channel *c = ic->ic_curchan; 3704 usb_error_t error; 3705 3706 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3707 if (error) 3708 goto fail; 3709 3710 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3711 usb_pause_mtx(&sc->sc_mtx, 10); 3712 3713 urtw_write8_m(sc, URTW_SIFS, 0x22); 3714 3715 if(sc->sc_state == IEEE80211_S_ASSOC && 3716 ic->ic_flags & IEEE80211_F_SHSLOT) 3717 urtw_write8_m(sc, URTW_SLOT, 0x9); 3718 else 3719 urtw_write8_m(sc, URTW_SLOT, 0x14); 3720 3721 if (IEEE80211_IS_CHAN_G(c)) { 3722 /* for G */ 3723 urtw_write8_m(sc, URTW_DIFS, 0x14); 3724 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 3725 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 3726 } else { 3727 /* for B */ 3728 urtw_write8_m(sc, URTW_DIFS, 0x24); 3729 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 3730 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 3731 } 3732 3733fail: 3734 return (error); 3735} 3736 3737static usb_error_t 3738urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3739{ 3740 int i; 3741 int16_t bit; 3742 uint8_t rlen = 12, wlen = 6; 3743 uint16_t o1, o2, o3, tmp; 3744 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3745 uint32_t mask = 0x80000000, value = 0; 3746 usb_error_t error; 3747 3748 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3749 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3750 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3751 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3752 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3753 o1 &= ~URTW_RF_PINS_MAGIC4; 3754 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3755 DELAY(5); 3756 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3757 DELAY(5); 3758 3759 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3760 bit = ((d2w & mask) != 0) ? 1 : 0; 3761 3762 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3763 DELAY(2); 3764 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3765 URTW_BB_HOST_BANG_CLK); 3766 DELAY(2); 3767 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3768 URTW_BB_HOST_BANG_CLK); 3769 DELAY(2); 3770 mask = mask >> 1; 3771 if (i == 2) 3772 break; 3773 bit = ((d2w & mask) != 0) ? 1 : 0; 3774 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3775 URTW_BB_HOST_BANG_CLK); 3776 DELAY(2); 3777 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3778 URTW_BB_HOST_BANG_CLK); 3779 DELAY(2); 3780 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3781 DELAY(1); 3782 } 3783 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3784 URTW_BB_HOST_BANG_CLK); 3785 DELAY(2); 3786 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3787 DELAY(2); 3788 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3789 DELAY(2); 3790 3791 mask = 0x800; 3792 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3793 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3794 o1 | URTW_BB_HOST_BANG_RW); 3795 DELAY(2); 3796 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3797 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3798 DELAY(2); 3799 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3800 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3801 DELAY(2); 3802 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3803 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3804 DELAY(2); 3805 3806 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3807 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3808 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3809 o1 | URTW_BB_HOST_BANG_RW); 3810 DELAY(2); 3811 } 3812 3813 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3814 URTW_BB_HOST_BANG_RW); 3815 DELAY(2); 3816 3817 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3818 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3819 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3820 3821 if (data != NULL) 3822 *data = value; 3823fail: 3824 return (error); 3825} 3826 3827 3828static usb_error_t 3829urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3830{ 3831 uint32_t data; 3832 usb_error_t error; 3833 3834 *ret = 1; 3835 3836 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3837 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3838 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3839 usb_pause_mtx(&sc->sc_mtx, 500); 3840 3841 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3842 URTW_8225_ADDR_0_DATA_MAGIC1); 3843 3844 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3845 if (error != 0) 3846 goto fail; 3847 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3848 *ret = 0; 3849 else { 3850 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3851 if (error != 0) 3852 goto fail; 3853 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3854 *ret = 0; 3855 } 3856 3857 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3858 URTW_8225_ADDR_0_DATA_MAGIC2); 3859fail: 3860 return (error); 3861} 3862static void 3863urtw_led_ch(void *arg) 3864{ 3865 struct urtw_softc *sc = arg; 3866 struct ifnet *ifp = sc->sc_ifp; 3867 struct ieee80211com *ic = ifp->if_l2com; 3868 3869 ieee80211_runtask(ic, &sc->sc_led_task); 3870} 3871static void 3872urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 3873{ 3874 struct urtw_softc *sc = usbd_xfer_softc(xfer); 3875 struct ifnet *ifp = sc->sc_ifp; 3876 struct ieee80211com *ic = ifp->if_l2com; 3877 struct ieee80211_frame *wh; 3878 struct ieee80211_node *ni; 3879 struct mbuf *m = NULL; 3880 struct urtw_data *data; 3881 int8_t nf = -95; 3882 int rssi = 1; 3883 3884 URTW_ASSERT_LOCKED(sc); 3885 3886 switch (USB_GET_STATE(xfer)) { 3887 case USB_ST_TRANSFERRED: 3888 data = STAILQ_FIRST(&sc->sc_rx_active); 3889 if (data == NULL) 3890 goto setup; 3891 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 3892 m = urtw_rxeof(xfer, data, &rssi, &nf); 3893 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 3894 /* FALLTHROUGH */ 3895 case USB_ST_SETUP: 3896setup: 3897 data = STAILQ_FIRST(&sc->sc_rx_inactive); 3898 if (data == NULL) { 3899 KASSERT(m == NULL, ("mbuf isn't NULL")); 3900 return; 3901 } 3902 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 3903 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 3904 usbd_xfer_set_frame_data(xfer, 0, data->buf, 3905 usbd_xfer_max_len(xfer)); 3906 usbd_transfer_submit(xfer); 3907 3908 /* 3909 * To avoid LOR we should unlock our private mutex here to call 3910 * ieee80211_input() because here is at the end of a USB 3911 * callback and safe to unlock. 3912 */ 3913 URTW_UNLOCK(sc); 3914 if (m != NULL) { 3915 wh = mtod(m, struct ieee80211_frame *); 3916 ni = ieee80211_find_rxnode(ic, 3917 (struct ieee80211_frame_min *)wh); 3918 if (ni != NULL) { 3919 (void) ieee80211_input(ni, m, rssi, nf); 3920 /* node is no longer needed */ 3921 ieee80211_free_node(ni); 3922 } else 3923 (void) ieee80211_input_all(ic, m, rssi, nf); 3924 m = NULL; 3925 } 3926 URTW_LOCK(sc); 3927 break; 3928 default: 3929 /* needs it to the inactive queue due to a error. */ 3930 data = STAILQ_FIRST(&sc->sc_rx_active); 3931 if (data != NULL) { 3932 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 3933 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 3934 } 3935 if (error != USB_ERR_CANCELLED) { 3936 usbd_xfer_set_stall(xfer); 3937 ifp->if_ierrors++; 3938 goto setup; 3939 } 3940 break; 3941 } 3942} 3943 3944static void 3945urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 3946{ 3947 struct urtw_softc *sc = usbd_xfer_softc(xfer); 3948 struct ifnet *ifp = sc->sc_ifp; 3949 struct mbuf *m; 3950 3951 URTW_ASSERT_LOCKED(sc); 3952 3953 /* 3954 * Do any tx complete callback. Note this must be done before releasing 3955 * the node reference. 3956 */ 3957 if (data->m) { 3958 m = data->m; 3959 if (m->m_flags & M_TXCB) { 3960 /* XXX status? */ 3961 ieee80211_process_callback(data->ni, m, 0); 3962 } 3963 m_freem(m); 3964 data->m = NULL; 3965 } 3966 if (data->ni) { 3967 ieee80211_free_node(data->ni); 3968 data->ni = NULL; 3969 } 3970 sc->sc_txtimer = 0; 3971 ifp->if_opackets++; 3972 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3973} 3974 3975static void 3976urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 3977{ 3978 struct urtw_softc *sc = usbd_xfer_softc(xfer); 3979 struct ifnet *ifp = sc->sc_ifp; 3980 struct urtw_data *data; 3981 3982 URTW_ASSERT_LOCKED(sc); 3983 3984 switch (USB_GET_STATE(xfer)) { 3985 case USB_ST_TRANSFERRED: 3986 data = STAILQ_FIRST(&sc->sc_tx_active); 3987 if (data == NULL) 3988 goto setup; 3989 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 3990 urtw_txeof(xfer, data); 3991 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 3992 /* FALLTHROUGH */ 3993 case USB_ST_SETUP: 3994setup: 3995 data = STAILQ_FIRST(&sc->sc_tx_pending); 3996 if (data == NULL) { 3997 DPRINTF(sc, URTW_DEBUG_XMIT, 3998 "%s: empty pending queue\n", __func__); 3999 return; 4000 } 4001 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4002 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4003 4004 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4005 usbd_transfer_submit(xfer); 4006 4007 URTW_UNLOCK(sc); 4008 urtw_start(ifp); 4009 URTW_LOCK(sc); 4010 break; 4011 default: 4012 data = STAILQ_FIRST(&sc->sc_tx_active); 4013 if (data == NULL) 4014 goto setup; 4015 if (data->ni != NULL) { 4016 ieee80211_free_node(data->ni); 4017 data->ni = NULL; 4018 ifp->if_oerrors++; 4019 } 4020 if (error != USB_ERR_CANCELLED) { 4021 usbd_xfer_set_stall(xfer); 4022 goto setup; 4023 } 4024 break; 4025 } 4026} 4027 4028static struct urtw_data * 4029_urtw_getbuf(struct urtw_softc *sc) 4030{ 4031 struct urtw_data *bf; 4032 4033 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4034 if (bf != NULL) 4035 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4036 else 4037 bf = NULL; 4038 if (bf == NULL) 4039 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4040 "out of xmit buffers"); 4041 return (bf); 4042} 4043 4044static struct urtw_data * 4045urtw_getbuf(struct urtw_softc *sc) 4046{ 4047 struct urtw_data *bf; 4048 4049 URTW_ASSERT_LOCKED(sc); 4050 4051 bf = _urtw_getbuf(sc); 4052 if (bf == NULL) { 4053 struct ifnet *ifp = sc->sc_ifp; 4054 4055 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4056 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4057 } 4058 return (bf); 4059} 4060 4061static usb_error_t 4062urtw_8225v2b_rf_init(struct urtw_softc *sc) 4063{ 4064 int i; 4065 usb_error_t error; 4066 4067 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 4068 urtw_8225_write(sc, urtw_8225v2b_rf_part1[i].reg, 4069 urtw_8225v2b_rf_part1[i].val); 4070 4071 urtw_8225_write(sc, 4072 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 4073 4074 for (i = 0; i < nitems(urtw_8225v2b_rxgain); i++) { 4075 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 4076 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 4077 urtw_8225v2b_rxgain[i]); 4078 } 4079 4080 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 4081 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 4082 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 4083 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 4084 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 4085 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 4086 4087 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 4088 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 4089 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 4090 4091 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 4092 for (i = 0; i < nitems(urtw_8225z2_agc); i++) { 4093 urtw_8187_write_phy_ofdm(sc, 0xf, urtw_8225z2_agc[i]); 4094 urtw_8187_write_phy_ofdm(sc, 0xe, 0x80 + i); 4095 urtw_8187_write_phy_ofdm(sc, 0xe, 0); 4096 } 4097 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 4098 4099 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 4100 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 4101 4102 urtw_write32_m(sc, 0xf0, (7 << 12) | (3 << 8) | 0x1c); 4103 urtw_write32_m(sc, 0xf4, (7 << 12) | (3 << 8) | 0x1c); 4104 urtw_write32_m(sc, 0xf8, (7 << 12) | (3 << 8) | 0x1c); 4105 urtw_write32_m(sc, 0xfc, (7 << 12) | (3 << 8) | 0x1c); 4106 urtw_write8_m(sc, URTW_ACM_CONTROL, 0); 4107 4108 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 4109 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 4110 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 4111 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 4112fail: 4113 return (error); 4114} 4115 4116 4117static usb_error_t 4118urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 4119{ 4120 int ack; 4121 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 4122 usb_error_t error; 4123 4124 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 4125 if (error) 4126 goto fail; 4127 4128 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 4129 usb_pause_mtx(&sc->sc_mtx, 10); 4130 4131 urtw_write8_m(sc, URTW_SIFS, 0xa); 4132 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 4133 urtw_write8_m(sc, URTW_SLOT, 0x9); 4134 urtw_write8_m(sc, URTW_DIFS, 0x1c); 4135 /* In 8187B, BRSR + 1 ==> EIFS register */ 4136 urtw_write8_m(sc, URTW_BRSR + 1, 0x53); 4137 4138 ack = 112 + 48 + 0x1c; 4139 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 4140 72 : 144; 4141 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 4142 roundup2(ack, 4)); 4143 } else { 4144 urtw_write8_m(sc, URTW_SLOT, 0x14); 4145 urtw_write8_m(sc, URTW_DIFS, 0x32); 4146 /* In 8187B, BRSR + 1 ==> EIFS register */ 4147 urtw_write8_m(sc, URTW_BRSR + 1, 0x5b); 4148 4149 ack = 112 + 48 + 0x32; 4150 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 4151 72 : 144; 4152 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 4153 roundup2(ack, 4)); 4154 4155 } 4156 4157fail: 4158 return (error); 4159} 4160 4161static usb_error_t 4162urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 4163{ 4164 int i; 4165 uint8_t *cck_pwrtable; 4166 uint8_t cck_pwrlvl_max = 15; 4167 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 4168 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 4169 usb_error_t error; 4170 4171 /* CCK power setting */ 4172 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 4173 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 4174 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 4175 cck_pwrlvl += sc->sc_txpwr_cck_base; 4176 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 4177 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 4178 urtw_8225v2b_txpwr_cck; 4179 4180 if (sc->sc_flags & URTW_RTL8187B_REV_B) 4181 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 4182 ((cck_pwrlvl <= 11) ? 8 : 16); 4183 else 4184 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 4185 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 4186 4187 for (i = 0; i < 8; i++) 4188 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 4189 4190 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 4191 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 4192 usb_pause_mtx(&sc->sc_mtx, 1); 4193 4194 /* OFDM power setting */ 4195 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 4196 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 4197 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 4198 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 4199 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 4200 4201 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 4202 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 4203 4204 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 4205 if (ofdm_pwrlvl <= 11) { 4206 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 4207 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 4208 } else { 4209 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 4210 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 4211 } 4212 } else { 4213 if (ofdm_pwrlvl <= 11) { 4214 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 4215 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 4216 } else if (ofdm_pwrlvl <= 17) { 4217 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 4218 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 4219 } else { 4220 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 4221 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 4222 } 4223 } 4224 usb_pause_mtx(&sc->sc_mtx, 1); 4225fail: 4226 return (error); 4227} 4228 4229 4230static device_method_t urtw_methods[] = { 4231 DEVMETHOD(device_probe, urtw_match), 4232 DEVMETHOD(device_attach, urtw_attach), 4233 DEVMETHOD(device_detach, urtw_detach), 4234 { 0, 0 } 4235}; 4236static driver_t urtw_driver = { 4237 "urtw", 4238 urtw_methods, 4239 sizeof(struct urtw_softc) 4240}; 4241static devclass_t urtw_devclass; 4242 4243DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4244MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4245MODULE_DEPEND(urtw, usb, 1, 1, 1); 4246