if_rsu.c revision 260513
1/* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3/*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18#include <sys/cdefs.h> 19__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_rsu.c 260513 2014-01-10 14:47:20Z kevlo $"); 20 21/* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o 11n support 26 * o h/w crypto 27 * o hostap / ibss / mesh 28 */ 29#include <sys/param.h> 30#include <sys/endian.h> 31#include <sys/sockio.h> 32#include <sys/mbuf.h> 33#include <sys/kernel.h> 34#include <sys/socket.h> 35#include <sys/systm.h> 36#include <sys/conf.h> 37#include <sys/bus.h> 38#include <sys/rman.h> 39#include <sys/firmware.h> 40#include <sys/module.h> 41 42#include <machine/bus.h> 43#include <machine/resource.h> 44 45#include <net/bpf.h> 46#include <net/if.h> 47#include <net/if_var.h> 48#include <net/if_arp.h> 49#include <net/if_dl.h> 50#include <net/if_media.h> 51#include <net/if_types.h> 52 53#include <netinet/in.h> 54#include <netinet/in_systm.h> 55#include <netinet/in_var.h> 56#include <netinet/if_ether.h> 57#include <netinet/ip.h> 58 59#include <net80211/ieee80211_var.h> 60#include <net80211/ieee80211_regdomain.h> 61#include <net80211/ieee80211_radiotap.h> 62 63#include <dev/usb/usb.h> 64#include <dev/usb/usbdi.h> 65#include "usbdevs.h" 66 67#define USB_DEBUG_VAR rsu_debug 68#include <dev/usb/usb_debug.h> 69 70#include <dev/usb/wlan/if_rsureg.h> 71 72#ifdef USB_DEBUG 73static int rsu_debug = 0; 74SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 75SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RW, &rsu_debug, 0, 76 "Debug level"); 77#endif 78 79static const STRUCT_USB_HOST_ID rsu_devs[] = { 80#define RSU_HT_NOT_SUPPORTED 0 81#define RSU_HT_SUPPORTED 1 82#define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 83 RSU_HT_SUPPORTED) } 84#define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 85 RSU_HT_NOT_SUPPORTED) } 86 RSU_DEV(ASUS, RTL8192SU), 87 RSU_DEV(AZUREWAVE, RTL8192SU_4), 88 RSU_DEV_HT(ACCTON, RTL8192SU), 89 RSU_DEV_HT(ASUS, USBN10), 90 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 91 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 92 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 93 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 94 RSU_DEV_HT(BELKIN, RTL8192SU_1), 95 RSU_DEV_HT(BELKIN, RTL8192SU_2), 96 RSU_DEV_HT(BELKIN, RTL8192SU_3), 97 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 98 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 99 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 100 RSU_DEV_HT(COREGA, RTL8192SU), 101 RSU_DEV_HT(DLINK2, DWA131A1), 102 RSU_DEV_HT(DLINK2, RTL8192SU_1), 103 RSU_DEV_HT(DLINK2, RTL8192SU_2), 104 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 105 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 106 RSU_DEV_HT(EDIMAX, EW7622UMN), 107 RSU_DEV_HT(GUILLEMOT, HWGUN54), 108 RSU_DEV_HT(GUILLEMOT, HWNUM300), 109 RSU_DEV_HT(HAWKING, RTL8192SU_1), 110 RSU_DEV_HT(HAWKING, RTL8192SU_2), 111 RSU_DEV_HT(PLANEX2, GWUSNANO), 112 RSU_DEV_HT(REALTEK, RTL8171), 113 RSU_DEV_HT(REALTEK, RTL8172), 114 RSU_DEV_HT(REALTEK, RTL8173), 115 RSU_DEV_HT(REALTEK, RTL8174), 116 RSU_DEV_HT(REALTEK, RTL8192SU), 117 RSU_DEV_HT(REALTEK, RTL8712), 118 RSU_DEV_HT(REALTEK, RTL8713), 119 RSU_DEV_HT(SENAO, RTL8192SU_1), 120 RSU_DEV_HT(SENAO, RTL8192SU_2), 121 RSU_DEV_HT(SITECOMEU, WL349V1), 122 RSU_DEV_HT(SITECOMEU, WL353), 123 RSU_DEV_HT(SWEEX2, LW154), 124#undef RSU_DEV_HT 125#undef RSU_DEV 126}; 127 128static device_probe_t rsu_match; 129static device_attach_t rsu_attach; 130static device_detach_t rsu_detach; 131static usb_callback_t rsu_bulk_tx_callback; 132static usb_callback_t rsu_bulk_rx_callback; 133static usb_error_t rsu_do_request(struct rsu_softc *, 134 struct usb_device_request *, void *); 135static struct ieee80211vap * 136 rsu_vap_create(struct ieee80211com *, const char name[], 137 int, enum ieee80211_opmode, int, const uint8_t bssid[], 138 const uint8_t mac[]); 139static void rsu_vap_delete(struct ieee80211vap *); 140static void rsu_scan_start(struct ieee80211com *); 141static void rsu_scan_end(struct ieee80211com *); 142static void rsu_set_channel(struct ieee80211com *); 143static void rsu_update_mcast(struct ifnet *); 144static int rsu_alloc_rx_list(struct rsu_softc *); 145static void rsu_free_rx_list(struct rsu_softc *); 146static int rsu_alloc_tx_list(struct rsu_softc *); 147static void rsu_free_tx_list(struct rsu_softc *); 148static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 149static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 150static struct rsu_data *rsu_getbuf(struct rsu_softc *); 151static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 152 int); 153static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 154static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 155static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 156static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 157 int); 158static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 159static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 160static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 161static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 162static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 163static int rsu_read_rom(struct rsu_softc *); 164static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 165static void rsu_calib_task(void *, int); 166static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 167#ifdef notyet 168static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 169static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 170#endif 171static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 172static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 173static int rsu_disconnect(struct rsu_softc *); 174static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 175static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 176static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 177static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 178static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 179static struct mbuf * 180 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 181static struct mbuf * 182 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 183static struct mbuf * 184 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 185static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 186static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 187 const struct ieee80211_bpf_params *); 188static void rsu_init(void *); 189static void rsu_init_locked(struct rsu_softc *); 190static void rsu_watchdog(void *); 191static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 192 struct mbuf *, struct rsu_data *); 193static void rsu_start(struct ifnet *); 194static void rsu_start_locked(struct ifnet *); 195static int rsu_ioctl(struct ifnet *, u_long, caddr_t); 196static void rsu_stop(struct ifnet *, int); 197static void rsu_stop_locked(struct ifnet *, int); 198 199static device_method_t rsu_methods[] = { 200 DEVMETHOD(device_probe, rsu_match), 201 DEVMETHOD(device_attach, rsu_attach), 202 DEVMETHOD(device_detach, rsu_detach), 203 204 DEVMETHOD_END 205}; 206 207static driver_t rsu_driver = { 208 .name = "rsu", 209 .methods = rsu_methods, 210 .size = sizeof(struct rsu_softc) 211}; 212 213static devclass_t rsu_devclass; 214 215DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 216MODULE_DEPEND(rsu, wlan, 1, 1, 1); 217MODULE_DEPEND(rsu, usb, 1, 1, 1); 218MODULE_DEPEND(rsu, firmware, 1, 1, 1); 219MODULE_VERSION(rsu, 1); 220 221static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 222 [RSU_BULK_RX] = { 223 .type = UE_BULK, 224 .endpoint = UE_ADDR_ANY, 225 .direction = UE_DIR_IN, 226 .bufsize = RSU_RXBUFSZ, 227 .flags = { 228 .pipe_bof = 1, 229 .short_xfer_ok = 1 230 }, 231 .callback = rsu_bulk_rx_callback 232 }, 233 [RSU_BULK_TX_BE] = { 234 .type = UE_BULK, 235 .endpoint = 0x06, 236 .direction = UE_DIR_OUT, 237 .bufsize = RSU_TXBUFSZ, 238 .flags = { 239 .ext_buffer = 1, 240 .pipe_bof = 1, 241 .force_short_xfer = 1 242 }, 243 .callback = rsu_bulk_tx_callback, 244 .timeout = RSU_TX_TIMEOUT 245 }, 246 [RSU_BULK_TX_BK] = { 247 .type = UE_BULK, 248 .endpoint = 0x06, 249 .direction = UE_DIR_OUT, 250 .bufsize = RSU_TXBUFSZ, 251 .flags = { 252 .ext_buffer = 1, 253 .pipe_bof = 1, 254 .force_short_xfer = 1 255 }, 256 .callback = rsu_bulk_tx_callback, 257 .timeout = RSU_TX_TIMEOUT 258 }, 259 [RSU_BULK_TX_VI] = { 260 .type = UE_BULK, 261 .endpoint = 0x04, 262 .direction = UE_DIR_OUT, 263 .bufsize = RSU_TXBUFSZ, 264 .flags = { 265 .ext_buffer = 1, 266 .pipe_bof = 1, 267 .force_short_xfer = 1 268 }, 269 .callback = rsu_bulk_tx_callback, 270 .timeout = RSU_TX_TIMEOUT 271 }, 272 [RSU_BULK_TX_VO] = { 273 .type = UE_BULK, 274 .endpoint = 0x04, 275 .direction = UE_DIR_OUT, 276 .bufsize = RSU_TXBUFSZ, 277 .flags = { 278 .ext_buffer = 1, 279 .pipe_bof = 1, 280 .force_short_xfer = 1 281 }, 282 .callback = rsu_bulk_tx_callback, 283 .timeout = RSU_TX_TIMEOUT 284 }, 285}; 286 287static int 288rsu_match(device_t self) 289{ 290 struct usb_attach_arg *uaa = device_get_ivars(self); 291 292 if (uaa->usb_mode != USB_MODE_HOST || 293 uaa->info.bIfaceIndex != 0 || 294 uaa->info.bConfigIndex != 0) 295 return (ENXIO); 296 297 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 298} 299 300static int 301rsu_attach(device_t self) 302{ 303 struct usb_attach_arg *uaa = device_get_ivars(self); 304 struct rsu_softc *sc = device_get_softc(self); 305 struct ifnet *ifp; 306 struct ieee80211com *ic; 307 int error; 308 uint8_t iface_index, bands; 309 310 device_set_usb_desc(self); 311 sc->sc_udev = uaa->device; 312 sc->sc_dev = self; 313 314 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 315 MTX_DEF); 316 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 317 rsu_calib_task, sc); 318 callout_init(&sc->sc_watchdog_ch, 0); 319 320 iface_index = 0; 321 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 322 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 323 if (error) { 324 device_printf(sc->sc_dev, 325 "could not allocate USB transfers, err=%s\n", 326 usbd_errstr(error)); 327 goto fail_usb; 328 } 329 RSU_LOCK(sc); 330 /* Read chip revision. */ 331 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 332 if (sc->cut != 3) 333 sc->cut = (sc->cut >> 1) + 1; 334 error = rsu_read_rom(sc); 335 if (error != 0) { 336 device_printf(self, "could not read ROM\n"); 337 goto fail_rom; 338 } 339 RSU_UNLOCK(sc); 340 IEEE80211_ADDR_COPY(sc->sc_bssid, &sc->rom[0x12]); 341 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 342 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 343 if (ifp == NULL) { 344 device_printf(self, "cannot allocate interface\n"); 345 goto fail_ifalloc; 346 } 347 ic = ifp->if_l2com; 348 ifp->if_softc = sc; 349 if_initname(ifp, "rsu", device_get_unit(self)); 350 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 351 ifp->if_init = rsu_init; 352 ifp->if_ioctl = rsu_ioctl; 353 ifp->if_start = rsu_start; 354 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 355 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 356 IFQ_SET_READY(&ifp->if_snd); 357 ifp->if_capabilities |= IFCAP_RXCSUM; 358 ifp->if_capenable |= IFCAP_RXCSUM; 359 ifp->if_hwassist = CSUM_TCP; 360 361 ic->ic_ifp = ifp; 362 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 363 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 364 365 /* Set device capabilities. */ 366 ic->ic_caps = 367 IEEE80211_C_STA | /* station mode */ 368 IEEE80211_C_BGSCAN | /* Background scan. */ 369 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 370 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 371 IEEE80211_C_WPA; /* WPA/RSN. */ 372 373#if 0 374 /* Check if HT support is present. */ 375 if (usb_lookup(rsu_devs_noht, uaa->vendor, uaa->product) == NULL) { 376 /* Set HT capabilities. */ 377 ic->ic_htcaps = 378 IEEE80211_HTCAP_CBW20_40 | 379 IEEE80211_HTCAP_DSSSCCK40; 380 /* Set supported HT rates. */ 381 for (i = 0; i < 2; i++) 382 ic->ic_sup_mcs[i] = 0xff; 383 } 384#endif 385 386 /* Set supported .11b and .11g rates. */ 387 bands = 0; 388 setbit(&bands, IEEE80211_MODE_11B); 389 setbit(&bands, IEEE80211_MODE_11G); 390 ieee80211_init_channels(ic, NULL, &bands); 391 392 ieee80211_ifattach(ic, sc->sc_bssid); 393 ic->ic_raw_xmit = rsu_raw_xmit; 394 ic->ic_scan_start = rsu_scan_start; 395 ic->ic_scan_end = rsu_scan_end; 396 ic->ic_set_channel = rsu_set_channel; 397 ic->ic_vap_create = rsu_vap_create; 398 ic->ic_vap_delete = rsu_vap_delete; 399 ic->ic_update_mcast = rsu_update_mcast; 400 401 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 402 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 403 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 404 RSU_RX_RADIOTAP_PRESENT); 405 406 if (bootverbose) 407 ieee80211_announce(ic); 408 409 return (0); 410 411fail_ifalloc: 412fail_rom: 413 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 414fail_usb: 415 mtx_destroy(&sc->sc_mtx); 416 return (ENXIO); 417} 418 419static int 420rsu_detach(device_t self) 421{ 422 struct rsu_softc *sc = device_get_softc(self); 423 struct ifnet *ifp = sc->sc_ifp; 424 struct ieee80211com *ic = ifp->if_l2com; 425 426 if (!device_is_attached(self)) 427 return (0); 428 rsu_stop(ifp, 1); 429 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 430 ieee80211_ifdetach(ic); 431 432 callout_drain(&sc->sc_watchdog_ch); 433 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 434 435 /* Free Tx/Rx buffers. */ 436 rsu_free_tx_list(sc); 437 rsu_free_rx_list(sc); 438 439 if_free(ifp); 440 mtx_destroy(&sc->sc_mtx); 441 442 return (0); 443} 444 445static usb_error_t 446rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 447 void *data) 448{ 449 usb_error_t err; 450 int ntries = 10; 451 452 RSU_ASSERT_LOCKED(sc); 453 454 while (ntries--) { 455 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 456 req, data, 0, NULL, 250 /* ms */); 457 if (err == 0 || !device_is_attached(sc->sc_dev)) 458 break; 459 DPRINTFN(1, "Control request failed, %s (retrying)\n", 460 usbd_errstr(err)); 461 usb_pause_mtx(&sc->sc_mtx, hz / 100); 462 } 463 464 return (err); 465} 466 467static struct ieee80211vap * 468rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 469 enum ieee80211_opmode opmode, int flags, 470 const uint8_t bssid[IEEE80211_ADDR_LEN], 471 const uint8_t mac[IEEE80211_ADDR_LEN]) 472{ 473 struct rsu_vap *uvp; 474 struct ieee80211vap *vap; 475 476 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 477 return (NULL); 478 479 uvp = (struct rsu_vap *) malloc(sizeof(struct rsu_vap), 480 M_80211_VAP, M_NOWAIT | M_ZERO); 481 if (uvp == NULL) 482 return (NULL); 483 vap = &uvp->vap; 484 485 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 486 flags, bssid, mac) != 0) { 487 /* out of memory */ 488 free(uvp, M_80211_VAP); 489 return (NULL); 490 } 491 492 /* override state transition machine */ 493 uvp->newstate = vap->iv_newstate; 494 vap->iv_newstate = rsu_newstate; 495 496 /* complete setup */ 497 ieee80211_vap_attach(vap, ieee80211_media_change, 498 ieee80211_media_status); 499 ic->ic_opmode = opmode; 500 501 return (vap); 502} 503 504static void 505rsu_vap_delete(struct ieee80211vap *vap) 506{ 507 struct rsu_vap *uvp = RSU_VAP(vap); 508 509 ieee80211_vap_detach(vap); 510 free(uvp, M_80211_VAP); 511} 512 513static void 514rsu_scan_start(struct ieee80211com *ic) 515{ 516 int error; 517 struct ifnet *ifp = ic->ic_ifp; 518 struct rsu_softc *sc = ifp->if_softc; 519 520 /* Scanning is done by the firmware. */ 521 RSU_LOCK(sc); 522 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 523 RSU_UNLOCK(sc); 524 if (error != 0) 525 device_printf(sc->sc_dev, 526 "could not send site survey command\n"); 527} 528 529static void 530rsu_scan_end(struct ieee80211com *ic) 531{ 532 /* Nothing to do here. */ 533} 534 535static void 536rsu_set_channel(struct ieee80211com *ic __unused) 537{ 538 /* We are unable to switch channels, yet. */ 539} 540 541static void 542rsu_update_mcast(struct ifnet *ifp) 543{ 544 /* XXX do nothing? */ 545} 546 547static int 548rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 549 int ndata, int maxsz) 550{ 551 int i, error; 552 553 for (i = 0; i < ndata; i++) { 554 struct rsu_data *dp = &data[i]; 555 dp->sc = sc; 556 dp->m = NULL; 557 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 558 if (dp->buf == NULL) { 559 device_printf(sc->sc_dev, 560 "could not allocate buffer\n"); 561 error = ENOMEM; 562 goto fail; 563 } 564 dp->ni = NULL; 565 } 566 567 return (0); 568fail: 569 rsu_free_list(sc, data, ndata); 570 return (error); 571} 572 573static int 574rsu_alloc_rx_list(struct rsu_softc *sc) 575{ 576 int error, i; 577 578 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 579 RSU_RXBUFSZ); 580 if (error != 0) 581 return (error); 582 583 STAILQ_INIT(&sc->sc_rx_active); 584 STAILQ_INIT(&sc->sc_rx_inactive); 585 586 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 587 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 588 589 return (0); 590} 591 592static int 593rsu_alloc_tx_list(struct rsu_softc *sc) 594{ 595 int error, i; 596 597 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 598 RSU_TXBUFSZ); 599 if (error != 0) 600 return (error); 601 602 STAILQ_INIT(&sc->sc_tx_active); 603 STAILQ_INIT(&sc->sc_tx_inactive); 604 STAILQ_INIT(&sc->sc_tx_pending); 605 606 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 607 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 608 } 609 610 return (0); 611} 612 613static void 614rsu_free_tx_list(struct rsu_softc *sc) 615{ 616 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 617} 618 619static void 620rsu_free_rx_list(struct rsu_softc *sc) 621{ 622 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 623} 624 625static void 626rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 627{ 628 int i; 629 630 for (i = 0; i < ndata; i++) { 631 struct rsu_data *dp = &data[i]; 632 633 if (dp->buf != NULL) { 634 free(dp->buf, M_USBDEV); 635 dp->buf = NULL; 636 } 637 if (dp->ni != NULL) { 638 ieee80211_free_node(dp->ni); 639 dp->ni = NULL; 640 } 641 } 642} 643 644static struct rsu_data * 645_rsu_getbuf(struct rsu_softc *sc) 646{ 647 struct rsu_data *bf; 648 649 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 650 if (bf != NULL) 651 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 652 else 653 bf = NULL; 654 if (bf == NULL) 655 DPRINTF("out of xmit buffers\n"); 656 return (bf); 657} 658 659static struct rsu_data * 660rsu_getbuf(struct rsu_softc *sc) 661{ 662 struct rsu_data *bf; 663 664 RSU_ASSERT_LOCKED(sc); 665 666 bf = _rsu_getbuf(sc); 667 if (bf == NULL) { 668 struct ifnet *ifp = sc->sc_ifp; 669 DPRINTF("stop queue\n"); 670 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 671 } 672 return (bf); 673} 674 675static int 676rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 677 int len) 678{ 679 usb_device_request_t req; 680 681 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 682 req.bRequest = R92S_REQ_REGS; 683 USETW(req.wValue, addr); 684 USETW(req.wIndex, 0); 685 USETW(req.wLength, len); 686 687 return (rsu_do_request(sc, &req, buf)); 688} 689 690static void 691rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 692{ 693 rsu_write_region_1(sc, addr, &val, 1); 694} 695 696static void 697rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 698{ 699 val = htole16(val); 700 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 701} 702 703static void 704rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 705{ 706 val = htole32(val); 707 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 708} 709 710static int 711rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 712 int len) 713{ 714 usb_device_request_t req; 715 716 req.bmRequestType = UT_READ_VENDOR_DEVICE; 717 req.bRequest = R92S_REQ_REGS; 718 USETW(req.wValue, addr); 719 USETW(req.wIndex, 0); 720 USETW(req.wLength, len); 721 722 return (rsu_do_request(sc, &req, buf)); 723} 724 725static uint8_t 726rsu_read_1(struct rsu_softc *sc, uint16_t addr) 727{ 728 uint8_t val; 729 730 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 731 return (0xff); 732 return (val); 733} 734 735static uint16_t 736rsu_read_2(struct rsu_softc *sc, uint16_t addr) 737{ 738 uint16_t val; 739 740 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 741 return (0xffff); 742 return (le16toh(val)); 743} 744 745static uint32_t 746rsu_read_4(struct rsu_softc *sc, uint16_t addr) 747{ 748 uint32_t val; 749 750 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 751 return (0xffffffff); 752 return (le32toh(val)); 753} 754 755static int 756rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 757{ 758 int ntries; 759 760 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 761 DELAY(100); 762 for (ntries = 0; ntries < 50; ntries++) { 763 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 764 return (0); 765 DELAY(10); 766 } 767 return (ETIMEDOUT); 768} 769 770static uint8_t 771rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 772{ 773 uint32_t reg; 774 int ntries; 775 776 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 777 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 778 reg &= ~R92S_EFUSE_CTRL_VALID; 779 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 780 /* Wait for read operation to complete. */ 781 for (ntries = 0; ntries < 100; ntries++) { 782 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 783 if (reg & R92S_EFUSE_CTRL_VALID) 784 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 785 DELAY(5); 786 } 787 device_printf(sc->sc_dev, 788 "could not read efuse byte at address 0x%x\n", addr); 789 return (0xff); 790} 791 792static int 793rsu_read_rom(struct rsu_softc *sc) 794{ 795 uint8_t *rom = sc->rom; 796 uint16_t addr = 0; 797 uint32_t reg; 798 uint8_t off, msk; 799 int i; 800 801 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 802 reg = rsu_read_1(sc, R92S_EE_9346CR); 803 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 804 return (EIO); 805 806 /* Turn on 2.5V to prevent eFuse leakage. */ 807 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 808 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 809 DELAY(1000); 810 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 811 812 /* Read full ROM image. */ 813 memset(&sc->rom, 0xff, sizeof(sc->rom)); 814 while (addr < 512) { 815 reg = rsu_efuse_read_1(sc, addr); 816 if (reg == 0xff) 817 break; 818 addr++; 819 off = reg >> 4; 820 msk = reg & 0xf; 821 for (i = 0; i < 4; i++) { 822 if (msk & (1 << i)) 823 continue; 824 rom[off * 8 + i * 2 + 0] = 825 rsu_efuse_read_1(sc, addr); 826 addr++; 827 rom[off * 8 + i * 2 + 1] = 828 rsu_efuse_read_1(sc, addr); 829 addr++; 830 } 831 } 832#ifdef USB_DEBUG 833 if (rsu_debug >= 5) { 834 /* Dump ROM content. */ 835 printf("\n"); 836 for (i = 0; i < sizeof(sc->rom); i++) 837 printf("%02x:", rom[i]); 838 printf("\n"); 839 } 840#endif 841 return (0); 842} 843 844static int 845rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 846{ 847 struct rsu_data *data; 848 struct r92s_tx_desc *txd; 849 struct r92s_fw_cmd_hdr *cmd; 850 int cmdsz, xferlen; 851 852 data = rsu_getbuf(sc); 853 if (data == NULL) 854 return (ENOMEM); 855 856 /* Round-up command length to a multiple of 8 bytes. */ 857 cmdsz = (len + 7) & ~7; 858 859 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 860 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 861 memset(data->buf, 0, xferlen); 862 863 /* Setup Tx descriptor. */ 864 txd = (struct r92s_tx_desc *)data->buf; 865 txd->txdw0 = htole32( 866 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 867 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 868 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 869 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 870 871 /* Setup command header. */ 872 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 873 cmd->len = htole16(cmdsz); 874 cmd->code = code; 875 cmd->seq = sc->cmd_seq; 876 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 877 878 /* Copy command payload. */ 879 memcpy(&cmd[1], buf, len); 880 881 DPRINTFN(2, "Tx cmd code=0x%x len=0x%x\n", code, cmdsz); 882 data->buflen = xferlen; 883 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 884 usbd_transfer_start(sc->sc_xfer[RSU_BULK_TX_VO]); 885 886 return (0); 887} 888 889/* ARGSUSED */ 890static void 891rsu_calib_task(void *arg, int pending __unused) 892{ 893 struct rsu_softc *sc = arg; 894 uint32_t reg; 895 896 DPRINTFN(6, "running calibration task\n"); 897 RSU_LOCK(sc); 898#ifdef notyet 899 /* Read WPS PBC status. */ 900 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 901 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 902 rsu_write_1(sc, R92S_GPIO_IO_SEL, 903 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 904 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 905 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 906 DPRINTF(("WPS PBC is pushed\n")); 907#endif 908 /* Read current signal level. */ 909 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 910 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 911 DPRINTFN(8, "RSSI=%d%%\n", reg >> 4); 912 } 913 if (sc->sc_calibrating) { 914 RSU_UNLOCK(sc); 915 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, 916 hz * 2); 917 } else 918 RSU_UNLOCK(sc); 919} 920 921static int 922rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 923{ 924 struct rsu_vap *uvp = RSU_VAP(vap); 925 struct ieee80211com *ic = vap->iv_ic; 926 struct rsu_softc *sc = ic->ic_ifp->if_softc; 927 struct ieee80211_node *ni; 928 struct ieee80211_rateset *rs; 929 enum ieee80211_state ostate; 930 int error, startcal = 0; 931 932 ostate = vap->iv_state; 933 DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 934 ieee80211_state_name[nstate]); 935 936 IEEE80211_UNLOCK(ic); 937 if (ostate == IEEE80211_S_RUN) { 938 RSU_LOCK(sc); 939 /* Stop calibration. */ 940 sc->sc_calibrating = 0; 941 RSU_UNLOCK(sc); 942 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 943 /* Disassociate from our current BSS. */ 944 RSU_LOCK(sc); 945 rsu_disconnect(sc); 946 } else 947 RSU_LOCK(sc); 948 switch (nstate) { 949 case IEEE80211_S_INIT: 950 break; 951 case IEEE80211_S_AUTH: 952 ni = ieee80211_ref_node(vap->iv_bss); 953 error = rsu_join_bss(sc, ni); 954 ieee80211_free_node(ni); 955 if (error != 0) { 956 device_printf(sc->sc_dev, 957 "could not send join command\n"); 958 } 959 break; 960 case IEEE80211_S_RUN: 961 ni = ieee80211_ref_node(vap->iv_bss); 962 rs = &ni->ni_rates; 963 /* Indicate highest supported rate. */ 964 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 965 ieee80211_free_node(ni); 966 startcal = 1; 967 break; 968 default: 969 break; 970 } 971 sc->sc_calibrating = 1; 972 RSU_UNLOCK(sc); 973 IEEE80211_LOCK(ic); 974 /* Start periodic calibration. */ 975 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz * 2); 976 977 return (uvp->newstate(vap, nstate, arg)); 978} 979 980#ifdef notyet 981static void 982rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 983{ 984 struct r92s_fw_cmd_set_key key; 985 986 memset(&key, 0, sizeof(key)); 987 /* Map net80211 cipher to HW crypto algorithm. */ 988 switch (k->wk_cipher->ic_cipher) { 989 case IEEE80211_CIPHER_WEP: 990 if (k->wk_keylen < 8) 991 key.algo = R92S_KEY_ALGO_WEP40; 992 else 993 key.algo = R92S_KEY_ALGO_WEP104; 994 break; 995 case IEEE80211_CIPHER_TKIP: 996 key.algo = R92S_KEY_ALGO_TKIP; 997 break; 998 case IEEE80211_CIPHER_AES_CCM: 999 key.algo = R92S_KEY_ALGO_AES; 1000 break; 1001 default: 1002 return; 1003 } 1004 key.id = k->wk_keyix; 1005 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1006 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1007 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1008} 1009 1010static void 1011rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1012{ 1013 struct r92s_fw_cmd_set_key key; 1014 1015 memset(&key, 0, sizeof(key)); 1016 key.id = k->wk_keyix; 1017 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1018} 1019#endif 1020 1021static int 1022rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1023{ 1024 struct r92s_fw_cmd_sitesurvey cmd; 1025 struct ifnet *ifp = sc->sc_ifp; 1026 struct ieee80211com *ic = ifp->if_l2com; 1027 1028 memset(&cmd, 0, sizeof(cmd)); 1029 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->scan_pass == 1) 1030 cmd.active = htole32(1); 1031 cmd.limit = htole32(48); 1032 if (sc->scan_pass == 1 && vap->iv_des_nssid > 0) { 1033 /* Do a directed scan for second pass. */ 1034 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1035 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1036 vap->iv_des_ssid[0].len); 1037 1038 } 1039 DPRINTF("sending site survey command, pass=%d\n", sc->scan_pass); 1040 return (rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd))); 1041} 1042 1043static int 1044rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1045{ 1046 struct ifnet *ifp = sc->sc_ifp; 1047 struct ieee80211com *ic = ifp->if_l2com; 1048 struct ieee80211vap *vap = ni->ni_vap; 1049 struct ndis_wlan_bssid_ex *bss; 1050 struct ndis_802_11_fixed_ies *fixed; 1051 struct r92s_fw_cmd_auth auth; 1052 uint8_t buf[sizeof(*bss) + 128], *frm; 1053 uint8_t opmode; 1054 int error; 1055 1056 /* Let the FW decide the opmode based on the capinfo field. */ 1057 opmode = NDIS802_11AUTOUNKNOWN; 1058 DPRINTF("setting operating mode to %d\n", opmode); 1059 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1060 if (error != 0) 1061 return (error); 1062 1063 memset(&auth, 0, sizeof(auth)); 1064 if (vap->iv_flags & IEEE80211_F_WPA) { 1065 auth.mode = R92S_AUTHMODE_WPA; 1066 auth.dot1x = ni->ni_authmode == IEEE80211_AUTH_8021X; 1067 } else 1068 auth.mode = R92S_AUTHMODE_OPEN; 1069 DPRINTF("setting auth mode to %d\n", auth.mode); 1070 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1071 if (error != 0) 1072 return (error); 1073 1074 memset(buf, 0, sizeof(buf)); 1075 bss = (struct ndis_wlan_bssid_ex *)buf; 1076 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1077 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1078 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1079 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1080 bss->privacy = htole32(1); 1081 bss->rssi = htole32(ni->ni_avgrssi); 1082 if (ic->ic_curmode == IEEE80211_MODE_11B) 1083 bss->networktype = htole32(NDIS802_11DS); 1084 else 1085 bss->networktype = htole32(NDIS802_11OFDM24); 1086 bss->config.len = htole32(sizeof(bss->config)); 1087 bss->config.bintval = htole32(ni->ni_intval); 1088 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1089 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1090 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1091 ni->ni_rates.rs_nrates); 1092 /* Write the fixed fields of the beacon frame. */ 1093 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1094 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1095 fixed->bintval = htole16(ni->ni_intval); 1096 fixed->capabilities = htole16(ni->ni_capinfo); 1097 /* Write IEs to be included in the association request. */ 1098 frm = (uint8_t *)&fixed[1]; 1099 frm = ieee80211_add_rsn(frm, vap); 1100 frm = ieee80211_add_wpa(frm, vap); 1101 frm = ieee80211_add_qos(frm, ni); 1102 if (ni->ni_flags & IEEE80211_NODE_HT) 1103 frm = ieee80211_add_htcap(frm, ni); 1104 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1105 bss->len = htole32(((frm - buf) + 3) & ~3); 1106 DPRINTF("sending join bss command to %s chan %d\n", 1107 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1108 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1109} 1110 1111static int 1112rsu_disconnect(struct rsu_softc *sc) 1113{ 1114 uint32_t zero = 0; /* :-) */ 1115 1116 /* Disassociate from our current BSS. */ 1117 DPRINTF("sending disconnect command\n"); 1118 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1119} 1120 1121static void 1122rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1123{ 1124 struct ifnet *ifp = sc->sc_ifp; 1125 struct ieee80211com *ic = ifp->if_l2com; 1126 struct ieee80211_frame *wh; 1127 struct ieee80211_channel *c; 1128 struct ndis_wlan_bssid_ex *bss; 1129 struct mbuf *m; 1130 int pktlen; 1131 1132 if (__predict_false(len < sizeof(*bss))) 1133 return; 1134 bss = (struct ndis_wlan_bssid_ex *)buf; 1135 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1136 return; 1137 1138 DPRINTFN(2, "found BSS %s: len=%d chan=%d inframode=%d " 1139 "networktype=%d privacy=%d\n", 1140 ether_sprintf(bss->macaddr), le32toh(bss->len), 1141 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1142 le32toh(bss->networktype), le32toh(bss->privacy)); 1143 1144 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1145 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1146 if (__predict_false(pktlen > MCLBYTES)) 1147 return; 1148 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1149 if (__predict_false(m == NULL)) 1150 return; 1151 wh = mtod(m, struct ieee80211_frame *); 1152 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1153 IEEE80211_FC0_SUBTYPE_BEACON; 1154 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1155 USETW(wh->i_dur, 0); 1156 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr); 1157 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1158 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1159 *(uint16_t *)wh->i_seq = 0; 1160 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1161 1162 /* Finalize mbuf. */ 1163 m->m_pkthdr.len = m->m_len = pktlen; 1164 m->m_pkthdr.rcvif = ifp; 1165 /* Fix the channel. */ 1166 c = ieee80211_find_channel_byieee(ic, 1167 le32toh(bss->config.dsconfig), 1168 IEEE80211_CHAN_G); 1169 if (c) { 1170 ic->ic_curchan = c; 1171 ieee80211_radiotap_chan_change(ic); 1172 } 1173 /* XXX avoid a LOR */ 1174 RSU_UNLOCK(sc); 1175 ieee80211_input_all(ic, m, le32toh(bss->rssi), 0); 1176 RSU_LOCK(sc); 1177} 1178 1179static void 1180rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1181{ 1182 struct ifnet *ifp = sc->sc_ifp; 1183 struct ieee80211com *ic = ifp->if_l2com; 1184 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1185 struct ieee80211_node *ni = vap->iv_bss; 1186 struct r92s_event_join_bss *rsp; 1187 int res; 1188 1189 if (__predict_false(len < sizeof(*rsp))) 1190 return; 1191 rsp = (struct r92s_event_join_bss *)buf; 1192 res = (int)le32toh(rsp->join_res); 1193 1194 DPRINTF("Rx join BSS event len=%d res=%d\n", len, res); 1195 if (res <= 0) { 1196 RSU_UNLOCK(sc); 1197 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1198 RSU_LOCK(sc); 1199 return; 1200 } 1201 DPRINTF("associated with %s associd=%d\n", 1202 ether_sprintf(rsp->bss.macaddr), le32toh(rsp->associd)); 1203 ni->ni_associd = le32toh(rsp->associd) | 0xc000; 1204 RSU_UNLOCK(sc); 1205 ieee80211_new_state(vap, IEEE80211_S_RUN, 1206 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1207 RSU_LOCK(sc); 1208} 1209 1210static void 1211rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1212{ 1213 struct ifnet *ifp = sc->sc_ifp; 1214 struct ieee80211com *ic = ifp->if_l2com; 1215 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1216 1217 DPRINTFN(4, "Rx event code=%d len=%d\n", code, len); 1218 switch (code) { 1219 case R92S_EVT_SURVEY: 1220 if (vap->iv_state == IEEE80211_S_SCAN) 1221 rsu_event_survey(sc, buf, len); 1222 break; 1223 case R92S_EVT_SURVEY_DONE: 1224 DPRINTF("site survey pass %d done, found %d BSS\n", 1225 sc->scan_pass, le32toh(*(uint32_t *)buf)); 1226 if (vap->iv_state != IEEE80211_S_SCAN) 1227 break; /* Ignore if not scanning. */ 1228 if (sc->scan_pass == 0 && vap->iv_des_nssid != 0) { 1229 /* Schedule a directed scan for hidden APs. */ 1230 sc->scan_pass = 1; 1231 RSU_UNLOCK(sc); 1232 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1233 RSU_LOCK(sc); 1234 break; 1235 } 1236 sc->scan_pass = 0; 1237 break; 1238 case R92S_EVT_JOIN_BSS: 1239 if (vap->iv_state == IEEE80211_S_AUTH) 1240 rsu_event_join_bss(sc, buf, len); 1241 break; 1242 case R92S_EVT_DEL_STA: 1243 DPRINTF("disassociated from %s\n", ether_sprintf(buf)); 1244 if (vap->iv_state == IEEE80211_S_RUN && 1245 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1246 RSU_UNLOCK(sc); 1247 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1248 RSU_LOCK(sc); 1249 } 1250 break; 1251 case R92S_EVT_WPS_PBC: 1252 DPRINTF("WPS PBC pushed.\n"); 1253 break; 1254 case R92S_EVT_FWDBG: 1255 if (ifp->if_flags & IFF_DEBUG) { 1256 buf[60] = '\0'; 1257 printf("FWDBG: %s\n", (char *)buf); 1258 } 1259 break; 1260 } 1261} 1262 1263static void 1264rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1265{ 1266 struct r92s_fw_cmd_hdr *cmd; 1267 int cmdsz; 1268 1269 DPRINTFN(6, "Rx events len=%d\n", len); 1270 1271 /* Skip Rx status. */ 1272 buf += sizeof(struct r92s_rx_stat); 1273 len -= sizeof(struct r92s_rx_stat); 1274 1275 /* Process all events. */ 1276 for (;;) { 1277 /* Check that command header fits. */ 1278 if (__predict_false(len < sizeof(*cmd))) 1279 break; 1280 cmd = (struct r92s_fw_cmd_hdr *)buf; 1281 /* Check that command payload fits. */ 1282 cmdsz = le16toh(cmd->len); 1283 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1284 break; 1285 1286 /* Process firmware event. */ 1287 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1288 1289 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1290 break; 1291 buf += sizeof(*cmd) + cmdsz; 1292 len -= sizeof(*cmd) + cmdsz; 1293 } 1294} 1295 1296static int8_t 1297rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1298{ 1299 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1300 struct r92s_rx_phystat *phy; 1301 struct r92s_rx_cck *cck; 1302 uint8_t rpt; 1303 int8_t rssi; 1304 1305 if (rate <= 3) { 1306 cck = (struct r92s_rx_cck *)physt; 1307 rpt = (cck->agc_rpt >> 6) & 0x3; 1308 rssi = cck->agc_rpt & 0x3e; 1309 rssi = cckoff[rpt] - rssi; 1310 } else { /* OFDM/HT. */ 1311 phy = (struct r92s_rx_phystat *)physt; 1312 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1313 } 1314 return (rssi); 1315} 1316 1317static struct mbuf * 1318rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1319{ 1320 struct ifnet *ifp = sc->sc_ifp; 1321 struct ieee80211com *ic = ifp->if_l2com; 1322 struct ieee80211_frame *wh; 1323 struct r92s_rx_stat *stat; 1324 uint32_t rxdw0, rxdw3; 1325 struct mbuf *m; 1326 uint8_t rate; 1327 int infosz; 1328 1329 stat = (struct r92s_rx_stat *)buf; 1330 rxdw0 = le32toh(stat->rxdw0); 1331 rxdw3 = le32toh(stat->rxdw3); 1332 1333 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1334 ifp->if_ierrors++; 1335 return NULL; 1336 } 1337 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1338 ifp->if_ierrors++; 1339 return NULL; 1340 } 1341 1342 rate = MS(rxdw3, R92S_RXDW3_RATE); 1343 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1344 1345 /* Get RSSI from PHY status descriptor if present. */ 1346 if (infosz != 0) 1347 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1348 else 1349 *rssi = 0; 1350 1351 DPRINTFN(5, "Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1352 pktlen, rate, infosz, *rssi); 1353 1354 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1355 if (__predict_false(m == NULL)) { 1356 ifp->if_ierrors++; 1357 return NULL; 1358 } 1359 /* Finalize mbuf. */ 1360 m->m_pkthdr.rcvif = ifp; 1361 /* Hardware does Rx TCP checksum offload. */ 1362 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1363 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1364 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1365 } 1366 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1367 memcpy(mtod(m, uint8_t *), wh, pktlen); 1368 m->m_pkthdr.len = m->m_len = pktlen; 1369 1370 if (ieee80211_radiotap_active(ic)) { 1371 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1372 1373 /* Map HW rate index to 802.11 rate. */ 1374 tap->wr_flags = 2; 1375 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1376 switch (rate) { 1377 /* CCK. */ 1378 case 0: tap->wr_rate = 2; break; 1379 case 1: tap->wr_rate = 4; break; 1380 case 2: tap->wr_rate = 11; break; 1381 case 3: tap->wr_rate = 22; break; 1382 /* OFDM. */ 1383 case 4: tap->wr_rate = 12; break; 1384 case 5: tap->wr_rate = 18; break; 1385 case 6: tap->wr_rate = 24; break; 1386 case 7: tap->wr_rate = 36; break; 1387 case 8: tap->wr_rate = 48; break; 1388 case 9: tap->wr_rate = 72; break; 1389 case 10: tap->wr_rate = 96; break; 1390 case 11: tap->wr_rate = 108; break; 1391 } 1392 } else if (rate >= 12) { /* MCS0~15. */ 1393 /* Bit 7 set means HT MCS instead of rate. */ 1394 tap->wr_rate = 0x80 | (rate - 12); 1395 } 1396 tap->wr_dbm_antsignal = *rssi; 1397 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1398 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1399 } 1400 1401 return (m); 1402} 1403 1404static struct mbuf * 1405rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1406{ 1407 struct r92s_rx_stat *stat; 1408 uint32_t rxdw0; 1409 int totlen, pktlen, infosz, npkts; 1410 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1411 1412 /* Get the number of encapsulated frames. */ 1413 stat = (struct r92s_rx_stat *)buf; 1414 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1415 DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 1416 1417 /* Process all of them. */ 1418 while (npkts-- > 0) { 1419 if (__predict_false(len < sizeof(*stat))) 1420 break; 1421 stat = (struct r92s_rx_stat *)buf; 1422 rxdw0 = le32toh(stat->rxdw0); 1423 1424 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1425 if (__predict_false(pktlen == 0)) 1426 break; 1427 1428 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1429 1430 /* Make sure everything fits in xfer. */ 1431 totlen = sizeof(*stat) + infosz + pktlen; 1432 if (__predict_false(totlen > len)) 1433 break; 1434 1435 /* Process 802.11 frame. */ 1436 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1437 if (m0 == NULL) 1438 m0 = m; 1439 if (prevm == NULL) 1440 prevm = m; 1441 else { 1442 prevm->m_next = m; 1443 prevm = m; 1444 } 1445 /* Next chunk is 128-byte aligned. */ 1446 totlen = (totlen + 127) & ~127; 1447 buf += totlen; 1448 len -= totlen; 1449 } 1450 1451 return (m0); 1452} 1453 1454static struct mbuf * 1455rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1456{ 1457 struct rsu_softc *sc = data->sc; 1458 struct r92s_rx_stat *stat; 1459 int len; 1460 1461 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1462 1463 if (__predict_false(len < sizeof(*stat))) { 1464 DPRINTF("xfer too short %d\n", len); 1465 sc->sc_ifp->if_ierrors++; 1466 return (NULL); 1467 } 1468 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1469 stat = (struct r92s_rx_stat *)data->buf; 1470 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1471 rsu_rx_multi_event(sc, data->buf, len); 1472 /* No packets to process. */ 1473 return (NULL); 1474 } else 1475 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1476} 1477 1478static void 1479rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1480{ 1481 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1482 struct ifnet *ifp = sc->sc_ifp; 1483 struct ieee80211com *ic = ifp->if_l2com; 1484 struct ieee80211_frame *wh; 1485 struct ieee80211_node *ni; 1486 struct mbuf *m = NULL, *next; 1487 struct rsu_data *data; 1488 int rssi = 1; 1489 1490 RSU_ASSERT_LOCKED(sc); 1491 1492 switch (USB_GET_STATE(xfer)) { 1493 case USB_ST_TRANSFERRED: 1494 data = STAILQ_FIRST(&sc->sc_rx_active); 1495 if (data == NULL) 1496 goto tr_setup; 1497 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1498 m = rsu_rxeof(xfer, data, &rssi); 1499 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1500 /* FALLTHROUGH */ 1501 case USB_ST_SETUP: 1502tr_setup: 1503 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1504 if (data == NULL) { 1505 KASSERT(m == NULL, ("mbuf isn't NULL")); 1506 return; 1507 } 1508 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1509 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1510 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1511 usbd_xfer_max_len(xfer)); 1512 usbd_transfer_submit(xfer); 1513 /* 1514 * To avoid LOR we should unlock our private mutex here to call 1515 * ieee80211_input() because here is at the end of a USB 1516 * callback and safe to unlock. 1517 */ 1518 RSU_UNLOCK(sc); 1519 while (m != NULL) { 1520 next = m->m_next; 1521 m->m_next = NULL; 1522 wh = mtod(m, struct ieee80211_frame *); 1523 ni = ieee80211_find_rxnode(ic, 1524 (struct ieee80211_frame_min *)wh); 1525 if (ni != NULL) { 1526 (void)ieee80211_input(ni, m, rssi, 0); 1527 ieee80211_free_node(ni); 1528 } else 1529 (void)ieee80211_input_all(ic, m, rssi, 0); 1530 m = next; 1531 } 1532 RSU_LOCK(sc); 1533 break; 1534 default: 1535 /* needs it to the inactive queue due to a error. */ 1536 data = STAILQ_FIRST(&sc->sc_rx_active); 1537 if (data != NULL) { 1538 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1539 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1540 } 1541 if (error != USB_ERR_CANCELLED) { 1542 usbd_xfer_set_stall(xfer); 1543 ifp->if_ierrors++; 1544 goto tr_setup; 1545 } 1546 break; 1547 } 1548 1549} 1550 1551 1552static void 1553rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1554{ 1555 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1556 struct ifnet *ifp = sc->sc_ifp; 1557 struct mbuf *m; 1558 1559 RSU_ASSERT_LOCKED(sc); 1560 1561 /* 1562 * Do any tx complete callback. Note this must be done before releasing 1563 * the node reference. 1564 */ 1565 if (data->m) { 1566 m = data->m; 1567 if (m->m_flags & M_TXCB) { 1568 /* XXX status? */ 1569 ieee80211_process_callback(data->ni, m, 0); 1570 } 1571 m_freem(m); 1572 data->m = NULL; 1573 } 1574 if (data->ni) { 1575 ieee80211_free_node(data->ni); 1576 data->ni = NULL; 1577 } 1578 sc->sc_tx_timer = 0; 1579 ifp->if_opackets++; 1580 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1581} 1582 1583static void 1584rsu_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1585{ 1586 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1587 struct ifnet *ifp = sc->sc_ifp; 1588 struct rsu_data *data; 1589 1590 RSU_ASSERT_LOCKED(sc); 1591 1592 switch (USB_GET_STATE(xfer)) { 1593 case USB_ST_TRANSFERRED: 1594 data = STAILQ_FIRST(&sc->sc_tx_active); 1595 if (data == NULL) 1596 goto tr_setup; 1597 DPRINTF("transfer done %p\n", data); 1598 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1599 rsu_txeof(xfer, data); 1600 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1601 /* FALLTHROUGH */ 1602 case USB_ST_SETUP: 1603tr_setup: 1604 data = STAILQ_FIRST(&sc->sc_tx_pending); 1605 if (data == NULL) { 1606 DPRINTF("empty pending queue sc %p\n", sc); 1607 return; 1608 } 1609 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1610 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1611 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1612 DPRINTF("submitting transfer %p\n", data); 1613 usbd_transfer_submit(xfer); 1614 rsu_start_locked(ifp); 1615 break; 1616 default: 1617 data = STAILQ_FIRST(&sc->sc_tx_active); 1618 if (data == NULL) 1619 goto tr_setup; 1620 if (data->ni != NULL) { 1621 ieee80211_free_node(data->ni); 1622 data->ni = NULL; 1623 ifp->if_oerrors++; 1624 } 1625 if (error != USB_ERR_CANCELLED) { 1626 usbd_xfer_set_stall(xfer); 1627 goto tr_setup; 1628 } 1629 break; 1630 } 1631} 1632 1633static int 1634rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 1635 struct mbuf *m0, struct rsu_data *data) 1636{ 1637 struct ifnet *ifp = sc->sc_ifp; 1638 struct ieee80211com *ic = ifp->if_l2com; 1639 struct ieee80211vap *vap = ni->ni_vap; 1640 struct ieee80211_frame *wh; 1641 struct ieee80211_key *k = NULL; 1642 struct r92s_tx_desc *txd; 1643 struct usb_xfer *xfer; 1644 uint8_t type, tid = 0; 1645 int hasqos, xferlen; 1646 struct usb_xfer *rsu_pipes[4] = { 1647 sc->sc_xfer[RSU_BULK_TX_BE], 1648 sc->sc_xfer[RSU_BULK_TX_BK], 1649 sc->sc_xfer[RSU_BULK_TX_VI], 1650 sc->sc_xfer[RSU_BULK_TX_VO] 1651 }; 1652 1653 RSU_ASSERT_LOCKED(sc); 1654 1655 wh = mtod(m0, struct ieee80211_frame *); 1656 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1657 1658 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1659 k = ieee80211_crypto_encap(ni, m0); 1660 if (k == NULL) { 1661 device_printf(sc->sc_dev, 1662 "ieee80211_crypto_encap returns NULL.\n"); 1663 /* XXX we don't expect the fragmented frames */ 1664 m_freem(m0); 1665 return (ENOBUFS); 1666 } 1667 wh = mtod(m0, struct ieee80211_frame *); 1668 } 1669 switch (type) { 1670 case IEEE80211_FC0_TYPE_CTL: 1671 case IEEE80211_FC0_TYPE_MGT: 1672 xfer = sc->sc_xfer[RSU_BULK_TX_VO]; 1673 break; 1674 default: 1675 KASSERT(M_WME_GETAC(m0) < 4, 1676 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1677 xfer = rsu_pipes[M_WME_GETAC(m0)]; 1678 break; 1679 } 1680 hasqos = 0; 1681 1682 /* Fill Tx descriptor. */ 1683 txd = (struct r92s_tx_desc *)data->buf; 1684 memset(txd, 0, sizeof(*txd)); 1685 1686 txd->txdw0 |= htole32( 1687 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 1688 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1689 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1690 1691 txd->txdw1 |= htole32( 1692 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | 1693 SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_BE)); 1694 if (!hasqos) 1695 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 1696#ifdef notyet 1697 if (k != NULL) { 1698 switch (k->wk_cipher->ic_cipher) { 1699 case IEEE80211_CIPHER_WEP: 1700 cipher = R92S_TXDW1_CIPHER_WEP; 1701 break; 1702 case IEEE80211_CIPHER_TKIP: 1703 cipher = R92S_TXDW1_CIPHER_TKIP; 1704 break; 1705 case IEEE80211_CIPHER_AES_CCM: 1706 cipher = R92S_TXDW1_CIPHER_AES; 1707 break; 1708 default: 1709 cipher = R92S_TXDW1_CIPHER_NONE; 1710 } 1711 txd->txdw1 |= htole32( 1712 SM(R92S_TXDW1_CIPHER, cipher) | 1713 SM(R92S_TXDW1_KEYIDX, k->k_id)); 1714 } 1715#endif 1716 txd->txdw2 |= htole32(R92S_TXDW2_BK); 1717 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1718 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 1719 /* 1720 * Firmware will use and increment the sequence number for the 1721 * specified TID. 1722 */ 1723 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, tid)); 1724 1725 if (ieee80211_radiotap_active_vap(vap)) { 1726 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 1727 1728 tap->wt_flags = 0; 1729 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1730 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1731 ieee80211_radiotap_tx(vap, m0); 1732 } 1733 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 1734 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 1735 1736 data->buflen = xferlen; 1737 data->ni = ni; 1738 data->m = m0; 1739 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1740 usbd_transfer_start(xfer); 1741 1742 return (0); 1743} 1744 1745static void 1746rsu_start(struct ifnet *ifp) 1747{ 1748 struct rsu_softc *sc = ifp->if_softc; 1749 1750 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1751 return; 1752 1753 RSU_LOCK(sc); 1754 rsu_start_locked(ifp); 1755 RSU_UNLOCK(sc); 1756} 1757 1758static void 1759rsu_start_locked(struct ifnet *ifp) 1760{ 1761 struct rsu_softc *sc = ifp->if_softc; 1762 struct ieee80211_node *ni; 1763 struct mbuf *m; 1764 struct rsu_data *bf; 1765 1766 RSU_ASSERT_LOCKED(sc); 1767 1768 for (;;) { 1769 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1770 if (m == NULL) 1771 break; 1772 bf = rsu_getbuf(sc); 1773 if (bf == NULL) { 1774 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1775 break; 1776 } 1777 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1778 m->m_pkthdr.rcvif = NULL; 1779 1780 if (rsu_tx_start(sc, ni, m, bf) != 0) { 1781 ifp->if_oerrors++; 1782 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1783 ieee80211_free_node(ni); 1784 break; 1785 } 1786 sc->sc_tx_timer = 5; 1787 callout_reset(&sc->sc_watchdog_ch, hz, rsu_watchdog, sc); 1788 } 1789} 1790 1791static void 1792rsu_watchdog(void *arg) 1793{ 1794 struct rsu_softc *sc = arg; 1795 struct ifnet *ifp = sc->sc_ifp; 1796 1797 if (sc->sc_tx_timer > 0) { 1798 if (--sc->sc_tx_timer == 0) { 1799 device_printf(sc->sc_dev, "device timeout\n"); 1800 /* rsu_init(ifp); XXX needs a process context! */ 1801 ifp->if_oerrors++; 1802 return; 1803 } 1804 callout_reset(&sc->sc_watchdog_ch, hz, rsu_watchdog, sc); 1805 } 1806} 1807 1808static int 1809rsu_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1810{ 1811 struct ieee80211com *ic = ifp->if_l2com; 1812 struct ifreq *ifr = (struct ifreq *) data; 1813 int error = 0, startall = 0; 1814 1815 switch (cmd) { 1816 case SIOCSIFFLAGS: 1817 if (ifp->if_flags & IFF_UP) { 1818 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1819 rsu_init(ifp->if_softc); 1820 startall = 1; 1821 } 1822 } else { 1823 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1824 rsu_stop(ifp, 1); 1825 } 1826 if (startall) 1827 ieee80211_start_all(ic); 1828 break; 1829 case SIOCGIFMEDIA: 1830 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1831 break; 1832 case SIOCGIFADDR: 1833 error = ether_ioctl(ifp, cmd, data); 1834 break; 1835 default: 1836 error = EINVAL; 1837 break; 1838 } 1839 1840 return (error); 1841} 1842 1843/* 1844 * Power on sequence for A-cut adapters. 1845 */ 1846static void 1847rsu_power_on_acut(struct rsu_softc *sc) 1848{ 1849 uint32_t reg; 1850 1851 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1852 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1853 1854 /* Enable AFE macro block's bandgap and Mbias. */ 1855 rsu_write_1(sc, R92S_AFE_MISC, 1856 rsu_read_1(sc, R92S_AFE_MISC) | 1857 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 1858 /* Enable LDOA15 block. */ 1859 rsu_write_1(sc, R92S_LDOA15_CTRL, 1860 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1861 1862 rsu_write_1(sc, R92S_SPS1_CTRL, 1863 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 1864 usb_pause_mtx(&sc->sc_mtx, 2 * hz); 1865 /* Enable switch regulator block. */ 1866 rsu_write_1(sc, R92S_SPS1_CTRL, 1867 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 1868 1869 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 1870 1871 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1872 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1873 1874 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1875 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1876 1877 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1878 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 1879 1880 /* Enable AFE clock. */ 1881 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1882 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1883 /* Enable AFE PLL macro block. */ 1884 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 1885 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 1886 /* Attach AFE PLL to MACTOP/BB. */ 1887 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1888 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1889 1890 /* Switch to 40MHz clock instead of 80MHz. */ 1891 rsu_write_2(sc, R92S_SYS_CLKR, 1892 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 1893 1894 /* Enable MAC clock. */ 1895 rsu_write_2(sc, R92S_SYS_CLKR, 1896 rsu_read_2(sc, R92S_SYS_CLKR) | 1897 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 1898 1899 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 1900 1901 /* Enable digital core and IOREG R/W. */ 1902 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1903 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 1904 1905 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1906 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 1907 1908 /* Switch the control path to firmware. */ 1909 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1910 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 1911 rsu_write_2(sc, R92S_SYS_CLKR, reg); 1912 1913 rsu_write_2(sc, R92S_CR, 0x37fc); 1914 1915 /* Fix USB RX FIFO issue. */ 1916 rsu_write_1(sc, 0xfe5c, 1917 rsu_read_1(sc, 0xfe5c) | 0x80); 1918 rsu_write_1(sc, 0x00ab, 1919 rsu_read_1(sc, 0x00ab) | 0xc0); 1920 1921 rsu_write_1(sc, R92S_SYS_CLKR, 1922 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 1923} 1924 1925/* 1926 * Power on sequence for B-cut and C-cut adapters. 1927 */ 1928static void 1929rsu_power_on_bcut(struct rsu_softc *sc) 1930{ 1931 uint32_t reg; 1932 int ntries; 1933 1934 /* Prevent eFuse leakage. */ 1935 rsu_write_1(sc, 0x37, 0xb0); 1936 usb_pause_mtx(&sc->sc_mtx, 10); 1937 rsu_write_1(sc, 0x37, 0x30); 1938 1939 /* Switch the control path to hardware. */ 1940 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1941 if (reg & R92S_FWHW_SEL) { 1942 rsu_write_2(sc, R92S_SYS_CLKR, 1943 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 1944 } 1945 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1946 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 1947 DELAY(1000); 1948 1949 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1950 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1951 1952 reg = rsu_read_1(sc, R92S_AFE_MISC); 1953 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 1954 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 1955 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 1956 1957 /* Enable PLL. */ 1958 rsu_write_1(sc, R92S_LDOA15_CTRL, 1959 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1960 1961 rsu_write_1(sc, R92S_LDOV12D_CTRL, 1962 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 1963 1964 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1965 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1966 1967 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1968 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1969 1970 /* Support 64KB IMEM. */ 1971 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1972 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 1973 1974 /* Enable AFE clock. */ 1975 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1976 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1977 /* Enable AFE PLL macro block. */ 1978 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 1979 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1980 DELAY(500); 1981 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 1982 DELAY(500); 1983 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1984 DELAY(500); 1985 1986 /* Attach AFE PLL to MACTOP/BB. */ 1987 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1988 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1989 1990 /* Switch to 40MHz clock. */ 1991 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 1992 /* Disable CPU clock and 80MHz SSC. */ 1993 rsu_write_1(sc, R92S_SYS_CLKR, 1994 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 1995 /* Enable MAC clock. */ 1996 rsu_write_2(sc, R92S_SYS_CLKR, 1997 rsu_read_2(sc, R92S_SYS_CLKR) | 1998 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 1999 2000 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2001 2002 /* Enable digital core and IOREG R/W. */ 2003 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2004 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2005 2006 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2007 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2008 2009 /* Switch the control path to firmware. */ 2010 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2011 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2012 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2013 2014 rsu_write_2(sc, R92S_CR, 0x37fc); 2015 2016 /* Fix USB RX FIFO issue. */ 2017 rsu_write_1(sc, 0xfe5c, 2018 rsu_read_1(sc, 0xfe5c) | 0x80); 2019 2020 rsu_write_1(sc, R92S_SYS_CLKR, 2021 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2022 2023 rsu_write_1(sc, 0xfe1c, 0x80); 2024 2025 /* Make sure TxDMA is ready to download firmware. */ 2026 for (ntries = 0; ntries < 20; ntries++) { 2027 reg = rsu_read_1(sc, R92S_TCR); 2028 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2029 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2030 break; 2031 DELAY(5); 2032 } 2033 if (ntries == 20) { 2034 DPRINTF("TxDMA is not ready\n"); 2035 /* Reset TxDMA. */ 2036 reg = rsu_read_1(sc, R92S_CR); 2037 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2038 DELAY(2); 2039 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2040 } 2041} 2042 2043static void 2044rsu_power_off(struct rsu_softc *sc) 2045{ 2046 /* Turn RF off. */ 2047 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2048 usb_pause_mtx(&sc->sc_mtx, 5); 2049 2050 /* Turn MAC off. */ 2051 /* Switch control path. */ 2052 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2053 /* Reset MACTOP. */ 2054 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2055 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2056 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2057 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2058 2059 /* Disable AFE PLL. */ 2060 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2061 /* Disable A15V. */ 2062 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2063 /* Disable eFuse 1.2V. */ 2064 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2065 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2066 /* Enable AFE macro block's bandgap and Mbias. */ 2067 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2068 /* Disable 1.6V LDO. */ 2069 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2070 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2071} 2072 2073static int 2074rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2075{ 2076 struct rsu_data *data; 2077 struct r92s_tx_desc *txd; 2078 int mlen; 2079 2080 while (len > 0) { 2081 data = rsu_getbuf(sc); 2082 if (data == NULL) 2083 return (ENOMEM); 2084 txd = (struct r92s_tx_desc *)data->buf; 2085 memset(txd, 0, sizeof(*txd)); 2086 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2087 /* Last chunk. */ 2088 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2089 mlen = len; 2090 } else 2091 mlen = RSU_TXBUFSZ - sizeof(*txd); 2092 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2093 memcpy(&txd[1], buf, mlen); 2094 data->buflen = sizeof(*txd) + mlen; 2095 DPRINTF("starting transfer %p\n", data); 2096 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2097 buf += mlen; 2098 len -= mlen; 2099 } 2100 usbd_transfer_start(sc->sc_xfer[RSU_BULK_TX_VO]); 2101 2102 return (0); 2103} 2104 2105static int 2106rsu_load_firmware(struct rsu_softc *sc) 2107{ 2108 const struct r92s_fw_hdr *hdr; 2109 struct r92s_fw_priv *dmem; 2110 const uint8_t *imem, *emem; 2111 int imemsz, ememsz; 2112 const struct firmware *fw; 2113 size_t size; 2114 uint32_t reg; 2115 int ntries, error; 2116 2117 RSU_UNLOCK(sc); 2118 /* Read firmware image from the filesystem. */ 2119 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2120 device_printf(sc->sc_dev, 2121 "%s: failed load firmware of file rsu-rtl8712fw\n", 2122 __func__); 2123 RSU_LOCK(sc); 2124 return (ENXIO); 2125 } 2126 RSU_LOCK(sc); 2127 size = fw->datasize; 2128 if (size < sizeof(*hdr)) { 2129 device_printf(sc->sc_dev, "firmware too short\n"); 2130 error = EINVAL; 2131 goto fail; 2132 } 2133 hdr = (const struct r92s_fw_hdr *)fw->data; 2134 if (hdr->signature != htole16(0x8712) && 2135 hdr->signature != htole16(0x8192)) { 2136 device_printf(sc->sc_dev, 2137 "invalid firmware signature 0x%x\n", 2138 le16toh(hdr->signature)); 2139 error = EINVAL; 2140 goto fail; 2141 } 2142 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2143 hdr->month, hdr->day, hdr->hour, hdr->minute); 2144 2145 /* Make sure that driver and firmware are in sync. */ 2146 if (hdr->privsz != htole32(sizeof(*dmem))) { 2147 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2148 error = EINVAL; 2149 goto fail; 2150 } 2151 /* Get FW sections sizes. */ 2152 imemsz = le32toh(hdr->imemsz); 2153 ememsz = le32toh(hdr->sramsz); 2154 /* Check that all FW sections fit in image. */ 2155 if (size < sizeof(*hdr) + imemsz + ememsz) { 2156 device_printf(sc->sc_dev, "firmware too short\n"); 2157 error = EINVAL; 2158 goto fail; 2159 } 2160 imem = (const uint8_t *)&hdr[1]; 2161 emem = imem + imemsz; 2162 2163 /* Load IMEM section. */ 2164 error = rsu_fw_loadsection(sc, imem, imemsz); 2165 if (error != 0) { 2166 device_printf(sc->sc_dev, 2167 "could not load firmware section %s\n", "IMEM"); 2168 goto fail; 2169 } 2170 /* Wait for load to complete. */ 2171 for (ntries = 0; ntries < 10; ntries++) { 2172 usb_pause_mtx(&sc->sc_mtx, 10); 2173 reg = rsu_read_2(sc, R92S_TCR); 2174 if (reg & R92S_TCR_IMEM_CODE_DONE) 2175 break; 2176 } 2177 if (ntries == 10 || !(reg & R92S_TCR_IMEM_CHK_RPT)) { 2178 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2179 "IMEM"); 2180 error = ETIMEDOUT; 2181 goto fail; 2182 } 2183 2184 /* Load EMEM section. */ 2185 error = rsu_fw_loadsection(sc, emem, ememsz); 2186 if (error != 0) { 2187 device_printf(sc->sc_dev, 2188 "could not load firmware section %s\n", "EMEM"); 2189 goto fail; 2190 } 2191 /* Wait for load to complete. */ 2192 for (ntries = 0; ntries < 10; ntries++) { 2193 usb_pause_mtx(&sc->sc_mtx, 10); 2194 reg = rsu_read_2(sc, R92S_TCR); 2195 if (reg & R92S_TCR_EMEM_CODE_DONE) 2196 break; 2197 } 2198 if (ntries == 10 || !(reg & R92S_TCR_EMEM_CHK_RPT)) { 2199 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2200 "EMEM"); 2201 error = ETIMEDOUT; 2202 goto fail; 2203 } 2204 2205 /* Enable CPU. */ 2206 rsu_write_1(sc, R92S_SYS_CLKR, 2207 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2208 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2209 device_printf(sc->sc_dev, "could not enable system clock\n"); 2210 error = EIO; 2211 goto fail; 2212 } 2213 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2214 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2215 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2216 device_printf(sc->sc_dev, 2217 "could not enable microcontroller\n"); 2218 error = EIO; 2219 goto fail; 2220 } 2221 /* Wait for CPU to initialize. */ 2222 for (ntries = 0; ntries < 100; ntries++) { 2223 if (rsu_read_2(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2224 break; 2225 DELAY(1000); 2226 } 2227 if (ntries == 100) { 2228 device_printf(sc->sc_dev, 2229 "timeout waiting for microcontroller\n"); 2230 error = ETIMEDOUT; 2231 goto fail; 2232 } 2233 2234 /* Update DMEM section before loading. */ 2235 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2236 memset(dmem, 0, sizeof(*dmem)); 2237 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2238 dmem->nendpoints = sc->npipes; 2239 dmem->rf_config = 0x12; /* 1T2R */ 2240 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2241 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2242#ifdef notyet 2243 dmem->bw40_en = (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) != 0; 2244#endif 2245 dmem->turbo_mode = 1; 2246 /* Load DMEM section. */ 2247 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2248 if (error != 0) { 2249 device_printf(sc->sc_dev, 2250 "could not load firmware section %s\n", "DMEM"); 2251 goto fail; 2252 } 2253 /* Wait for load to complete. */ 2254 for (ntries = 0; ntries < 100; ntries++) { 2255 if (rsu_read_2(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2256 break; 2257 DELAY(1000); 2258 } 2259 if (ntries == 100) { 2260 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2261 "DMEM"); 2262 error = ETIMEDOUT; 2263 goto fail; 2264 } 2265 /* Wait for firmware readiness. */ 2266 for (ntries = 0; ntries < 60; ntries++) { 2267 if (!(rsu_read_2(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2268 break; 2269 DELAY(1000); 2270 } 2271 if (ntries == 60) { 2272 device_printf(sc->sc_dev, 2273 "timeout waiting for firmware readiness\n"); 2274 error = ETIMEDOUT; 2275 goto fail; 2276 } 2277 fail: 2278 firmware_put(fw, FIRMWARE_UNLOAD); 2279 return (error); 2280} 2281 2282 2283static int 2284rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2285 const struct ieee80211_bpf_params *params) 2286{ 2287 struct ieee80211com *ic = ni->ni_ic; 2288 struct ifnet *ifp = ic->ic_ifp; 2289 struct rsu_softc *sc = ifp->if_softc; 2290 struct rsu_data *bf; 2291 2292 /* prevent management frames from being sent if we're not ready */ 2293 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2294 m_freem(m); 2295 ieee80211_free_node(ni); 2296 return (ENETDOWN); 2297 } 2298 RSU_LOCK(sc); 2299 bf = rsu_getbuf(sc); 2300 if (bf == NULL) { 2301 ieee80211_free_node(ni); 2302 m_freem(m); 2303 RSU_UNLOCK(sc); 2304 return (ENOBUFS); 2305 } 2306 ifp->if_opackets++; 2307 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2308 ieee80211_free_node(ni); 2309 ifp->if_oerrors++; 2310 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2311 RSU_UNLOCK(sc); 2312 return (EIO); 2313 } 2314 RSU_UNLOCK(sc); 2315 sc->sc_tx_timer = 5; 2316 2317 return (0); 2318} 2319 2320static void 2321rsu_init(void *arg) 2322{ 2323 struct rsu_softc *sc = arg; 2324 2325 RSU_LOCK(sc); 2326 rsu_init_locked(arg); 2327 RSU_UNLOCK(sc); 2328} 2329 2330static void 2331rsu_init_locked(struct rsu_softc *sc) 2332{ 2333 struct ifnet *ifp = sc->sc_ifp; 2334 struct r92s_set_pwr_mode cmd; 2335 int error; 2336 2337 /* Init host async commands ring. */ 2338 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2339 2340 /* Allocate Tx/Rx buffers. */ 2341 error = rsu_alloc_rx_list(sc); 2342 if (error != 0) { 2343 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 2344 return; 2345 } 2346 error = rsu_alloc_tx_list(sc); 2347 if (error != 0) { 2348 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 2349 rsu_free_rx_list(sc); 2350 return; 2351 } 2352 /* Power on adapter. */ 2353 if (sc->cut == 1) 2354 rsu_power_on_acut(sc); 2355 else 2356 rsu_power_on_bcut(sc); 2357 /* Load firmware. */ 2358 error = rsu_load_firmware(sc); 2359 if (error != 0) 2360 goto fail; 2361 2362 /* Enable Rx TCP checksum offload. */ 2363 rsu_write_4(sc, R92S_RCR, 2364 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2365 /* Append PHY status. */ 2366 rsu_write_4(sc, R92S_RCR, 2367 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2368 2369 rsu_write_4(sc, R92S_CR, 2370 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2371 2372 /* Use 128 bytes pages. */ 2373 rsu_write_1(sc, 0x00b5, 2374 rsu_read_1(sc, 0x00b5) | 0x01); 2375 /* Enable USB Rx aggregation. */ 2376 rsu_write_1(sc, 0x00bd, 2377 rsu_read_1(sc, 0x00bd) | 0x80); 2378 /* Set USB Rx aggregation threshold. */ 2379 rsu_write_1(sc, 0x00d9, 0x01); 2380 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2381 rsu_write_1(sc, 0xfe5b, 0x04); 2382 /* Fix USB Rx FIFO issue. */ 2383 rsu_write_1(sc, 0xfe5c, 2384 rsu_read_1(sc, 0xfe5c) | 0x80); 2385 2386 /* Set MAC address. */ 2387 rsu_write_region_1(sc, R92S_MACID, IF_LLADDR(ifp), 2388 IEEE80211_ADDR_LEN); 2389 2390 /* NB: it really takes that long for firmware to boot. */ 2391 usb_pause_mtx(&sc->sc_mtx, 1500); 2392 2393 DPRINTF("setting MAC address to %s\n", ether_sprintf(IF_LLADDR(ifp))); 2394 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, IF_LLADDR(ifp), 2395 IEEE80211_ADDR_LEN); 2396 if (error != 0) { 2397 device_printf(sc->sc_dev, "could not set MAC address\n"); 2398 goto fail; 2399 } 2400 2401 rsu_write_1(sc, R92S_USB_HRPWM, 2402 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 2403 2404 memset(&cmd, 0, sizeof(cmd)); 2405 cmd.mode = R92S_PS_MODE_ACTIVE; 2406 DPRINTF("setting ps mode to %d\n", cmd.mode); 2407 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 2408 if (error != 0) { 2409 device_printf(sc->sc_dev, "could not set PS mode\n"); 2410 goto fail; 2411 } 2412 2413#if 0 2414 if (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) { 2415 /* Enable 40MHz mode. */ 2416 error = rsu_fw_iocmd(sc, 2417 SM(R92S_IOCMD_CLASS, 0xf4) | 2418 SM(R92S_IOCMD_INDEX, 0x00) | 2419 SM(R92S_IOCMD_VALUE, 0x0007)); 2420 if (error != 0) { 2421 device_printf(sc->sc_dev, 2422 "could not enable 40MHz mode\n"); 2423 goto fail; 2424 } 2425 } 2426 2427 /* Set default channel. */ 2428 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2429#endif 2430 sc->scan_pass = 0; 2431 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2432 2433 /* We're ready to go. */ 2434 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2435 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2436 2437 callout_reset(&sc->sc_watchdog_ch, hz, rsu_watchdog, sc); 2438 2439 return; 2440fail: 2441 rsu_free_rx_list(sc); 2442 rsu_free_tx_list(sc); 2443 return; 2444} 2445 2446static void 2447rsu_stop(struct ifnet *ifp, int disable) 2448{ 2449 struct rsu_softc *sc = ifp->if_softc; 2450 2451 RSU_LOCK(sc); 2452 rsu_stop_locked(ifp, disable); 2453 RSU_UNLOCK(sc); 2454} 2455 2456static void 2457rsu_stop_locked(struct ifnet *ifp, int disable __unused) 2458{ 2459 struct rsu_softc *sc = ifp->if_softc; 2460 int i; 2461 2462 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2463 callout_stop(&sc->sc_watchdog_ch); 2464 sc->sc_calibrating = 0; 2465 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2466 2467 /* Power off adapter. */ 2468 rsu_power_off(sc); 2469 2470 for (i = 0; i < RSU_N_TRANSFER; i++) 2471 usbd_transfer_stop(sc->sc_xfer[i]); 2472} 2473 2474