if_rsu.c revision 288320
1/*	$OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $	*/
2
3/*-
4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18#include <sys/cdefs.h>
19__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_rsu.c 288320 2015-09-28 01:16:44Z adrian $");
20
21/*
22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU.
23 *
24 * TODO:
25 *   o h/w crypto
26 *   o hostap / ibss / mesh
27 *   o sensible RSSI levels
28 *   o power-save operation
29 */
30
31#include "opt_wlan.h"
32
33#include <sys/param.h>
34#include <sys/endian.h>
35#include <sys/sockio.h>
36#include <sys/mbuf.h>
37#include <sys/kernel.h>
38#include <sys/socket.h>
39#include <sys/systm.h>
40#include <sys/conf.h>
41#include <sys/bus.h>
42#include <sys/rman.h>
43#include <sys/firmware.h>
44#include <sys/module.h>
45
46#include <machine/bus.h>
47#include <machine/resource.h>
48
49#include <net/bpf.h>
50#include <net/if.h>
51#include <net/if_var.h>
52#include <net/if_arp.h>
53#include <net/if_dl.h>
54#include <net/if_media.h>
55#include <net/if_types.h>
56
57#include <netinet/in.h>
58#include <netinet/in_systm.h>
59#include <netinet/in_var.h>
60#include <netinet/if_ether.h>
61#include <netinet/ip.h>
62
63#include <net80211/ieee80211_var.h>
64#include <net80211/ieee80211_regdomain.h>
65#include <net80211/ieee80211_radiotap.h>
66
67#include <dev/usb/usb.h>
68#include <dev/usb/usbdi.h>
69#include "usbdevs.h"
70
71#define USB_DEBUG_VAR rsu_debug
72#include <dev/usb/usb_debug.h>
73
74#include <dev/usb/wlan/if_rsureg.h>
75
76#ifdef USB_DEBUG
77static int rsu_debug = 0;
78SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu");
79SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0,
80    "Debug level");
81#define	RSU_DPRINTF(_sc, _flg, ...)					\
82	do								\
83		if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \
84			device_printf((_sc)->sc_dev, __VA_ARGS__);	\
85	while (0)
86#else
87#define	RSU_DPRINTF(_sc, _flg, ...)
88#endif
89
90static int rsu_enable_11n = 1;
91TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n);
92
93#define	RSU_DEBUG_ANY		0xffffffff
94#define	RSU_DEBUG_TX		0x00000001
95#define	RSU_DEBUG_RX		0x00000002
96#define	RSU_DEBUG_RESET		0x00000004
97#define	RSU_DEBUG_CALIB		0x00000008
98#define	RSU_DEBUG_STATE		0x00000010
99#define	RSU_DEBUG_SCAN		0x00000020
100#define	RSU_DEBUG_FWCMD		0x00000040
101#define	RSU_DEBUG_TXDONE	0x00000080
102#define	RSU_DEBUG_FW		0x00000100
103#define	RSU_DEBUG_FWDBG		0x00000200
104#define	RSU_DEBUG_AMPDU		0x00000400
105
106static const STRUCT_USB_HOST_ID rsu_devs[] = {
107#define	RSU_HT_NOT_SUPPORTED 0
108#define	RSU_HT_SUPPORTED 1
109#define RSU_DEV_HT(v,p)  { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \
110				   RSU_HT_SUPPORTED) }
111#define RSU_DEV(v,p)     { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \
112				   RSU_HT_NOT_SUPPORTED) }
113	RSU_DEV(ASUS,			RTL8192SU),
114	RSU_DEV(AZUREWAVE,		RTL8192SU_4),
115	RSU_DEV_HT(ACCTON,		RTL8192SU),
116	RSU_DEV_HT(ASUS,		USBN10),
117	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_1),
118	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_2),
119	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_3),
120	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_5),
121	RSU_DEV_HT(BELKIN,		RTL8192SU_1),
122	RSU_DEV_HT(BELKIN,		RTL8192SU_2),
123	RSU_DEV_HT(BELKIN,		RTL8192SU_3),
124	RSU_DEV_HT(CONCEPTRONIC2,	RTL8192SU_1),
125	RSU_DEV_HT(CONCEPTRONIC2,	RTL8192SU_2),
126	RSU_DEV_HT(CONCEPTRONIC2,	RTL8192SU_3),
127	RSU_DEV_HT(COREGA,		RTL8192SU),
128	RSU_DEV_HT(DLINK2,		DWA131A1),
129	RSU_DEV_HT(DLINK2,		RTL8192SU_1),
130	RSU_DEV_HT(DLINK2,		RTL8192SU_2),
131	RSU_DEV_HT(EDIMAX,		RTL8192SU_1),
132	RSU_DEV_HT(EDIMAX,		RTL8192SU_2),
133	RSU_DEV_HT(EDIMAX,		EW7622UMN),
134	RSU_DEV_HT(GUILLEMOT,		HWGUN54),
135	RSU_DEV_HT(GUILLEMOT,		HWNUM300),
136	RSU_DEV_HT(HAWKING,		RTL8192SU_1),
137	RSU_DEV_HT(HAWKING,		RTL8192SU_2),
138	RSU_DEV_HT(PLANEX2,		GWUSNANO),
139	RSU_DEV_HT(REALTEK,		RTL8171),
140	RSU_DEV_HT(REALTEK,		RTL8172),
141	RSU_DEV_HT(REALTEK,		RTL8173),
142	RSU_DEV_HT(REALTEK,		RTL8174),
143	RSU_DEV_HT(REALTEK,		RTL8192SU),
144	RSU_DEV_HT(REALTEK,		RTL8712),
145	RSU_DEV_HT(REALTEK,		RTL8713),
146	RSU_DEV_HT(SENAO,		RTL8192SU_1),
147	RSU_DEV_HT(SENAO,		RTL8192SU_2),
148	RSU_DEV_HT(SITECOMEU,		WL349V1),
149	RSU_DEV_HT(SITECOMEU,		WL353),
150	RSU_DEV_HT(SWEEX2,		LW154),
151	RSU_DEV_HT(TRENDNET,		TEW646UBH),
152#undef RSU_DEV_HT
153#undef RSU_DEV
154};
155
156static device_probe_t   rsu_match;
157static device_attach_t  rsu_attach;
158static device_detach_t  rsu_detach;
159static usb_callback_t   rsu_bulk_tx_callback_be_bk;
160static usb_callback_t   rsu_bulk_tx_callback_vi_vo;
161static usb_callback_t   rsu_bulk_tx_callback_h2c;
162static usb_callback_t   rsu_bulk_rx_callback;
163static usb_error_t	rsu_do_request(struct rsu_softc *,
164			    struct usb_device_request *, void *);
165static struct ieee80211vap *
166		rsu_vap_create(struct ieee80211com *, const char name[],
167		    int, enum ieee80211_opmode, int, const uint8_t bssid[],
168		    const uint8_t mac[]);
169static void	rsu_vap_delete(struct ieee80211vap *);
170static void	rsu_scan_start(struct ieee80211com *);
171static void	rsu_scan_end(struct ieee80211com *);
172static void	rsu_set_channel(struct ieee80211com *);
173static void	rsu_update_mcast(struct ieee80211com *);
174static int	rsu_alloc_rx_list(struct rsu_softc *);
175static void	rsu_free_rx_list(struct rsu_softc *);
176static int	rsu_alloc_tx_list(struct rsu_softc *);
177static void	rsu_free_tx_list(struct rsu_softc *);
178static void	rsu_free_list(struct rsu_softc *, struct rsu_data [], int);
179static struct rsu_data *_rsu_getbuf(struct rsu_softc *);
180static struct rsu_data *rsu_getbuf(struct rsu_softc *);
181static void	rsu_freebuf(struct rsu_softc *, struct rsu_data *);
182static int	rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *,
183		    int);
184static void	rsu_write_1(struct rsu_softc *, uint16_t, uint8_t);
185static void	rsu_write_2(struct rsu_softc *, uint16_t, uint16_t);
186static void	rsu_write_4(struct rsu_softc *, uint16_t, uint32_t);
187static int	rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *,
188		    int);
189static uint8_t	rsu_read_1(struct rsu_softc *, uint16_t);
190static uint16_t	rsu_read_2(struct rsu_softc *, uint16_t);
191static uint32_t	rsu_read_4(struct rsu_softc *, uint16_t);
192static int	rsu_fw_iocmd(struct rsu_softc *, uint32_t);
193static uint8_t	rsu_efuse_read_1(struct rsu_softc *, uint16_t);
194static int	rsu_read_rom(struct rsu_softc *);
195static int	rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int);
196static void	rsu_calib_task(void *, int);
197static void	rsu_tx_task(void *, int);
198static int	rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199#ifdef notyet
200static void	rsu_set_key(struct rsu_softc *, const struct ieee80211_key *);
201static void	rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *);
202#endif
203static int	rsu_site_survey(struct rsu_softc *, struct ieee80211vap *);
204static int	rsu_join_bss(struct rsu_softc *, struct ieee80211_node *);
205static int	rsu_disconnect(struct rsu_softc *);
206static void	rsu_event_survey(struct rsu_softc *, uint8_t *, int);
207static void	rsu_event_join_bss(struct rsu_softc *, uint8_t *, int);
208static void	rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int);
209static void	rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int);
210static int8_t	rsu_get_rssi(struct rsu_softc *, int, void *);
211static struct mbuf *
212		rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *);
213static struct mbuf *
214		rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *);
215static struct mbuf *
216		rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *);
217static void	rsu_txeof(struct usb_xfer *, struct rsu_data *);
218static int	rsu_raw_xmit(struct ieee80211_node *, struct mbuf *,
219		    const struct ieee80211_bpf_params *);
220static void	rsu_init(struct rsu_softc *);
221static int	rsu_tx_start(struct rsu_softc *, struct ieee80211_node *,
222		    struct mbuf *, struct rsu_data *);
223static int	rsu_transmit(struct ieee80211com *, struct mbuf *);
224static void	rsu_start(struct rsu_softc *);
225static void	_rsu_start(struct rsu_softc *);
226static void	rsu_parent(struct ieee80211com *);
227static void	rsu_stop(struct rsu_softc *);
228static void	rsu_ms_delay(struct rsu_softc *, int);
229
230static device_method_t rsu_methods[] = {
231	DEVMETHOD(device_probe,		rsu_match),
232	DEVMETHOD(device_attach,	rsu_attach),
233	DEVMETHOD(device_detach,	rsu_detach),
234
235	DEVMETHOD_END
236};
237
238static driver_t rsu_driver = {
239	.name = "rsu",
240	.methods = rsu_methods,
241	.size = sizeof(struct rsu_softc)
242};
243
244static devclass_t rsu_devclass;
245
246DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0);
247MODULE_DEPEND(rsu, wlan, 1, 1, 1);
248MODULE_DEPEND(rsu, usb, 1, 1, 1);
249MODULE_DEPEND(rsu, firmware, 1, 1, 1);
250MODULE_VERSION(rsu, 1);
251
252static uint8_t rsu_wme_ac_xfer_map[4] = {
253	[WME_AC_BE] = RSU_BULK_TX_BE_BK,
254	[WME_AC_BK] = RSU_BULK_TX_BE_BK,
255	[WME_AC_VI] = RSU_BULK_TX_VI_VO,
256	[WME_AC_VO] = RSU_BULK_TX_VI_VO,
257};
258
259/* XXX hard-coded */
260#define	RSU_H2C_ENDPOINT	3
261
262static const struct usb_config rsu_config[RSU_N_TRANSFER] = {
263	[RSU_BULK_RX] = {
264		.type = UE_BULK,
265		.endpoint = UE_ADDR_ANY,
266		.direction = UE_DIR_IN,
267		.bufsize = RSU_RXBUFSZ,
268		.flags = {
269			.pipe_bof = 1,
270			.short_xfer_ok = 1
271		},
272		.callback = rsu_bulk_rx_callback
273	},
274	[RSU_BULK_TX_BE_BK] = {
275		.type = UE_BULK,
276		.endpoint = 0x06,
277		.direction = UE_DIR_OUT,
278		.bufsize = RSU_TXBUFSZ,
279		.flags = {
280			.ext_buffer = 1,
281			.pipe_bof = 1,
282			.force_short_xfer = 1
283		},
284		.callback = rsu_bulk_tx_callback_be_bk,
285		.timeout = RSU_TX_TIMEOUT
286	},
287	[RSU_BULK_TX_VI_VO] = {
288		.type = UE_BULK,
289		.endpoint = 0x04,
290		.direction = UE_DIR_OUT,
291		.bufsize = RSU_TXBUFSZ,
292		.flags = {
293			.ext_buffer = 1,
294			.pipe_bof = 1,
295			.force_short_xfer = 1
296		},
297		.callback = rsu_bulk_tx_callback_vi_vo,
298		.timeout = RSU_TX_TIMEOUT
299	},
300	[RSU_BULK_TX_H2C] = {
301		.type = UE_BULK,
302		.endpoint = 0x0d,
303		.direction = UE_DIR_OUT,
304		.bufsize = RSU_TXBUFSZ,
305		.flags = {
306			.ext_buffer = 1,
307			.pipe_bof = 1,
308			.short_xfer_ok = 1
309		},
310		.callback = rsu_bulk_tx_callback_h2c,
311		.timeout = RSU_TX_TIMEOUT
312	},
313};
314
315static int
316rsu_match(device_t self)
317{
318	struct usb_attach_arg *uaa = device_get_ivars(self);
319
320	if (uaa->usb_mode != USB_MODE_HOST ||
321	    uaa->info.bIfaceIndex != 0 ||
322	    uaa->info.bConfigIndex != 0)
323		return (ENXIO);
324
325	return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa));
326}
327
328static int
329rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg)
330{
331
332	return (ENOTSUP);
333}
334
335static void
336rsu_update_chw(struct ieee80211com *ic)
337{
338
339}
340
341/*
342 * notification from net80211 that it'd like to do A-MPDU on the given TID.
343 *
344 * Note: this actually hangs traffic at the present moment, so don't use it.
345 * The firmware debug does indiciate it's sending and establishing a TX AMPDU
346 * session, but then no traffic flows.
347 */
348static int
349rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
350{
351#if 0
352	struct rsu_softc *sc = ni->ni_ic->ic_softc;
353	struct r92s_add_ba_req req;
354
355	/* Don't enable if it's requested or running */
356	if (IEEE80211_AMPDU_REQUESTED(tap))
357		return (0);
358	if (IEEE80211_AMPDU_RUNNING(tap))
359		return (0);
360
361	/* We've decided to send addba; so send it */
362	req.tid = htole32(tap->txa_tid);
363
364	/* Attempt net80211 state */
365	if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1)
366		return (0);
367
368	/* Send the firmware command */
369	RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n",
370	    __func__,
371	    tap->txa_tid);
372
373	RSU_LOCK(sc);
374	if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) {
375		RSU_UNLOCK(sc);
376		/* Mark failure */
377		(void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0);
378		return (0);
379	}
380	RSU_UNLOCK(sc);
381
382	/* Mark success; we don't get any further notifications */
383	(void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1);
384#endif
385	/* Return 0, we're driving this ourselves */
386	return (0);
387}
388
389static int
390rsu_wme_update(struct ieee80211com *ic)
391{
392
393	/* Firmware handles this; not our problem */
394	return (0);
395}
396
397static int
398rsu_attach(device_t self)
399{
400	struct usb_attach_arg *uaa = device_get_ivars(self);
401	struct rsu_softc *sc = device_get_softc(self);
402	struct ieee80211com *ic = &sc->sc_ic;
403	int error;
404	uint8_t iface_index, bands;
405	struct usb_interface *iface;
406
407	device_set_usb_desc(self);
408	sc->sc_udev = uaa->device;
409	sc->sc_dev = self;
410	if (rsu_enable_11n)
411		sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED);
412
413	/* Get number of endpoints */
414	iface = usbd_get_iface(sc->sc_udev, 0);
415	sc->sc_nendpoints = iface->idesc->bNumEndpoints;
416
417	/* Endpoints are hard-coded for now, so enforce 4-endpoint only */
418	if (sc->sc_nendpoints != 4) {
419		device_printf(sc->sc_dev,
420		    "the driver currently only supports 4-endpoint devices\n");
421		return (ENXIO);
422	}
423
424	mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK,
425	    MTX_DEF);
426	TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0,
427	    rsu_calib_task, sc);
428	TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc);
429	mbufq_init(&sc->sc_snd, ifqmaxlen);
430
431	/* Allocate Tx/Rx buffers. */
432	error = rsu_alloc_rx_list(sc);
433	if (error != 0) {
434		device_printf(sc->sc_dev, "could not allocate Rx buffers\n");
435		goto fail_usb;
436	}
437
438	error = rsu_alloc_tx_list(sc);
439	if (error != 0) {
440		device_printf(sc->sc_dev, "could not allocate Tx buffers\n");
441		rsu_free_rx_list(sc);
442		goto fail_usb;
443	}
444
445	iface_index = 0;
446	error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
447	    rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx);
448	if (error) {
449		device_printf(sc->sc_dev,
450		    "could not allocate USB transfers, err=%s\n",
451		    usbd_errstr(error));
452		goto fail_usb;
453	}
454	RSU_LOCK(sc);
455	/* Read chip revision. */
456	sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT);
457	if (sc->cut != 3)
458		sc->cut = (sc->cut >> 1) + 1;
459	error = rsu_read_rom(sc);
460	RSU_UNLOCK(sc);
461	if (error != 0) {
462		device_printf(self, "could not read ROM\n");
463		goto fail_rom;
464	}
465	IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]);
466	device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut);
467
468	ic->ic_softc = sc;
469	ic->ic_name = device_get_nameunit(self);
470	ic->ic_phytype = IEEE80211_T_OFDM;	/* Not only, but not used. */
471	ic->ic_opmode = IEEE80211_M_STA;	/* Default to BSS mode. */
472
473	/* Set device capabilities. */
474	ic->ic_caps =
475	    IEEE80211_C_STA |		/* station mode */
476#if 0
477	    IEEE80211_C_BGSCAN |	/* Background scan. */
478#endif
479	    IEEE80211_C_SHPREAMBLE |	/* Short preamble supported. */
480	    IEEE80211_C_WME |		/* WME/QoS */
481	    IEEE80211_C_SHSLOT |	/* Short slot time supported. */
482	    IEEE80211_C_WPA;		/* WPA/RSN. */
483
484	/* Check if HT support is present. */
485	if (sc->sc_ht) {
486		device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__);
487
488		/* Enable basic HT */
489		ic->ic_htcaps = IEEE80211_HTC_HT |
490		    IEEE80211_HTC_AMPDU |
491		    IEEE80211_HTC_AMSDU |
492		    IEEE80211_HTCAP_MAXAMSDU_3839 |
493		    IEEE80211_HTCAP_SMPS_OFF;
494		ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40;
495
496		/* set number of spatial streams */
497		ic->ic_txstream = 1;
498		ic->ic_rxstream = 1;
499	}
500
501	/* Set supported .11b and .11g rates. */
502	bands = 0;
503	setbit(&bands, IEEE80211_MODE_11B);
504	setbit(&bands, IEEE80211_MODE_11G);
505	if (sc->sc_ht)
506		setbit(&bands, IEEE80211_MODE_11NG);
507	ieee80211_init_channels(ic, NULL, &bands);
508
509	ieee80211_ifattach(ic);
510	ic->ic_raw_xmit = rsu_raw_xmit;
511	ic->ic_scan_start = rsu_scan_start;
512	ic->ic_scan_end = rsu_scan_end;
513	ic->ic_set_channel = rsu_set_channel;
514	ic->ic_vap_create = rsu_vap_create;
515	ic->ic_vap_delete = rsu_vap_delete;
516	ic->ic_update_mcast = rsu_update_mcast;
517	ic->ic_parent = rsu_parent;
518	ic->ic_transmit = rsu_transmit;
519	ic->ic_send_mgmt = rsu_send_mgmt;
520	ic->ic_update_chw = rsu_update_chw;
521	ic->ic_ampdu_enable = rsu_ampdu_enable;
522	ic->ic_wme.wme_update = rsu_wme_update;
523
524	ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr,
525	    sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT,
526	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
527	    RSU_RX_RADIOTAP_PRESENT);
528
529	if (bootverbose)
530		ieee80211_announce(ic);
531
532	return (0);
533
534fail_rom:
535	usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER);
536fail_usb:
537	mtx_destroy(&sc->sc_mtx);
538	return (ENXIO);
539}
540
541static int
542rsu_detach(device_t self)
543{
544	struct rsu_softc *sc = device_get_softc(self);
545	struct ieee80211com *ic = &sc->sc_ic;
546
547	RSU_LOCK(sc);
548	rsu_stop(sc);
549	RSU_UNLOCK(sc);
550
551	usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER);
552
553	/*
554	 * Free buffers /before/ we detach from net80211, else node
555	 * references to destroyed vaps will lead to a panic.
556	 */
557	/* Free Tx/Rx buffers. */
558	RSU_LOCK(sc);
559	rsu_free_tx_list(sc);
560	rsu_free_rx_list(sc);
561	RSU_UNLOCK(sc);
562
563	/* Frames are freed; detach from net80211 */
564	ieee80211_ifdetach(ic);
565
566	taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task);
567	taskqueue_drain(taskqueue_thread, &sc->tx_task);
568
569	mtx_destroy(&sc->sc_mtx);
570
571	return (0);
572}
573
574static usb_error_t
575rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req,
576    void *data)
577{
578	usb_error_t err;
579	int ntries = 10;
580
581	RSU_ASSERT_LOCKED(sc);
582
583	while (ntries--) {
584		err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
585		    req, data, 0, NULL, 250 /* ms */);
586		if (err == 0 || err == USB_ERR_NOT_CONFIGURED)
587			break;
588		DPRINTFN(1, "Control request failed, %s (retrying)\n",
589		    usbd_errstr(err));
590		rsu_ms_delay(sc, 10);
591        }
592
593        return (err);
594}
595
596static struct ieee80211vap *
597rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
598    enum ieee80211_opmode opmode, int flags,
599    const uint8_t bssid[IEEE80211_ADDR_LEN],
600    const uint8_t mac[IEEE80211_ADDR_LEN])
601{
602	struct rsu_vap *uvp;
603	struct ieee80211vap *vap;
604
605	if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
606		return (NULL);
607
608	uvp =  malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO);
609	vap = &uvp->vap;
610
611	if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
612	    flags, bssid) != 0) {
613		/* out of memory */
614		free(uvp, M_80211_VAP);
615		return (NULL);
616	}
617
618	/* override state transition machine */
619	uvp->newstate = vap->iv_newstate;
620	vap->iv_newstate = rsu_newstate;
621
622	/* Limits from the r92su driver */
623	vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16;
624	vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K;
625
626	/* complete setup */
627	ieee80211_vap_attach(vap, ieee80211_media_change,
628	    ieee80211_media_status, mac);
629	ic->ic_opmode = opmode;
630
631	return (vap);
632}
633
634static void
635rsu_vap_delete(struct ieee80211vap *vap)
636{
637	struct rsu_vap *uvp = RSU_VAP(vap);
638
639	ieee80211_vap_detach(vap);
640	free(uvp, M_80211_VAP);
641}
642
643static void
644rsu_scan_start(struct ieee80211com *ic)
645{
646	struct rsu_softc *sc = ic->ic_softc;
647	int error;
648
649	/* Scanning is done by the firmware. */
650	RSU_LOCK(sc);
651	/* XXX TODO: force awake if in in network-sleep? */
652	error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps));
653	RSU_UNLOCK(sc);
654	if (error != 0)
655		device_printf(sc->sc_dev,
656		    "could not send site survey command\n");
657}
658
659static void
660rsu_scan_end(struct ieee80211com *ic)
661{
662	/* Nothing to do here. */
663}
664
665static void
666rsu_set_channel(struct ieee80211com *ic __unused)
667{
668	/* We are unable to switch channels, yet. */
669}
670
671static void
672rsu_update_mcast(struct ieee80211com *ic)
673{
674        /* XXX do nothing?  */
675}
676
677static int
678rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[],
679    int ndata, int maxsz)
680{
681	int i, error;
682
683	for (i = 0; i < ndata; i++) {
684		struct rsu_data *dp = &data[i];
685		dp->sc = sc;
686		dp->m = NULL;
687		dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT);
688		if (dp->buf == NULL) {
689			device_printf(sc->sc_dev,
690			    "could not allocate buffer\n");
691			error = ENOMEM;
692			goto fail;
693		}
694		dp->ni = NULL;
695	}
696
697	return (0);
698fail:
699	rsu_free_list(sc, data, ndata);
700	return (error);
701}
702
703static int
704rsu_alloc_rx_list(struct rsu_softc *sc)
705{
706        int error, i;
707
708	error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT,
709	    RSU_RXBUFSZ);
710	if (error != 0)
711		return (error);
712
713	STAILQ_INIT(&sc->sc_rx_active);
714	STAILQ_INIT(&sc->sc_rx_inactive);
715
716	for (i = 0; i < RSU_RX_LIST_COUNT; i++)
717		STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
718
719	return (0);
720}
721
722static int
723rsu_alloc_tx_list(struct rsu_softc *sc)
724{
725	int error, i;
726
727	error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT,
728	    RSU_TXBUFSZ);
729	if (error != 0)
730		return (error);
731
732	STAILQ_INIT(&sc->sc_tx_inactive);
733
734	for (i = 0; i != RSU_N_TRANSFER; i++) {
735		STAILQ_INIT(&sc->sc_tx_active[i]);
736		STAILQ_INIT(&sc->sc_tx_pending[i]);
737	}
738
739	for (i = 0; i < RSU_TX_LIST_COUNT; i++) {
740		STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next);
741	}
742
743	return (0);
744}
745
746static void
747rsu_free_tx_list(struct rsu_softc *sc)
748{
749	int i;
750
751	/* prevent further allocations from TX list(s) */
752	STAILQ_INIT(&sc->sc_tx_inactive);
753
754	for (i = 0; i != RSU_N_TRANSFER; i++) {
755		STAILQ_INIT(&sc->sc_tx_active[i]);
756		STAILQ_INIT(&sc->sc_tx_pending[i]);
757	}
758
759	rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT);
760}
761
762static void
763rsu_free_rx_list(struct rsu_softc *sc)
764{
765	/* prevent further allocations from RX list(s) */
766	STAILQ_INIT(&sc->sc_rx_inactive);
767	STAILQ_INIT(&sc->sc_rx_active);
768
769	rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT);
770}
771
772static void
773rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata)
774{
775	int i;
776
777	for (i = 0; i < ndata; i++) {
778		struct rsu_data *dp = &data[i];
779
780		if (dp->buf != NULL) {
781			free(dp->buf, M_USBDEV);
782			dp->buf = NULL;
783		}
784		if (dp->ni != NULL) {
785			ieee80211_free_node(dp->ni);
786			dp->ni = NULL;
787		}
788	}
789}
790
791static struct rsu_data *
792_rsu_getbuf(struct rsu_softc *sc)
793{
794	struct rsu_data *bf;
795
796	bf = STAILQ_FIRST(&sc->sc_tx_inactive);
797	if (bf != NULL)
798		STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
799	else
800		bf = NULL;
801	return (bf);
802}
803
804static struct rsu_data *
805rsu_getbuf(struct rsu_softc *sc)
806{
807	struct rsu_data *bf;
808
809	RSU_ASSERT_LOCKED(sc);
810
811	bf = _rsu_getbuf(sc);
812	if (bf == NULL) {
813		RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__);
814	}
815	return (bf);
816}
817
818static void
819rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf)
820{
821
822	RSU_ASSERT_LOCKED(sc);
823	STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next);
824}
825
826static int
827rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf,
828    int len)
829{
830	usb_device_request_t req;
831
832	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
833	req.bRequest = R92S_REQ_REGS;
834	USETW(req.wValue, addr);
835	USETW(req.wIndex, 0);
836	USETW(req.wLength, len);
837
838	return (rsu_do_request(sc, &req, buf));
839}
840
841static void
842rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val)
843{
844	rsu_write_region_1(sc, addr, &val, 1);
845}
846
847static void
848rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val)
849{
850	val = htole16(val);
851	rsu_write_region_1(sc, addr, (uint8_t *)&val, 2);
852}
853
854static void
855rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val)
856{
857	val = htole32(val);
858	rsu_write_region_1(sc, addr, (uint8_t *)&val, 4);
859}
860
861static int
862rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf,
863    int len)
864{
865	usb_device_request_t req;
866
867	req.bmRequestType = UT_READ_VENDOR_DEVICE;
868	req.bRequest = R92S_REQ_REGS;
869	USETW(req.wValue, addr);
870	USETW(req.wIndex, 0);
871	USETW(req.wLength, len);
872
873	return (rsu_do_request(sc, &req, buf));
874}
875
876static uint8_t
877rsu_read_1(struct rsu_softc *sc, uint16_t addr)
878{
879	uint8_t val;
880
881	if (rsu_read_region_1(sc, addr, &val, 1) != 0)
882		return (0xff);
883	return (val);
884}
885
886static uint16_t
887rsu_read_2(struct rsu_softc *sc, uint16_t addr)
888{
889	uint16_t val;
890
891	if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0)
892		return (0xffff);
893	return (le16toh(val));
894}
895
896static uint32_t
897rsu_read_4(struct rsu_softc *sc, uint16_t addr)
898{
899	uint32_t val;
900
901	if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0)
902		return (0xffffffff);
903	return (le32toh(val));
904}
905
906static int
907rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd)
908{
909	int ntries;
910
911	rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd);
912	rsu_ms_delay(sc, 1);
913	for (ntries = 0; ntries < 50; ntries++) {
914		if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0)
915			return (0);
916		rsu_ms_delay(sc, 1);
917	}
918	return (ETIMEDOUT);
919}
920
921static uint8_t
922rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr)
923{
924	uint32_t reg;
925	int ntries;
926
927	reg = rsu_read_4(sc, R92S_EFUSE_CTRL);
928	reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr);
929	reg &= ~R92S_EFUSE_CTRL_VALID;
930	rsu_write_4(sc, R92S_EFUSE_CTRL, reg);
931	/* Wait for read operation to complete. */
932	for (ntries = 0; ntries < 100; ntries++) {
933		reg = rsu_read_4(sc, R92S_EFUSE_CTRL);
934		if (reg & R92S_EFUSE_CTRL_VALID)
935			return (MS(reg, R92S_EFUSE_CTRL_DATA));
936		rsu_ms_delay(sc, 1);
937	}
938	device_printf(sc->sc_dev,
939	    "could not read efuse byte at address 0x%x\n", addr);
940	return (0xff);
941}
942
943static int
944rsu_read_rom(struct rsu_softc *sc)
945{
946	uint8_t *rom = sc->rom;
947	uint16_t addr = 0;
948	uint32_t reg;
949	uint8_t off, msk;
950	int i;
951
952	/* Make sure that ROM type is eFuse and that autoload succeeded. */
953	reg = rsu_read_1(sc, R92S_EE_9346CR);
954	if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN)
955		return (EIO);
956
957	/* Turn on 2.5V to prevent eFuse leakage. */
958	reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3);
959	rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80);
960	rsu_ms_delay(sc, 1);
961	rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80);
962
963	/* Read full ROM image. */
964	memset(&sc->rom, 0xff, sizeof(sc->rom));
965	while (addr < 512) {
966		reg = rsu_efuse_read_1(sc, addr);
967		if (reg == 0xff)
968			break;
969		addr++;
970		off = reg >> 4;
971		msk = reg & 0xf;
972		for (i = 0; i < 4; i++) {
973			if (msk & (1 << i))
974				continue;
975			rom[off * 8 + i * 2 + 0] =
976			    rsu_efuse_read_1(sc, addr);
977			addr++;
978			rom[off * 8 + i * 2 + 1] =
979			    rsu_efuse_read_1(sc, addr);
980			addr++;
981		}
982	}
983#ifdef USB_DEBUG
984	if (rsu_debug >= 5) {
985		/* Dump ROM content. */
986		printf("\n");
987		for (i = 0; i < sizeof(sc->rom); i++)
988			printf("%02x:", rom[i]);
989		printf("\n");
990	}
991#endif
992	return (0);
993}
994
995static int
996rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len)
997{
998	const uint8_t which = RSU_H2C_ENDPOINT;
999	struct rsu_data *data;
1000	struct r92s_tx_desc *txd;
1001	struct r92s_fw_cmd_hdr *cmd;
1002	int cmdsz;
1003	int xferlen;
1004
1005	RSU_ASSERT_LOCKED(sc);
1006
1007	data = rsu_getbuf(sc);
1008	if (data == NULL)
1009		return (ENOMEM);
1010
1011	/* Blank the entire payload, just to be safe */
1012	memset(data->buf, '\0', RSU_TXBUFSZ);
1013
1014	/* Round-up command length to a multiple of 8 bytes. */
1015	/* XXX TODO: is this required? */
1016	cmdsz = (len + 7) & ~7;
1017
1018	xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz;
1019	KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__));
1020	memset(data->buf, 0, xferlen);
1021
1022	/* Setup Tx descriptor. */
1023	txd = (struct r92s_tx_desc *)data->buf;
1024	txd->txdw0 = htole32(
1025	    SM(R92S_TXDW0_OFFSET, sizeof(*txd)) |
1026	    SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) |
1027	    R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG);
1028	txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C));
1029
1030	/* Setup command header. */
1031	cmd = (struct r92s_fw_cmd_hdr *)&txd[1];
1032	cmd->len = htole16(cmdsz);
1033	cmd->code = code;
1034	cmd->seq = sc->cmd_seq;
1035	sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f;
1036
1037	/* Copy command payload. */
1038	memcpy(&cmd[1], buf, len);
1039
1040	RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD,
1041	    "%s: Tx cmd code=0x%x len=0x%x\n",
1042	    __func__, code, cmdsz);
1043	data->buflen = xferlen;
1044	STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next);
1045	usbd_transfer_start(sc->sc_xfer[which]);
1046
1047	return (0);
1048}
1049
1050/* ARGSUSED */
1051static void
1052rsu_calib_task(void *arg, int pending __unused)
1053{
1054	struct rsu_softc *sc = arg;
1055	uint32_t reg;
1056
1057	RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n",
1058	    __func__);
1059
1060	RSU_LOCK(sc);
1061#ifdef notyet
1062	/* Read WPS PBC status. */
1063	rsu_write_1(sc, R92S_MAC_PINMUX_CTRL,
1064	    R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG));
1065	rsu_write_1(sc, R92S_GPIO_IO_SEL,
1066	    rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS);
1067	reg = rsu_read_1(sc, R92S_GPIO_CTRL);
1068	if (reg != 0xff && (reg & R92S_GPIO_WPS))
1069		DPRINTF(("WPS PBC is pushed\n"));
1070#endif
1071	/* Read current signal level. */
1072	if (rsu_fw_iocmd(sc, 0xf4000001) == 0) {
1073		reg = rsu_read_4(sc, R92S_IOCMD_DATA);
1074		RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d%%\n",
1075		    __func__, reg >> 4);
1076	}
1077	if (sc->sc_calibrating)
1078		taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz);
1079	RSU_UNLOCK(sc);
1080}
1081
1082static void
1083rsu_tx_task(void *arg, int pending __unused)
1084{
1085	struct rsu_softc *sc = arg;
1086
1087	RSU_LOCK(sc);
1088	_rsu_start(sc);
1089	RSU_UNLOCK(sc);
1090}
1091
1092#define	RSU_PWR_UNKNOWN		0x0
1093#define	RSU_PWR_ACTIVE		0x1
1094#define	RSU_PWR_OFF		0x2
1095#define	RSU_PWR_SLEEP		0x3
1096
1097/*
1098 * Set the current power state.
1099 *
1100 * The rtlwifi code doesn't do this so aggressively; it
1101 * waits for an idle period after association with
1102 * no traffic before doing this.
1103 *
1104 * For now - it's on in all states except RUN, and
1105 * in RUN it'll transition to allow sleep.
1106 */
1107
1108struct r92s_pwr_cmd {
1109	uint8_t mode;
1110	uint8_t smart_ps;
1111	uint8_t bcn_pass_time;
1112};
1113
1114static int
1115rsu_set_fw_power_state(struct rsu_softc *sc, int state)
1116{
1117	struct r92s_set_pwr_mode cmd;
1118	//struct r92s_pwr_cmd cmd;
1119	int error;
1120
1121	RSU_ASSERT_LOCKED(sc);
1122
1123	/* only change state if required */
1124	if (sc->sc_curpwrstate == state)
1125		return (0);
1126
1127	memset(&cmd, 0, sizeof(cmd));
1128
1129	switch (state) {
1130	case RSU_PWR_ACTIVE:
1131		/* Force the hardware awake */
1132		rsu_write_1(sc, R92S_USB_HRPWM,
1133		    R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON);
1134		cmd.mode = R92S_PS_MODE_ACTIVE;
1135		break;
1136	case RSU_PWR_SLEEP:
1137		cmd.mode = R92S_PS_MODE_DTIM;	/* XXX configurable? */
1138		cmd.smart_ps = 1; /* XXX 2 if doing p2p */
1139		cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */
1140		break;
1141	case RSU_PWR_OFF:
1142		cmd.mode = R92S_PS_MODE_RADIOOFF;
1143		break;
1144	default:
1145		device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n",
1146		    __func__,
1147		    state);
1148		return (ENXIO);
1149	}
1150
1151	RSU_DPRINTF(sc, RSU_DEBUG_RESET,
1152	    "%s: setting ps mode to %d (mode %d)\n",
1153	    __func__, state, cmd.mode);
1154	error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd));
1155	if (error == 0)
1156		sc->sc_curpwrstate = state;
1157
1158	return (error);
1159}
1160
1161static int
1162rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1163{
1164	struct rsu_vap *uvp = RSU_VAP(vap);
1165	struct ieee80211com *ic = vap->iv_ic;
1166	struct rsu_softc *sc = ic->ic_softc;
1167	struct ieee80211_node *ni;
1168	struct ieee80211_rateset *rs;
1169	enum ieee80211_state ostate;
1170	int error, startcal = 0;
1171
1172	ostate = vap->iv_state;
1173	RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n",
1174	    __func__,
1175	    ieee80211_state_name[ostate],
1176	    ieee80211_state_name[nstate]);
1177
1178	IEEE80211_UNLOCK(ic);
1179	if (ostate == IEEE80211_S_RUN) {
1180		RSU_LOCK(sc);
1181		/* Stop calibration. */
1182		sc->sc_calibrating = 0;
1183		RSU_UNLOCK(sc);
1184		taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task);
1185		taskqueue_drain(taskqueue_thread, &sc->tx_task);
1186		/* Disassociate from our current BSS. */
1187		RSU_LOCK(sc);
1188		rsu_disconnect(sc);
1189	} else
1190		RSU_LOCK(sc);
1191	switch (nstate) {
1192	case IEEE80211_S_INIT:
1193		(void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE);
1194		break;
1195	case IEEE80211_S_AUTH:
1196		ni = ieee80211_ref_node(vap->iv_bss);
1197		(void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE);
1198		error = rsu_join_bss(sc, ni);
1199		ieee80211_free_node(ni);
1200		if (error != 0) {
1201			device_printf(sc->sc_dev,
1202			    "could not send join command\n");
1203		}
1204		break;
1205	case IEEE80211_S_RUN:
1206		ni = ieee80211_ref_node(vap->iv_bss);
1207		rs = &ni->ni_rates;
1208		/* Indicate highest supported rate. */
1209		ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1];
1210		(void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP);
1211		ieee80211_free_node(ni);
1212		startcal = 1;
1213		break;
1214	default:
1215		break;
1216	}
1217	sc->sc_calibrating = 1;
1218	/* Start periodic calibration. */
1219	taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz);
1220	RSU_UNLOCK(sc);
1221	IEEE80211_LOCK(ic);
1222	return (uvp->newstate(vap, nstate, arg));
1223}
1224
1225#ifdef notyet
1226static void
1227rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k)
1228{
1229	struct r92s_fw_cmd_set_key key;
1230
1231	memset(&key, 0, sizeof(key));
1232	/* Map net80211 cipher to HW crypto algorithm. */
1233	switch (k->wk_cipher->ic_cipher) {
1234	case IEEE80211_CIPHER_WEP:
1235		if (k->wk_keylen < 8)
1236			key.algo = R92S_KEY_ALGO_WEP40;
1237		else
1238			key.algo = R92S_KEY_ALGO_WEP104;
1239		break;
1240	case IEEE80211_CIPHER_TKIP:
1241		key.algo = R92S_KEY_ALGO_TKIP;
1242		break;
1243	case IEEE80211_CIPHER_AES_CCM:
1244		key.algo = R92S_KEY_ALGO_AES;
1245		break;
1246	default:
1247		return;
1248	}
1249	key.id = k->wk_keyix;
1250	key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0;
1251	memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key)));
1252	(void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key));
1253}
1254
1255static void
1256rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k)
1257{
1258	struct r92s_fw_cmd_set_key key;
1259
1260	memset(&key, 0, sizeof(key));
1261	key.id = k->wk_keyix;
1262	(void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key));
1263}
1264#endif
1265
1266static int
1267rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap)
1268{
1269	struct r92s_fw_cmd_sitesurvey cmd;
1270	struct ieee80211com *ic = &sc->sc_ic;
1271	int r;
1272
1273	RSU_ASSERT_LOCKED(sc);
1274
1275	memset(&cmd, 0, sizeof(cmd));
1276	if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1)
1277		cmd.active = htole32(1);
1278	cmd.limit = htole32(48);
1279	if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) {
1280		/* Do a directed scan for second pass. */
1281		cmd.ssidlen = htole32(vap->iv_des_ssid[0].len);
1282		memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid,
1283		    vap->iv_des_ssid[0].len);
1284
1285	}
1286	DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass);
1287	r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd));
1288	if (r == 0) {
1289		sc->sc_scanning = 1;
1290	}
1291	return (r);
1292}
1293
1294static int
1295rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni)
1296{
1297	struct ieee80211com *ic = &sc->sc_ic;
1298	struct ieee80211vap *vap = ni->ni_vap;
1299	struct ndis_wlan_bssid_ex *bss;
1300	struct ndis_802_11_fixed_ies *fixed;
1301	struct r92s_fw_cmd_auth auth;
1302	uint8_t buf[sizeof(*bss) + 128] __aligned(4);
1303	uint8_t *frm;
1304	uint8_t opmode;
1305	int error;
1306	int cnt;
1307	char *msg = "rsujoin";
1308
1309	RSU_ASSERT_LOCKED(sc);
1310
1311	/*
1312	 * Until net80211 scanning doesn't automatically finish
1313	 * before we tell it to, let's just wait until any pending
1314	 * scan is done.
1315	 *
1316	 * XXX TODO: yes, this releases and re-acquires the lock.
1317	 * We should re-verify the state whenever we re-attempt this!
1318	 */
1319	cnt = 0;
1320	while (sc->sc_scanning && cnt < 10) {
1321		device_printf(sc->sc_dev,
1322		    "%s: still scanning! (attempt %d)\n",
1323		    __func__, cnt);
1324		msleep(msg, &sc->sc_mtx, 0, msg, hz / 2);
1325		cnt++;
1326	}
1327
1328	/* Let the FW decide the opmode based on the capinfo field. */
1329	opmode = NDIS802_11AUTOUNKNOWN;
1330	RSU_DPRINTF(sc, RSU_DEBUG_RESET,
1331	    "%s: setting operating mode to %d\n",
1332	    __func__, opmode);
1333	error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode));
1334	if (error != 0)
1335		return (error);
1336
1337	memset(&auth, 0, sizeof(auth));
1338	if (vap->iv_flags & IEEE80211_F_WPA) {
1339		auth.mode = R92S_AUTHMODE_WPA;
1340		auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X);
1341	} else
1342		auth.mode = R92S_AUTHMODE_OPEN;
1343	RSU_DPRINTF(sc, RSU_DEBUG_RESET,
1344	    "%s: setting auth mode to %d\n",
1345	    __func__, auth.mode);
1346	error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth));
1347	if (error != 0)
1348		return (error);
1349
1350	memset(buf, 0, sizeof(buf));
1351	bss = (struct ndis_wlan_bssid_ex *)buf;
1352	IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid);
1353	bss->ssid.ssidlen = htole32(ni->ni_esslen);
1354	memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen);
1355	if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA))
1356		bss->privacy = htole32(1);
1357	bss->rssi = htole32(ni->ni_avgrssi);
1358	if (ic->ic_curmode == IEEE80211_MODE_11B)
1359		bss->networktype = htole32(NDIS802_11DS);
1360	else
1361		bss->networktype = htole32(NDIS802_11OFDM24);
1362	bss->config.len = htole32(sizeof(bss->config));
1363	bss->config.bintval = htole32(ni->ni_intval);
1364	bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan));
1365	bss->inframode = htole32(NDIS802_11INFRASTRUCTURE);
1366	/* XXX verify how this is supposed to look! */
1367	memcpy(bss->supprates, ni->ni_rates.rs_rates,
1368	    ni->ni_rates.rs_nrates);
1369	/* Write the fixed fields of the beacon frame. */
1370	fixed = (struct ndis_802_11_fixed_ies *)&bss[1];
1371	memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8);
1372	fixed->bintval = htole16(ni->ni_intval);
1373	fixed->capabilities = htole16(ni->ni_capinfo);
1374	/* Write IEs to be included in the association request. */
1375	frm = (uint8_t *)&fixed[1];
1376	frm = ieee80211_add_rsn(frm, vap);
1377	frm = ieee80211_add_wpa(frm, vap);
1378	frm = ieee80211_add_qos(frm, ni);
1379	if ((ic->ic_flags & IEEE80211_F_WME) &&
1380	    (ni->ni_ies.wme_ie != NULL))
1381		frm = ieee80211_add_wme_info(frm, &ic->ic_wme);
1382	if (ni->ni_flags & IEEE80211_NODE_HT) {
1383		frm = ieee80211_add_htcap(frm, ni);
1384		frm = ieee80211_add_htinfo(frm, ni);
1385	}
1386	bss->ieslen = htole32(frm - (uint8_t *)fixed);
1387	bss->len = htole32(((frm - buf) + 3) & ~3);
1388	RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD,
1389	    "%s: sending join bss command to %s chan %d\n",
1390	    __func__,
1391	    ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig));
1392	return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf)));
1393}
1394
1395static int
1396rsu_disconnect(struct rsu_softc *sc)
1397{
1398	uint32_t zero = 0;	/* :-) */
1399
1400	/* Disassociate from our current BSS. */
1401	RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD,
1402	    "%s: sending disconnect command\n", __func__);
1403	return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero)));
1404}
1405
1406static void
1407rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len)
1408{
1409	struct ieee80211com *ic = &sc->sc_ic;
1410	struct ieee80211_frame *wh;
1411	struct ndis_wlan_bssid_ex *bss;
1412	struct ieee80211_rx_stats rxs;
1413	struct mbuf *m;
1414	int pktlen;
1415
1416	if (__predict_false(len < sizeof(*bss)))
1417		return;
1418	bss = (struct ndis_wlan_bssid_ex *)buf;
1419	if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen)))
1420		return;
1421
1422	RSU_DPRINTF(sc, RSU_DEBUG_SCAN,
1423	    "%s: found BSS %s: len=%d chan=%d inframode=%d "
1424	    "networktype=%d privacy=%d, RSSI=%d\n",
1425	    __func__,
1426	    ether_sprintf(bss->macaddr), le32toh(bss->len),
1427	    le32toh(bss->config.dsconfig), le32toh(bss->inframode),
1428	    le32toh(bss->networktype), le32toh(bss->privacy),
1429	    le32toh(bss->rssi));
1430
1431	/* Build a fake beacon frame to let net80211 do all the parsing. */
1432	/* XXX TODO: just call the new scan API methods! */
1433	pktlen = sizeof(*wh) + le32toh(bss->ieslen);
1434	if (__predict_false(pktlen > MCLBYTES))
1435		return;
1436	m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR);
1437	if (__predict_false(m == NULL))
1438		return;
1439	wh = mtod(m, struct ieee80211_frame *);
1440	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
1441	    IEEE80211_FC0_SUBTYPE_BEACON;
1442	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1443	USETW(wh->i_dur, 0);
1444	IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr);
1445	IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr);
1446	IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr);
1447	*(uint16_t *)wh->i_seq = 0;
1448	memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen));
1449
1450	/* Finalize mbuf. */
1451	m->m_pkthdr.len = m->m_len = pktlen;
1452
1453	/* Set channel flags for input path */
1454	bzero(&rxs, sizeof(rxs));
1455	rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ;
1456	rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI;
1457	rxs.c_ieee = le32toh(bss->config.dsconfig);
1458	rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ);
1459	rxs.rssi = le32toh(bss->rssi);
1460	rxs.nf = 0; /* XXX */
1461
1462	/* XXX avoid a LOR */
1463	RSU_UNLOCK(sc);
1464	ieee80211_input_mimo_all(ic, m, &rxs);
1465	RSU_LOCK(sc);
1466}
1467
1468static void
1469rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len)
1470{
1471	struct ieee80211com *ic = &sc->sc_ic;
1472	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1473	struct ieee80211_node *ni = vap->iv_bss;
1474	struct r92s_event_join_bss *rsp;
1475	uint32_t tmp;
1476	int res;
1477
1478	if (__predict_false(len < sizeof(*rsp)))
1479		return;
1480	rsp = (struct r92s_event_join_bss *)buf;
1481	res = (int)le32toh(rsp->join_res);
1482
1483	RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD,
1484	    "%s: Rx join BSS event len=%d res=%d\n",
1485	    __func__, len, res);
1486
1487	/*
1488	 * XXX Don't do this; there's likely a better way to tell
1489	 * the caller we failed.
1490	 */
1491	if (res <= 0) {
1492		RSU_UNLOCK(sc);
1493		ieee80211_new_state(vap, IEEE80211_S_SCAN, -1);
1494		RSU_LOCK(sc);
1495		return;
1496	}
1497
1498	tmp = le32toh(rsp->associd);
1499	if (tmp >= vap->iv_max_aid) {
1500		DPRINTF("Assoc ID overflow\n");
1501		tmp = 1;
1502	}
1503	RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD,
1504	    "%s: associated with %s associd=%d\n",
1505	    __func__, ether_sprintf(rsp->bss.macaddr), tmp);
1506	/* XXX is this required? What's the top two bits for again? */
1507	ni->ni_associd = tmp | 0xc000;
1508	RSU_UNLOCK(sc);
1509	ieee80211_new_state(vap, IEEE80211_S_RUN,
1510	    IEEE80211_FC0_SUBTYPE_ASSOC_RESP);
1511	RSU_LOCK(sc);
1512}
1513
1514static void
1515rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len)
1516{
1517	struct ieee80211com *ic = &sc->sc_ic;
1518	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1519	struct r92s_add_ba_event *ba = (void *) buf;
1520	struct ieee80211_node *ni;
1521
1522	if (len < sizeof(*ba)) {
1523		device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len);
1524		return;
1525	}
1526
1527	if (vap == NULL)
1528		return;
1529
1530	device_printf(sc->sc_dev, "%s: mac=%s, tid=%d, ssn=%d\n",
1531	    __func__,
1532	    ether_sprintf(ba->mac_addr),
1533	    (int) ba->tid,
1534	    (int) le16toh(ba->ssn));
1535
1536	/* XXX do node lookup; this is STA specific */
1537
1538	ni = ieee80211_ref_node(vap->iv_bss);
1539	ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32);
1540	ieee80211_free_node(ni);
1541}
1542
1543static void
1544rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len)
1545{
1546	struct ieee80211com *ic = &sc->sc_ic;
1547	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1548
1549	RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD,
1550	    "%s: Rx event code=%d len=%d\n", __func__, code, len);
1551	switch (code) {
1552	case R92S_EVT_SURVEY:
1553		rsu_event_survey(sc, buf, len);
1554		break;
1555	case R92S_EVT_SURVEY_DONE:
1556		RSU_DPRINTF(sc, RSU_DEBUG_SCAN,
1557		    "%s: site survey pass %d done, found %d BSS\n",
1558		    __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf));
1559		sc->sc_scanning = 0;
1560		if (vap->iv_state != IEEE80211_S_SCAN)
1561			break;	/* Ignore if not scanning. */
1562
1563		/*
1564		 * XXX TODO: This needs to be done without a transition to
1565		 * the SCAN state again.  Grr.
1566		 */
1567		if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) {
1568			/* Schedule a directed scan for hidden APs. */
1569			/* XXX bad! */
1570			sc->sc_scan_pass = 1;
1571			RSU_UNLOCK(sc);
1572			ieee80211_new_state(vap, IEEE80211_S_SCAN, -1);
1573			RSU_LOCK(sc);
1574			break;
1575		}
1576		sc->sc_scan_pass = 0;
1577		break;
1578	case R92S_EVT_JOIN_BSS:
1579		if (vap->iv_state == IEEE80211_S_AUTH)
1580			rsu_event_join_bss(sc, buf, len);
1581		break;
1582	case R92S_EVT_DEL_STA:
1583		RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE,
1584		    "%s: disassociated from %s\n", __func__,
1585		    ether_sprintf(buf));
1586		if (vap->iv_state == IEEE80211_S_RUN &&
1587		    IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) {
1588			RSU_UNLOCK(sc);
1589			ieee80211_new_state(vap, IEEE80211_S_SCAN, -1);
1590			RSU_LOCK(sc);
1591		}
1592		break;
1593	case R92S_EVT_WPS_PBC:
1594		RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD,
1595		    "%s: WPS PBC pushed.\n", __func__);
1596		break;
1597	case R92S_EVT_FWDBG:
1598		buf[60] = '\0';
1599		RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf);
1600		break;
1601	case R92S_EVT_ADDBA_REQ_REPORT:
1602		rsu_event_addba_req_report(sc, buf, len);
1603		break;
1604	default:
1605		device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code);
1606		break;
1607	}
1608}
1609
1610static void
1611rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len)
1612{
1613	struct r92s_fw_cmd_hdr *cmd;
1614	int cmdsz;
1615
1616	RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len);
1617
1618	/* Skip Rx status. */
1619	buf += sizeof(struct r92s_rx_stat);
1620	len -= sizeof(struct r92s_rx_stat);
1621
1622	/* Process all events. */
1623	for (;;) {
1624		/* Check that command header fits. */
1625		if (__predict_false(len < sizeof(*cmd)))
1626			break;
1627		cmd = (struct r92s_fw_cmd_hdr *)buf;
1628		/* Check that command payload fits. */
1629		cmdsz = le16toh(cmd->len);
1630		if (__predict_false(len < sizeof(*cmd) + cmdsz))
1631			break;
1632
1633		/* Process firmware event. */
1634		rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz);
1635
1636		if (!(cmd->seq & R92S_FW_CMD_MORE))
1637			break;
1638		buf += sizeof(*cmd) + cmdsz;
1639		len -= sizeof(*cmd) + cmdsz;
1640	}
1641}
1642
1643static int8_t
1644rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt)
1645{
1646	static const int8_t cckoff[] = { 14, -2, -20, -40 };
1647	struct r92s_rx_phystat *phy;
1648	struct r92s_rx_cck *cck;
1649	uint8_t rpt;
1650	int8_t rssi;
1651
1652	if (rate <= 3) {
1653		cck = (struct r92s_rx_cck *)physt;
1654		rpt = (cck->agc_rpt >> 6) & 0x3;
1655		rssi = cck->agc_rpt & 0x3e;
1656		rssi = cckoff[rpt] - rssi;
1657	} else {	/* OFDM/HT. */
1658		phy = (struct r92s_rx_phystat *)physt;
1659		rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106;
1660	}
1661	return (rssi);
1662}
1663
1664static struct mbuf *
1665rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi)
1666{
1667	struct ieee80211com *ic = &sc->sc_ic;
1668	struct ieee80211_frame *wh;
1669	struct r92s_rx_stat *stat;
1670	uint32_t rxdw0, rxdw3;
1671	struct mbuf *m;
1672	uint8_t rate;
1673	int infosz;
1674
1675	stat = (struct r92s_rx_stat *)buf;
1676	rxdw0 = le32toh(stat->rxdw0);
1677	rxdw3 = le32toh(stat->rxdw3);
1678
1679	if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) {
1680		counter_u64_add(ic->ic_ierrors, 1);
1681		return NULL;
1682	}
1683	if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) {
1684		counter_u64_add(ic->ic_ierrors, 1);
1685		return NULL;
1686	}
1687
1688	rate = MS(rxdw3, R92S_RXDW3_RATE);
1689	infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8;
1690
1691	/* Get RSSI from PHY status descriptor if present. */
1692	if (infosz != 0)
1693		*rssi = rsu_get_rssi(sc, rate, &stat[1]);
1694	else
1695		*rssi = 0;
1696
1697	RSU_DPRINTF(sc, RSU_DEBUG_RX,
1698	    "%s: Rx frame len=%d rate=%d infosz=%d rssi=%d\n",
1699	    __func__,
1700	    pktlen, rate, infosz, *rssi);
1701
1702	m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR);
1703	if (__predict_false(m == NULL)) {
1704		counter_u64_add(ic->ic_ierrors, 1);
1705		return NULL;
1706	}
1707	/* Hardware does Rx TCP checksum offload. */
1708	if (rxdw3 & R92S_RXDW3_TCPCHKVALID) {
1709		if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT))
1710			m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
1711	}
1712	wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz);
1713	memcpy(mtod(m, uint8_t *), wh, pktlen);
1714	m->m_pkthdr.len = m->m_len = pktlen;
1715
1716	if (ieee80211_radiotap_active(ic)) {
1717		struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap;
1718
1719		/* Map HW rate index to 802.11 rate. */
1720		tap->wr_flags = 2;
1721		if (!(rxdw3 & R92S_RXDW3_HTC)) {
1722			switch (rate) {
1723			/* CCK. */
1724			case  0: tap->wr_rate =   2; break;
1725			case  1: tap->wr_rate =   4; break;
1726			case  2: tap->wr_rate =  11; break;
1727			case  3: tap->wr_rate =  22; break;
1728			/* OFDM. */
1729			case  4: tap->wr_rate =  12; break;
1730			case  5: tap->wr_rate =  18; break;
1731			case  6: tap->wr_rate =  24; break;
1732			case  7: tap->wr_rate =  36; break;
1733			case  8: tap->wr_rate =  48; break;
1734			case  9: tap->wr_rate =  72; break;
1735			case 10: tap->wr_rate =  96; break;
1736			case 11: tap->wr_rate = 108; break;
1737			}
1738		} else if (rate >= 12) {	/* MCS0~15. */
1739			/* Bit 7 set means HT MCS instead of rate. */
1740			tap->wr_rate = 0x80 | (rate - 12);
1741		}
1742		tap->wr_dbm_antsignal = *rssi;
1743		tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1744		tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1745	}
1746
1747	return (m);
1748}
1749
1750static struct mbuf *
1751rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi)
1752{
1753	struct r92s_rx_stat *stat;
1754	uint32_t rxdw0;
1755	int totlen, pktlen, infosz, npkts;
1756	struct mbuf *m, *m0 = NULL, *prevm = NULL;
1757
1758	/* Get the number of encapsulated frames. */
1759	stat = (struct r92s_rx_stat *)buf;
1760	npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT);
1761	RSU_DPRINTF(sc, RSU_DEBUG_RX,
1762	    "%s: Rx %d frames in one chunk\n", __func__, npkts);
1763
1764	/* Process all of them. */
1765	while (npkts-- > 0) {
1766		if (__predict_false(len < sizeof(*stat)))
1767			break;
1768		stat = (struct r92s_rx_stat *)buf;
1769		rxdw0 = le32toh(stat->rxdw0);
1770
1771		pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN);
1772		if (__predict_false(pktlen == 0))
1773			break;
1774
1775		infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8;
1776
1777		/* Make sure everything fits in xfer. */
1778		totlen = sizeof(*stat) + infosz + pktlen;
1779		if (__predict_false(totlen > len))
1780			break;
1781
1782		/* Process 802.11 frame. */
1783		m = rsu_rx_frame(sc, buf, pktlen, rssi);
1784		if (m0 == NULL)
1785			m0 = m;
1786		if (prevm == NULL)
1787			prevm = m;
1788		else {
1789			prevm->m_next = m;
1790			prevm = m;
1791		}
1792		/* Next chunk is 128-byte aligned. */
1793		totlen = (totlen + 127) & ~127;
1794		buf += totlen;
1795		len -= totlen;
1796	}
1797
1798	return (m0);
1799}
1800
1801static struct mbuf *
1802rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi)
1803{
1804	struct rsu_softc *sc = data->sc;
1805	struct ieee80211com *ic = &sc->sc_ic;
1806	struct r92s_rx_stat *stat;
1807	int len;
1808
1809	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
1810
1811	if (__predict_false(len < sizeof(*stat))) {
1812		DPRINTF("xfer too short %d\n", len);
1813		counter_u64_add(ic->ic_ierrors, 1);
1814		return (NULL);
1815	}
1816	/* Determine if it is a firmware C2H event or an 802.11 frame. */
1817	stat = (struct r92s_rx_stat *)data->buf;
1818	if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) {
1819		rsu_rx_multi_event(sc, data->buf, len);
1820		/* No packets to process. */
1821		return (NULL);
1822	} else
1823		return (rsu_rx_multi_frame(sc, data->buf, len, rssi));
1824}
1825
1826static void
1827rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
1828{
1829	struct rsu_softc *sc = usbd_xfer_softc(xfer);
1830	struct ieee80211com *ic = &sc->sc_ic;
1831	struct ieee80211_frame *wh;
1832	struct ieee80211_node *ni;
1833	struct mbuf *m = NULL, *next;
1834	struct rsu_data *data;
1835	int rssi = 1;
1836
1837	RSU_ASSERT_LOCKED(sc);
1838
1839	switch (USB_GET_STATE(xfer)) {
1840	case USB_ST_TRANSFERRED:
1841		data = STAILQ_FIRST(&sc->sc_rx_active);
1842		if (data == NULL)
1843			goto tr_setup;
1844		STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1845		m = rsu_rxeof(xfer, data, &rssi);
1846		STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1847		/* FALLTHROUGH */
1848	case USB_ST_SETUP:
1849tr_setup:
1850		/*
1851		 * XXX TODO: if we have an mbuf list, but then
1852		 * we hit data == NULL, what now?
1853		 */
1854		data = STAILQ_FIRST(&sc->sc_rx_inactive);
1855		if (data == NULL) {
1856			KASSERT(m == NULL, ("mbuf isn't NULL"));
1857			return;
1858		}
1859		STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
1860		STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
1861		usbd_xfer_set_frame_data(xfer, 0, data->buf,
1862		    usbd_xfer_max_len(xfer));
1863		usbd_transfer_submit(xfer);
1864		/*
1865		 * To avoid LOR we should unlock our private mutex here to call
1866		 * ieee80211_input() because here is at the end of a USB
1867		 * callback and safe to unlock.
1868		 */
1869		RSU_UNLOCK(sc);
1870		while (m != NULL) {
1871			next = m->m_next;
1872			m->m_next = NULL;
1873			wh = mtod(m, struct ieee80211_frame *);
1874			ni = ieee80211_find_rxnode(ic,
1875			    (struct ieee80211_frame_min *)wh);
1876			if (ni != NULL) {
1877				if (ni->ni_flags & IEEE80211_NODE_HT)
1878					m->m_flags |= M_AMPDU;
1879				(void)ieee80211_input(ni, m, rssi, 0);
1880				ieee80211_free_node(ni);
1881			} else
1882				(void)ieee80211_input_all(ic, m, rssi, 0);
1883			m = next;
1884		}
1885		RSU_LOCK(sc);
1886		break;
1887	default:
1888		/* needs it to the inactive queue due to a error. */
1889		data = STAILQ_FIRST(&sc->sc_rx_active);
1890		if (data != NULL) {
1891			STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1892			STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1893		}
1894		if (error != USB_ERR_CANCELLED) {
1895			usbd_xfer_set_stall(xfer);
1896			counter_u64_add(ic->ic_ierrors, 1);
1897			goto tr_setup;
1898		}
1899		break;
1900	}
1901
1902}
1903
1904static void
1905rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data)
1906{
1907#ifdef	USB_DEBUG
1908	struct rsu_softc *sc = usbd_xfer_softc(xfer);
1909#endif
1910
1911	RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n",
1912	    __func__,
1913	    data);
1914
1915	if (data->m) {
1916		/* XXX status? */
1917		ieee80211_tx_complete(data->ni, data->m, 0);
1918		data->m = NULL;
1919		data->ni = NULL;
1920	}
1921}
1922
1923static void
1924rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error,
1925    uint8_t which)
1926{
1927	struct rsu_softc *sc = usbd_xfer_softc(xfer);
1928	struct ieee80211com *ic = &sc->sc_ic;
1929	struct rsu_data *data;
1930
1931	RSU_ASSERT_LOCKED(sc);
1932
1933	switch (USB_GET_STATE(xfer)) {
1934	case USB_ST_TRANSFERRED:
1935		data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1936		if (data == NULL)
1937			goto tr_setup;
1938		RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n",
1939		    __func__, data);
1940		STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1941		rsu_txeof(xfer, data);
1942		rsu_freebuf(sc, data);
1943		/* FALLTHROUGH */
1944	case USB_ST_SETUP:
1945tr_setup:
1946		data = STAILQ_FIRST(&sc->sc_tx_pending[which]);
1947		if (data == NULL) {
1948			RSU_DPRINTF(sc, RSU_DEBUG_TXDONE,
1949			    "%s: empty pending queue sc %p\n", __func__, sc);
1950			return;
1951		}
1952		STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next);
1953		STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next);
1954		usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
1955		RSU_DPRINTF(sc, RSU_DEBUG_TXDONE,
1956		    "%s: submitting transfer %p\n",
1957		    __func__,
1958		    data);
1959		usbd_transfer_submit(xfer);
1960		break;
1961	default:
1962		data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1963		if (data != NULL) {
1964			STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1965			rsu_txeof(xfer, data);
1966			rsu_freebuf(sc, data);
1967		}
1968		counter_u64_add(ic->ic_oerrors, 1);
1969
1970		if (error != USB_ERR_CANCELLED) {
1971			usbd_xfer_set_stall(xfer);
1972			goto tr_setup;
1973		}
1974		break;
1975	}
1976}
1977
1978static void
1979rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error)
1980{
1981	struct rsu_softc *sc = usbd_xfer_softc(xfer);
1982
1983	rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK);
1984
1985	/* This kicks the TX taskqueue */
1986	rsu_start(sc);
1987}
1988
1989static void
1990rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error)
1991{
1992	struct rsu_softc *sc = usbd_xfer_softc(xfer);
1993
1994	rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO);
1995
1996	/* This kicks the TX taskqueue */
1997	rsu_start(sc);
1998}
1999
2000static void
2001rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error)
2002{
2003	struct rsu_softc *sc = usbd_xfer_softc(xfer);
2004
2005	rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C);
2006
2007	/* This kicks the TX taskqueue */
2008	rsu_start(sc);
2009}
2010
2011/*
2012 * Transmit the given frame.
2013 *
2014 * This doesn't free the node or mbuf upon failure.
2015 */
2016static int
2017rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni,
2018    struct mbuf *m0, struct rsu_data *data)
2019{
2020	struct ieee80211com *ic = &sc->sc_ic;
2021        struct ieee80211vap *vap = ni->ni_vap;
2022	struct ieee80211_frame *wh;
2023	struct ieee80211_key *k = NULL;
2024	struct r92s_tx_desc *txd;
2025	uint8_t type;
2026	int prio = 0;
2027	uint8_t which;
2028	int hasqos;
2029	int xferlen;
2030	int qid;
2031
2032	RSU_ASSERT_LOCKED(sc);
2033
2034	wh = mtod(m0, struct ieee80211_frame *);
2035	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2036
2037	RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n",
2038	    __func__, data, m0);
2039
2040	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
2041		k = ieee80211_crypto_encap(ni, m0);
2042		if (k == NULL) {
2043			device_printf(sc->sc_dev,
2044			    "ieee80211_crypto_encap returns NULL.\n");
2045			/* XXX we don't expect the fragmented frames */
2046			return (ENOBUFS);
2047		}
2048		wh = mtod(m0, struct ieee80211_frame *);
2049	}
2050	/* If we have QoS then use it */
2051	/* XXX TODO: mbuf WME/PRI versus TID? */
2052	if (IEEE80211_QOS_HAS_SEQ(wh)) {
2053		/* Has QoS */
2054		prio = M_WME_GETAC(m0);
2055		which = rsu_wme_ac_xfer_map[prio];
2056		hasqos = 1;
2057	} else {
2058		/* Non-QoS TID */
2059		/* XXX TODO: tid=0 for non-qos TID? */
2060		which = rsu_wme_ac_xfer_map[WME_AC_BE];
2061		hasqos = 0;
2062		prio = 0;
2063	}
2064
2065	qid = rsu_ac2qid[prio];
2066#if 0
2067	switch (type) {
2068	case IEEE80211_FC0_TYPE_CTL:
2069	case IEEE80211_FC0_TYPE_MGT:
2070		which = rsu_wme_ac_xfer_map[WME_AC_VO];
2071		break;
2072	default:
2073		which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)];
2074		break;
2075	}
2076	hasqos = 0;
2077#endif
2078
2079	RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n",
2080	    __func__,
2081	    prio,
2082	    which,
2083	    hasqos);
2084
2085	/* Fill Tx descriptor. */
2086	txd = (struct r92s_tx_desc *)data->buf;
2087	memset(txd, 0, sizeof(*txd));
2088
2089	txd->txdw0 |= htole32(
2090	    SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) |
2091	    SM(R92S_TXDW0_OFFSET, sizeof(*txd)) |
2092	    R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG);
2093
2094	txd->txdw1 |= htole32(
2095	    SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid));
2096	if (!hasqos)
2097		txd->txdw1 |= htole32(R92S_TXDW1_NONQOS);
2098#ifdef notyet
2099	if (k != NULL) {
2100		switch (k->wk_cipher->ic_cipher) {
2101		case IEEE80211_CIPHER_WEP:
2102			cipher = R92S_TXDW1_CIPHER_WEP;
2103			break;
2104		case IEEE80211_CIPHER_TKIP:
2105			cipher = R92S_TXDW1_CIPHER_TKIP;
2106			break;
2107		case IEEE80211_CIPHER_AES_CCM:
2108			cipher = R92S_TXDW1_CIPHER_AES;
2109			break;
2110		default:
2111			cipher = R92S_TXDW1_CIPHER_NONE;
2112		}
2113		txd->txdw1 |= htole32(
2114		    SM(R92S_TXDW1_CIPHER, cipher) |
2115		    SM(R92S_TXDW1_KEYIDX, k->k_id));
2116	}
2117#endif
2118	/* XXX todo: set AGGEN bit if appropriate? */
2119	txd->txdw2 |= htole32(R92S_TXDW2_BK);
2120	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
2121		txd->txdw2 |= htole32(R92S_TXDW2_BMCAST);
2122	/*
2123	 * Firmware will use and increment the sequence number for the
2124	 * specified priority.
2125	 */
2126	txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio));
2127
2128	if (ieee80211_radiotap_active_vap(vap)) {
2129		struct rsu_tx_radiotap_header *tap = &sc->sc_txtap;
2130
2131		tap->wt_flags = 0;
2132		tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
2133		tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
2134		ieee80211_radiotap_tx(vap, m0);
2135	}
2136
2137	xferlen = sizeof(*txd) + m0->m_pkthdr.len;
2138	m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]);
2139
2140	data->buflen = xferlen;
2141	data->ni = ni;
2142	data->m = m0;
2143	STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next);
2144
2145	/* start transfer, if any */
2146	usbd_transfer_start(sc->sc_xfer[which]);
2147	return (0);
2148}
2149
2150static int
2151rsu_transmit(struct ieee80211com *ic, struct mbuf *m)
2152{
2153	struct rsu_softc *sc = ic->ic_softc;
2154	int error;
2155
2156	RSU_LOCK(sc);
2157	if (!sc->sc_running) {
2158		RSU_UNLOCK(sc);
2159		return (ENXIO);
2160	}
2161
2162	/*
2163	 * XXX TODO: ensure that we treat 'm' as a list of frames
2164	 * to transmit!
2165	 */
2166	error = mbufq_enqueue(&sc->sc_snd, m);
2167	if (error) {
2168		RSU_DPRINTF(sc, RSU_DEBUG_TX,
2169		    "%s: mbufq_enable: failed (%d)\n",
2170		    __func__,
2171		    error);
2172		RSU_UNLOCK(sc);
2173		return (error);
2174	}
2175	RSU_UNLOCK(sc);
2176
2177	/* This kicks the TX taskqueue */
2178	rsu_start(sc);
2179
2180	return (0);
2181}
2182
2183static void
2184rsu_drain_mbufq(struct rsu_softc *sc)
2185{
2186	struct mbuf *m;
2187	struct ieee80211_node *ni;
2188
2189	RSU_ASSERT_LOCKED(sc);
2190	while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
2191		ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
2192		m->m_pkthdr.rcvif = NULL;
2193		ieee80211_free_node(ni);
2194		m_freem(m);
2195	}
2196}
2197
2198static void
2199_rsu_start(struct rsu_softc *sc)
2200{
2201	struct ieee80211_node *ni;
2202	struct rsu_data *bf;
2203	struct mbuf *m;
2204
2205	RSU_ASSERT_LOCKED(sc);
2206
2207	while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
2208		bf = rsu_getbuf(sc);
2209		if (bf == NULL) {
2210			RSU_DPRINTF(sc, RSU_DEBUG_TX,
2211			    "%s: failed to get buffer\n", __func__);
2212			mbufq_prepend(&sc->sc_snd, m);
2213			break;
2214		}
2215
2216		ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
2217		m->m_pkthdr.rcvif = NULL;
2218
2219		if (rsu_tx_start(sc, ni, m, bf) != 0) {
2220			RSU_DPRINTF(sc, RSU_DEBUG_TX,
2221			    "%s: failed to transmit\n", __func__);
2222			if_inc_counter(ni->ni_vap->iv_ifp,
2223			    IFCOUNTER_OERRORS, 1);
2224			rsu_freebuf(sc, bf);
2225			ieee80211_free_node(ni);
2226			m_freem(m);
2227			break;
2228		}
2229	}
2230}
2231
2232static void
2233rsu_start(struct rsu_softc *sc)
2234{
2235
2236	taskqueue_enqueue(taskqueue_thread, &sc->tx_task);
2237}
2238
2239static void
2240rsu_parent(struct ieee80211com *ic)
2241{
2242	struct rsu_softc *sc = ic->ic_softc;
2243	int startall = 0;
2244
2245	RSU_LOCK(sc);
2246	if (ic->ic_nrunning > 0) {
2247		if (!sc->sc_running) {
2248			rsu_init(sc);
2249			startall = 1;
2250		}
2251	} else if (sc->sc_running)
2252		rsu_stop(sc);
2253	RSU_UNLOCK(sc);
2254
2255	if (startall)
2256		ieee80211_start_all(ic);
2257}
2258
2259/*
2260 * Power on sequence for A-cut adapters.
2261 */
2262static void
2263rsu_power_on_acut(struct rsu_softc *sc)
2264{
2265	uint32_t reg;
2266
2267	rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53);
2268	rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57);
2269
2270	/* Enable AFE macro block's bandgap and Mbias. */
2271	rsu_write_1(sc, R92S_AFE_MISC,
2272	    rsu_read_1(sc, R92S_AFE_MISC) |
2273	    R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN);
2274	/* Enable LDOA15 block. */
2275	rsu_write_1(sc, R92S_LDOA15_CTRL,
2276	    rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN);
2277
2278	rsu_write_1(sc, R92S_SPS1_CTRL,
2279	    rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN);
2280	rsu_ms_delay(sc, 2000);
2281	/* Enable switch regulator block. */
2282	rsu_write_1(sc, R92S_SPS1_CTRL,
2283	    rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN);
2284
2285	rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267);
2286
2287	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2288	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08);
2289
2290	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2291	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20);
2292
2293	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2294	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90);
2295
2296	/* Enable AFE clock. */
2297	rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1,
2298	    rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04);
2299	/* Enable AFE PLL macro block. */
2300	rsu_write_1(sc, R92S_AFE_PLL_CTRL,
2301	    rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11);
2302	/* Attach AFE PLL to MACTOP/BB. */
2303	rsu_write_1(sc, R92S_SYS_ISO_CTRL,
2304	    rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11);
2305
2306	/* Switch to 40MHz clock instead of 80MHz. */
2307	rsu_write_2(sc, R92S_SYS_CLKR,
2308	    rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL);
2309
2310	/* Enable MAC clock. */
2311	rsu_write_2(sc, R92S_SYS_CLKR,
2312	    rsu_read_2(sc, R92S_SYS_CLKR) |
2313	    R92S_MAC_CLK_EN | R92S_SYS_CLK_EN);
2314
2315	rsu_write_1(sc, R92S_PMC_FSM, 0x02);
2316
2317	/* Enable digital core and IOREG R/W. */
2318	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2319	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08);
2320
2321	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2322	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80);
2323
2324	/* Switch the control path to firmware. */
2325	reg = rsu_read_2(sc, R92S_SYS_CLKR);
2326	reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL;
2327	rsu_write_2(sc, R92S_SYS_CLKR, reg);
2328
2329	rsu_write_2(sc, R92S_CR, 0x37fc);
2330
2331	/* Fix USB RX FIFO issue. */
2332	rsu_write_1(sc, 0xfe5c,
2333	    rsu_read_1(sc, 0xfe5c) | 0x80);
2334	rsu_write_1(sc, 0x00ab,
2335	    rsu_read_1(sc, 0x00ab) | 0xc0);
2336
2337	rsu_write_1(sc, R92S_SYS_CLKR,
2338	    rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL);
2339}
2340
2341/*
2342 * Power on sequence for B-cut and C-cut adapters.
2343 */
2344static void
2345rsu_power_on_bcut(struct rsu_softc *sc)
2346{
2347	uint32_t reg;
2348	int ntries;
2349
2350	/* Prevent eFuse leakage. */
2351	rsu_write_1(sc, 0x37, 0xb0);
2352	rsu_ms_delay(sc, 10);
2353	rsu_write_1(sc, 0x37, 0x30);
2354
2355	/* Switch the control path to hardware. */
2356	reg = rsu_read_2(sc, R92S_SYS_CLKR);
2357	if (reg & R92S_FWHW_SEL) {
2358		rsu_write_2(sc, R92S_SYS_CLKR,
2359		    reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL));
2360	}
2361	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2362	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c);
2363	rsu_ms_delay(sc, 1);
2364
2365	rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53);
2366	rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57);
2367
2368	reg = rsu_read_1(sc, R92S_AFE_MISC);
2369	rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN);
2370	rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN |
2371	    R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN);
2372
2373	/* Enable PLL. */
2374	rsu_write_1(sc, R92S_LDOA15_CTRL,
2375	    rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN);
2376
2377	rsu_write_1(sc, R92S_LDOV12D_CTRL,
2378	    rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN);
2379
2380	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2381	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08);
2382
2383	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2384	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20);
2385
2386	/* Support 64KB IMEM. */
2387	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2388	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97);
2389
2390	/* Enable AFE clock. */
2391	rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1,
2392	    rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04);
2393	/* Enable AFE PLL macro block. */
2394	reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL);
2395	rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11);
2396	rsu_ms_delay(sc, 1);
2397	rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51);
2398	rsu_ms_delay(sc, 1);
2399	rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11);
2400	rsu_ms_delay(sc, 1);
2401
2402	/* Attach AFE PLL to MACTOP/BB. */
2403	rsu_write_1(sc, R92S_SYS_ISO_CTRL,
2404	    rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11);
2405
2406	/* Switch to 40MHz clock. */
2407	rsu_write_1(sc, R92S_SYS_CLKR, 0x00);
2408	/* Disable CPU clock and 80MHz SSC. */
2409	rsu_write_1(sc, R92S_SYS_CLKR,
2410	    rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0);
2411	/* Enable MAC clock. */
2412	rsu_write_2(sc, R92S_SYS_CLKR,
2413	    rsu_read_2(sc, R92S_SYS_CLKR) |
2414	    R92S_MAC_CLK_EN | R92S_SYS_CLK_EN);
2415
2416	rsu_write_1(sc, R92S_PMC_FSM, 0x02);
2417
2418	/* Enable digital core and IOREG R/W. */
2419	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2420	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08);
2421
2422	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2423	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80);
2424
2425	/* Switch the control path to firmware. */
2426	reg = rsu_read_2(sc, R92S_SYS_CLKR);
2427	reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL;
2428	rsu_write_2(sc, R92S_SYS_CLKR, reg);
2429
2430	rsu_write_2(sc, R92S_CR, 0x37fc);
2431
2432	/* Fix USB RX FIFO issue. */
2433	rsu_write_1(sc, 0xfe5c,
2434	    rsu_read_1(sc, 0xfe5c) | 0x80);
2435
2436	rsu_write_1(sc, R92S_SYS_CLKR,
2437	    rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL);
2438
2439	rsu_write_1(sc, 0xfe1c, 0x80);
2440
2441	/* Make sure TxDMA is ready to download firmware. */
2442	for (ntries = 0; ntries < 20; ntries++) {
2443		reg = rsu_read_1(sc, R92S_TCR);
2444		if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) ==
2445		    (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT))
2446			break;
2447		rsu_ms_delay(sc, 1);
2448	}
2449	if (ntries == 20) {
2450		RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX,
2451		    "%s: TxDMA is not ready\n",
2452		    __func__);
2453		/* Reset TxDMA. */
2454		reg = rsu_read_1(sc, R92S_CR);
2455		rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN);
2456		rsu_ms_delay(sc, 1);
2457		rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN);
2458	}
2459}
2460
2461static void
2462rsu_power_off(struct rsu_softc *sc)
2463{
2464	/* Turn RF off. */
2465	rsu_write_1(sc, R92S_RF_CTRL, 0x00);
2466	rsu_ms_delay(sc, 5);
2467
2468	/* Turn MAC off. */
2469	/* Switch control path. */
2470	rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38);
2471	/* Reset MACTOP. */
2472	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70);
2473	rsu_write_1(sc, R92S_PMC_FSM, 0x06);
2474	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9);
2475	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8);
2476
2477	/* Disable AFE PLL. */
2478	rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00);
2479	/* Disable A15V. */
2480	rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54);
2481	/* Disable eFuse 1.2V. */
2482	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50);
2483	rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24);
2484	/* Enable AFE macro block's bandgap and Mbias. */
2485	rsu_write_1(sc, R92S_AFE_MISC, 0x30);
2486	/* Disable 1.6V LDO. */
2487	rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56);
2488	rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43);
2489
2490	/* Firmware - tell it to switch things off */
2491	(void) rsu_set_fw_power_state(sc, RSU_PWR_OFF);
2492}
2493
2494static int
2495rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len)
2496{
2497	const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO];
2498	struct rsu_data *data;
2499	struct r92s_tx_desc *txd;
2500	int mlen;
2501
2502	while (len > 0) {
2503		data = rsu_getbuf(sc);
2504		if (data == NULL)
2505			return (ENOMEM);
2506		txd = (struct r92s_tx_desc *)data->buf;
2507		memset(txd, 0, sizeof(*txd));
2508		if (len <= RSU_TXBUFSZ - sizeof(*txd)) {
2509			/* Last chunk. */
2510			txd->txdw0 |= htole32(R92S_TXDW0_LINIP);
2511			mlen = len;
2512		} else
2513			mlen = RSU_TXBUFSZ - sizeof(*txd);
2514		txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen));
2515		memcpy(&txd[1], buf, mlen);
2516		data->buflen = sizeof(*txd) + mlen;
2517		RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET,
2518		    "%s: starting transfer %p\n",
2519		    __func__, data);
2520		STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next);
2521		buf += mlen;
2522		len -= mlen;
2523	}
2524	usbd_transfer_start(sc->sc_xfer[which]);
2525	return (0);
2526}
2527
2528static int
2529rsu_load_firmware(struct rsu_softc *sc)
2530{
2531	const struct r92s_fw_hdr *hdr;
2532	struct r92s_fw_priv *dmem;
2533	struct ieee80211com *ic = &sc->sc_ic;
2534	const uint8_t *imem, *emem;
2535	int imemsz, ememsz;
2536	const struct firmware *fw;
2537	size_t size;
2538	uint32_t reg;
2539	int ntries, error;
2540
2541	if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) {
2542		RSU_DPRINTF(sc, RSU_DEBUG_ANY,
2543		    "%s: Firmware already loaded\n",
2544		    __func__);
2545		return (0);
2546	}
2547
2548	RSU_UNLOCK(sc);
2549	/* Read firmware image from the filesystem. */
2550	if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) {
2551		device_printf(sc->sc_dev,
2552		    "%s: failed load firmware of file rsu-rtl8712fw\n",
2553		    __func__);
2554		RSU_LOCK(sc);
2555		return (ENXIO);
2556	}
2557	RSU_LOCK(sc);
2558	size = fw->datasize;
2559	if (size < sizeof(*hdr)) {
2560		device_printf(sc->sc_dev, "firmware too short\n");
2561		error = EINVAL;
2562		goto fail;
2563	}
2564	hdr = (const struct r92s_fw_hdr *)fw->data;
2565	if (hdr->signature != htole16(0x8712) &&
2566	    hdr->signature != htole16(0x8192)) {
2567		device_printf(sc->sc_dev,
2568		    "invalid firmware signature 0x%x\n",
2569		    le16toh(hdr->signature));
2570		error = EINVAL;
2571		goto fail;
2572	}
2573	DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version),
2574	    hdr->month, hdr->day, hdr->hour, hdr->minute);
2575
2576	/* Make sure that driver and firmware are in sync. */
2577	if (hdr->privsz != htole32(sizeof(*dmem))) {
2578		device_printf(sc->sc_dev, "unsupported firmware image\n");
2579		error = EINVAL;
2580		goto fail;
2581	}
2582	/* Get FW sections sizes. */
2583	imemsz = le32toh(hdr->imemsz);
2584	ememsz = le32toh(hdr->sramsz);
2585	/* Check that all FW sections fit in image. */
2586	if (size < sizeof(*hdr) + imemsz + ememsz) {
2587		device_printf(sc->sc_dev, "firmware too short\n");
2588		error = EINVAL;
2589		goto fail;
2590	}
2591	imem = (const uint8_t *)&hdr[1];
2592	emem = imem + imemsz;
2593
2594	/* Load IMEM section. */
2595	error = rsu_fw_loadsection(sc, imem, imemsz);
2596	if (error != 0) {
2597		device_printf(sc->sc_dev,
2598		    "could not load firmware section %s\n", "IMEM");
2599		goto fail;
2600	}
2601	/* Wait for load to complete. */
2602	for (ntries = 0; ntries != 50; ntries++) {
2603		rsu_ms_delay(sc, 10);
2604		reg = rsu_read_1(sc, R92S_TCR);
2605		if (reg & R92S_TCR_IMEM_CODE_DONE)
2606			break;
2607	}
2608	if (ntries == 50) {
2609		device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n");
2610		error = ETIMEDOUT;
2611		goto fail;
2612	}
2613	/* Load EMEM section. */
2614	error = rsu_fw_loadsection(sc, emem, ememsz);
2615	if (error != 0) {
2616		device_printf(sc->sc_dev,
2617		    "could not load firmware section %s\n", "EMEM");
2618		goto fail;
2619	}
2620	/* Wait for load to complete. */
2621	for (ntries = 0; ntries != 50; ntries++) {
2622		rsu_ms_delay(sc, 10);
2623		reg = rsu_read_2(sc, R92S_TCR);
2624		if (reg & R92S_TCR_EMEM_CODE_DONE)
2625			break;
2626	}
2627	if (ntries == 50) {
2628		device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n");
2629		error = ETIMEDOUT;
2630		goto fail;
2631	}
2632	/* Enable CPU. */
2633	rsu_write_1(sc, R92S_SYS_CLKR,
2634	    rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL);
2635	if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) {
2636		device_printf(sc->sc_dev, "could not enable system clock\n");
2637		error = EIO;
2638		goto fail;
2639	}
2640	rsu_write_2(sc, R92S_SYS_FUNC_EN,
2641	    rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN);
2642	if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) {
2643		device_printf(sc->sc_dev,
2644		    "could not enable microcontroller\n");
2645		error = EIO;
2646		goto fail;
2647	}
2648	/* Wait for CPU to initialize. */
2649	for (ntries = 0; ntries < 100; ntries++) {
2650		if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY)
2651			break;
2652		rsu_ms_delay(sc, 1);
2653	}
2654	if (ntries == 100) {
2655		device_printf(sc->sc_dev,
2656		    "timeout waiting for microcontroller\n");
2657		error = ETIMEDOUT;
2658		goto fail;
2659	}
2660
2661	/* Update DMEM section before loading. */
2662	dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv);
2663	memset(dmem, 0, sizeof(*dmem));
2664	dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172;
2665	dmem->nendpoints = sc->sc_nendpoints;
2666	dmem->chip_version = sc->cut;
2667	/* XXX TODO: rf_config should come from ROM */
2668	dmem->rf_config = 0x11;	/* 1T1R */
2669	dmem->vcs_type = R92S_VCS_TYPE_AUTO;
2670	dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS;
2671	dmem->turbo_mode = 0;
2672	dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40);
2673	dmem->amsdu2ampdu_en = !! (sc->sc_ht);
2674	dmem->ampdu_en = !! (sc->sc_ht);
2675	dmem->agg_offload = !! (sc->sc_ht);
2676	dmem->qos_en = 1;
2677	dmem->ps_offload = 1;
2678	dmem->lowpower_mode = 1;	/* XXX TODO: configurable? */
2679	/* Load DMEM section. */
2680	error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem));
2681	if (error != 0) {
2682		device_printf(sc->sc_dev,
2683		    "could not load firmware section %s\n", "DMEM");
2684		goto fail;
2685	}
2686	/* Wait for load to complete. */
2687	for (ntries = 0; ntries < 100; ntries++) {
2688		if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE)
2689			break;
2690		rsu_ms_delay(sc, 1);
2691	}
2692	if (ntries == 100) {
2693		device_printf(sc->sc_dev, "timeout waiting for %s transfer\n",
2694		    "DMEM");
2695		error = ETIMEDOUT;
2696		goto fail;
2697	}
2698	/* Wait for firmware readiness. */
2699	for (ntries = 0; ntries < 60; ntries++) {
2700		if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY))
2701			break;
2702		rsu_ms_delay(sc, 1);
2703	}
2704	if (ntries == 60) {
2705		device_printf(sc->sc_dev,
2706		    "timeout waiting for firmware readiness\n");
2707		error = ETIMEDOUT;
2708		goto fail;
2709	}
2710 fail:
2711	firmware_put(fw, FIRMWARE_UNLOAD);
2712	return (error);
2713}
2714
2715
2716static int
2717rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2718    const struct ieee80211_bpf_params *params)
2719{
2720	struct ieee80211com *ic = ni->ni_ic;
2721	struct rsu_softc *sc = ic->ic_softc;
2722	struct rsu_data *bf;
2723
2724	/* prevent management frames from being sent if we're not ready */
2725	if (!sc->sc_running) {
2726		m_freem(m);
2727		ieee80211_free_node(ni);
2728		return (ENETDOWN);
2729	}
2730	RSU_LOCK(sc);
2731	bf = rsu_getbuf(sc);
2732	if (bf == NULL) {
2733		ieee80211_free_node(ni);
2734		m_freem(m);
2735		RSU_UNLOCK(sc);
2736		return (ENOBUFS);
2737	}
2738	if (rsu_tx_start(sc, ni, m, bf) != 0) {
2739		ieee80211_free_node(ni);
2740		m_freem(m);
2741		rsu_freebuf(sc, bf);
2742		RSU_UNLOCK(sc);
2743		return (EIO);
2744	}
2745	RSU_UNLOCK(sc);
2746
2747	return (0);
2748}
2749
2750static void
2751rsu_init(struct rsu_softc *sc)
2752{
2753	struct ieee80211com *ic = &sc->sc_ic;
2754	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2755	uint8_t macaddr[IEEE80211_ADDR_LEN];
2756	int error;
2757	int i;
2758
2759	RSU_ASSERT_LOCKED(sc);
2760
2761	/* Ensure the mbuf queue is drained */
2762	rsu_drain_mbufq(sc);
2763
2764	/* Init host async commands ring. */
2765	sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0;
2766
2767	/* Reset power management state. */
2768	rsu_write_1(sc, R92S_USB_HRPWM, 0);
2769
2770	/* Power on adapter. */
2771	if (sc->cut == 1)
2772		rsu_power_on_acut(sc);
2773	else
2774		rsu_power_on_bcut(sc);
2775
2776	/* Load firmware. */
2777	error = rsu_load_firmware(sc);
2778	if (error != 0)
2779		goto fail;
2780
2781	/* Enable Rx TCP checksum offload. */
2782	rsu_write_4(sc, R92S_RCR,
2783	    rsu_read_4(sc, R92S_RCR) | 0x04000000);
2784	/* Append PHY status. */
2785	rsu_write_4(sc, R92S_RCR,
2786	    rsu_read_4(sc, R92S_RCR) | 0x02000000);
2787
2788	rsu_write_4(sc, R92S_CR,
2789	    rsu_read_4(sc, R92S_CR) & ~0xff000000);
2790
2791	/* Use 128 bytes pages. */
2792	rsu_write_1(sc, 0x00b5,
2793	    rsu_read_1(sc, 0x00b5) | 0x01);
2794	/* Enable USB Rx aggregation. */
2795	rsu_write_1(sc, 0x00bd,
2796	    rsu_read_1(sc, 0x00bd) | 0x80);
2797	/* Set USB Rx aggregation threshold. */
2798	rsu_write_1(sc, 0x00d9, 0x01);
2799	/* Set USB Rx aggregation timeout (1.7ms/4). */
2800	rsu_write_1(sc, 0xfe5b, 0x04);
2801	/* Fix USB Rx FIFO issue. */
2802	rsu_write_1(sc, 0xfe5c,
2803	    rsu_read_1(sc, 0xfe5c) | 0x80);
2804
2805	/* Set MAC address. */
2806	IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr);
2807	rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN);
2808
2809	/* It really takes 1.5 seconds for the firmware to boot: */
2810	rsu_ms_delay(sc, 2000);
2811
2812	RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n",
2813	    __func__,
2814	    ether_sprintf(macaddr));
2815	error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr,
2816	    IEEE80211_ADDR_LEN);
2817	if (error != 0) {
2818		device_printf(sc->sc_dev, "could not set MAC address\n");
2819		goto fail;
2820	}
2821
2822	/* Set PS mode fully active */
2823	error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE);
2824
2825	if (error != 0) {
2826		device_printf(sc->sc_dev, "could not set PS mode\n");
2827		goto fail;
2828	}
2829
2830	sc->sc_scan_pass = 0;
2831	usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]);
2832
2833	/* We're ready to go. */
2834	sc->sc_running = 1;
2835	sc->sc_scanning = 0;
2836	return;
2837fail:
2838	/* Need to stop all failed transfers, if any */
2839	for (i = 0; i != RSU_N_TRANSFER; i++)
2840		usbd_transfer_stop(sc->sc_xfer[i]);
2841}
2842
2843static void
2844rsu_stop(struct rsu_softc *sc)
2845{
2846	int i;
2847
2848	RSU_ASSERT_LOCKED(sc);
2849
2850	sc->sc_running = 0;
2851	sc->sc_calibrating = 0;
2852	taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL);
2853	taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL);
2854
2855	/* Power off adapter. */
2856	rsu_power_off(sc);
2857
2858	for (i = 0; i < RSU_N_TRANSFER; i++)
2859		usbd_transfer_stop(sc->sc_xfer[i]);
2860
2861	/* Ensure the mbuf queue is drained */
2862	rsu_drain_mbufq(sc);
2863}
2864
2865/*
2866 * Note: usb_pause_mtx() actually releases the mutex before calling pause(),
2867 * which breaks any kind of driver serialisation.
2868 */
2869static void
2870rsu_ms_delay(struct rsu_softc *sc, int ms)
2871{
2872
2873	//usb_pause_mtx(&sc->sc_mtx, hz / 1000);
2874	DELAY(ms * 1000);
2875}
2876