if_udavreg.h revision 196219
1330567Sgordon/* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */ 2275970Scy/* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */ 3275970Scy/* $FreeBSD: head/sys/dev/usb/net/if_udavreg.h 196219 2009-08-14 20:03:53Z jhb $ */ 4275970Scy/*- 5275970Scy * Copyright (c) 2003 6330567Sgordon * Shingo WATANABE <nabe@nabechan.org>. All rights reserved. 7275970Scy * 8275970Scy * Redistribution and use in source and binary forms, with or without 9275970Scy * modification, are permitted provided that the following conditions 10275970Scy * are met: 11275970Scy * 1. Redistributions of source code must retain the above copyright 12275970Scy * notice, this list of conditions and the following disclaimer. 13275970Scy * 2. Redistributions in binary form must reproduce the above copyright 14275970Scy * notice, this list of conditions and the following disclaimer in the 15275970Scy * documentation and/or other materials provided with the distribution. 16275970Scy * 3. Neither the name of the author nor the names of any co-contributors 17275970Scy * may be used to endorse or promote products derived from this software 18275970Scy * without specific prior written permission. 19275970Scy * 20275970Scy * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21275970Scy * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22275970Scy * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23275970Scy * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24275970Scy * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25275970Scy * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26275970Scy * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27275970Scy * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28275970Scy * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29275970Scy * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30275970Scy * SUCH DAMAGE. 31275970Scy * 32275970Scy */ 33275970Scy 34275970Scy#define UDAV_IFACE_INDEX 0 35275970Scy#define UDAV_CONFIG_INDEX 0 /* config number 1 */ 36275970Scy 37275970Scy#define UDAV_TX_TIMEOUT 1000 38275970Scy#define UDAV_TIMEOUT 10000 39275970Scy 40275970Scy#define UDAV_TX_TIMEOUT 1000 41275970Scy#define UDAV_TIMEOUT 10000 42275970Scy 43275970Scy/* Packet length */ 44275970Scy#define UDAV_MIN_FRAME_LEN 60 45275970Scy 46275970Scy/* Request */ 47275970Scy#define UDAV_REQ_REG_READ 0x00 /* Read from register(s) */ 48275970Scy#define UDAV_REQ_REG_WRITE 0x01 /* Write to register(s) */ 49275970Scy#define UDAV_REQ_REG_WRITE1 0x03 /* Write to a register */ 50275970Scy 51275970Scy#define UDAV_REQ_MEM_READ 0x02 /* Read from memory */ 52275970Scy#define UDAV_REQ_MEM_WRITE 0x05 /* Write to memory */ 53275970Scy#define UDAV_REQ_MEM_WRITE1 0x07 /* Write a byte to memory */ 54275970Scy 55275970Scy/* Registers */ 56275970Scy#define UDAV_NCR 0x00 /* Network Control Register */ 57275970Scy#define UDAV_NCR_EXT_PHY (1<<7) /* Select External PHY */ 58275970Scy#define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */ 59275970Scy#define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */ 60275970Scy#define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */ 61275970Scy#define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */ 62275970Scy#define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */ 63275970Scy#define UDAV_NCR_RST (1<<0) /* Software reset */ 64275970Scy 65275970Scy#define UDAV_RCR 0x05 /* RX Control Register */ 66275970Scy#define UDAV_RCR_WTDIS (1<<6) /* Watchdog Timer Disable */ 67275970Scy#define UDAV_RCR_DIS_LONG (1<<5) /* Discard Long Packet(over 1522Byte) */ 68275970Scy#define UDAV_RCR_DIS_CRC (1<<4) /* Discard CRC Error Packet */ 69275970Scy#define UDAV_RCR_ALL (1<<3) /* Pass All Multicast */ 70275970Scy#define UDAV_RCR_RUNT (1<<2) /* Pass Runt Packet */ 71275970Scy#define UDAV_RCR_PRMSC (1<<1) /* Promiscuous Mode */ 72275970Scy#define UDAV_RCR_RXEN (1<<0) /* RX Enable */ 73275970Scy 74275970Scy#define UDAV_RSR 0x06 /* RX Status Register */ 75275970Scy#define UDAV_RSR_RF (1<<7) /* Runt Frame */ 76275970Scy#define UDAV_RSR_MF (1<<6) /* Multicast Frame */ 77275970Scy#define UDAV_RSR_LCS (1<<5) /* Late Collision Seen */ 78275970Scy#define UDAV_RSR_RWTO (1<<4) /* Receive Watchdog Time-Out */ 79275970Scy#define UDAV_RSR_PLE (1<<3) /* Physical Layer Error */ 80275970Scy#define UDAV_RSR_AE (1<<2) /* Alignment Error */ 81275970Scy#define UDAV_RSR_CE (1<<1) /* CRC Error */ 82275970Scy#define UDAV_RSR_FOE (1<<0) /* FIFO Overflow Error */ 83275970Scy#define UDAV_RSR_ERR (UDAV_RSR_RF | UDAV_RSR_LCS | \ 84275970Scy UDAV_RSR_RWTO | UDAV_RSR_PLE | \ 85275970Scy UDAV_RSR_AE | UDAV_RSR_CE | UDAV_RSR_FOE) 86275970Scy 87275970Scy#define UDAV_EPCR 0x0b /* EEPROM & PHY Control Register */ 88275970Scy#define UDAV_EPCR_REEP (1<<5) /* Reload EEPROM */ 89275970Scy#define UDAV_EPCR_WEP (1<<4) /* Write EEPROM enable */ 90275970Scy#define UDAV_EPCR_EPOS (1<<3) /* EEPROM or PHY Operation Select */ 91275970Scy#define UDAV_EPCR_ERPRR (1<<2) /* EEPROM/PHY Register Read Command */ 92275970Scy#define UDAV_EPCR_ERPRW (1<<1) /* EEPROM/PHY Register Write Command */ 93275970Scy#define UDAV_EPCR_ERRE (1<<0) /* EEPROM/PHY Access Status */ 94275970Scy 95275970Scy#define UDAV_EPAR 0x0c /* EEPROM & PHY Control Register */ 96275970Scy#define UDAV_EPAR_PHY_ADR1 (1<<7) /* PHY Address bit 1 */ 97275970Scy#define UDAV_EPAR_PHY_ADR0 (1<<6) /* PHY Address bit 0 */ 98275970Scy#define UDAV_EPAR_EROA (1<<0) /* EEPROM Word/PHY Register Address */ 99275970Scy#define UDAV_EPAR_EROA_MASK (0x1f) /* [5:0] */ 100275970Scy 101275970Scy#define UDAV_EPDRL 0x0d /* EEPROM & PHY Data Register */ 102275970Scy#define UDAV_EPDRH 0x0e /* EEPROM & PHY Data Register */ 103275970Scy 104275970Scy#define UDAV_PAR0 0x10 /* Ethernet Address, load from EEPROM */ 105275970Scy#define UDAV_PAR1 0x11 /* Ethernet Address, load from EEPROM */ 106275970Scy#define UDAV_PAR2 0x12 /* Ethernet Address, load from EEPROM */ 107275970Scy#define UDAV_PAR3 0x13 /* Ethernet Address, load from EEPROM */ 108275970Scy#define UDAV_PAR4 0x14 /* Ethernet Address, load from EEPROM */ 109275970Scy#define UDAV_PAR5 0x15 /* Ethernet Address, load from EEPROM */ 110275970Scy#define UDAV_PAR UDAV_PAR0 111275970Scy 112275970Scy#define UDAV_MAR0 0x16 /* Multicast Register */ 113275970Scy#define UDAV_MAR1 0x17 /* Multicast Register */ 114298770Sdelphij#define UDAV_MAR2 0x18 /* Multicast Register */ 115298770Sdelphij#define UDAV_MAR3 0x19 /* Multicast Register */ 116298770Sdelphij#define UDAV_MAR4 0x1a /* Multicast Register */ 117298770Sdelphij#define UDAV_MAR5 0x1b /* Multicast Register */ 118298770Sdelphij#define UDAV_MAR6 0x1c /* Multicast Register */ 119298770Sdelphij#define UDAV_MAR7 0x1d /* Multicast Register */ 120298770Sdelphij#define UDAV_MAR UDAV_MAR0 121298770Sdelphij 122275970Scy#define UDAV_GPCR 0x1e /* General purpose control register */ 123275970Scy#define UDAV_GPCR_GEP_CNTL6 (1<<6) /* General purpose control 6 */ 124275970Scy#define UDAV_GPCR_GEP_CNTL5 (1<<5) /* General purpose control 5 */ 125275970Scy#define UDAV_GPCR_GEP_CNTL4 (1<<4) /* General purpose control 4 */ 126275970Scy#define UDAV_GPCR_GEP_CNTL3 (1<<3) /* General purpose control 3 */ 127275970Scy#define UDAV_GPCR_GEP_CNTL2 (1<<2) /* General purpose control 2 */ 128275970Scy#define UDAV_GPCR_GEP_CNTL1 (1<<1) /* General purpose control 1 */ 129275970Scy#define UDAV_GPCR_GEP_CNTL0 (1<<0) /* General purpose control 0 */ 130275970Scy 131275970Scy#define UDAV_GPR 0x1f /* General purpose register */ 132275970Scy#define UDAV_GPR_GEPIO6 (1<<6) /* General purpose 6 */ 133275970Scy#define UDAV_GPR_GEPIO5 (1<<5) /* General purpose 5 */ 134275970Scy#define UDAV_GPR_GEPIO4 (1<<4) /* General purpose 4 */ 135275970Scy#define UDAV_GPR_GEPIO3 (1<<3) /* General purpose 3 */ 136275970Scy#define UDAV_GPR_GEPIO2 (1<<2) /* General purpose 2 */ 137275970Scy#define UDAV_GPR_GEPIO1 (1<<1) /* General purpose 1 */ 138275970Scy#define UDAV_GPR_GEPIO0 (1<<0) /* General purpose 0 */ 139275970Scy 140275970Scy#define GET_MII(sc) uether_getmii(&(sc)->sc_ue) 141275970Scy 142275970Scystruct udav_rxpkt { 143275970Scy uint8_t rxstat; 144275970Scy uint16_t pktlen; 145275970Scy} __packed; 146275970Scy 147275970Scyenum { 148275970Scy UDAV_BULK_DT_WR, 149275970Scy UDAV_BULK_DT_RD, 150275970Scy UDAV_INTR_DT_RD, 151275970Scy UDAV_N_TRANSFER, 152275970Scy}; 153275970Scy 154275970Scystruct udav_softc { 155275970Scy struct usb_ether sc_ue; 156298770Sdelphij struct mtx sc_mtx; 157275970Scy struct usb_xfer *sc_xfer[UDAV_N_TRANSFER]; 158275970Scy 159275970Scy int sc_flags; 160275970Scy#define UDAV_FLAG_LINK 0x0001 161275970Scy#define UDAV_FLAG_EXT_PHY 0x0040 162275970Scy}; 163275970Scy 164298770Sdelphij#define UDAV_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 165298770Sdelphij#define UDAV_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 166275970Scy#define UDAV_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 167275970Scy