if_axe.c revision 186730
1/*- 2 * Copyright (c) 1997, 1998, 1999, 2000-2003 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/dev/usb2/ethernet/if_axe2.c 186730 2009-01-04 00:12:01Z alfred $"); 35 36/* 37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver. Used in the 38 * LinkSys USB200M and various other adapters. 39 * 40 * Manuals available from: 41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 43 * controller) to find the definitions for the RX control register. 44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 45 * 46 * Written by Bill Paul <wpaul@windriver.com> 47 * Senior Engineer 48 * Wind River Systems 49 */ 50 51/* 52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 53 * It uses an external PHY (reference designs use a RealTek chip), 54 * and has a 64-bit multicast hash filter. There is some information 55 * missing from the manual which one needs to know in order to make 56 * the chip function: 57 * 58 * - You must set bit 7 in the RX control register, otherwise the 59 * chip won't receive any packets. 60 * - You must initialize all 3 IPG registers, or you won't be able 61 * to send any packets. 62 * 63 * Note that this device appears to only support loading the station 64 * address via autload from the EEPROM (i.e. there's no way to manaully 65 * set it). 66 * 67 * (Adam Weinberger wanted me to name this driver if_gir.c.) 68 */ 69 70/* 71 * Ax88178 and Ax88772 support backported from the OpenBSD driver. 72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com 73 * 74 * Manual here: 75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf 76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf 77 */ 78 79/* 80 * NOTE: all function names beginning like "axe_cfg_" can only 81 * be called from within the config thread function ! 82 */ 83 84#include <dev/usb2/include/usb2_devid.h> 85#include <dev/usb2/include/usb2_standard.h> 86#include <dev/usb2/include/usb2_mfunc.h> 87#include <dev/usb2/include/usb2_error.h> 88 89#define usb2_config_td_cc usb2_ether_cc 90#define usb2_config_td_softc axe_softc 91 92#define USB_DEBUG_VAR axe_debug 93 94#include <dev/usb2/core/usb2_core.h> 95#include <dev/usb2/core/usb2_lookup.h> 96#include <dev/usb2/core/usb2_process.h> 97#include <dev/usb2/core/usb2_config_td.h> 98#include <dev/usb2/core/usb2_debug.h> 99#include <dev/usb2/core/usb2_request.h> 100#include <dev/usb2/core/usb2_busdma.h> 101#include <dev/usb2/core/usb2_util.h> 102 103#include <dev/usb2/ethernet/usb2_ethernet.h> 104#include <dev/usb2/ethernet/if_axe2_reg.h> 105 106MODULE_DEPEND(axe, usb2_ethernet, 1, 1, 1); 107MODULE_DEPEND(axe, usb2_core, 1, 1, 1); 108MODULE_DEPEND(axe, ether, 1, 1, 1); 109MODULE_DEPEND(axe, miibus, 1, 1, 1); 110 111#if USB_DEBUG 112static int axe_debug = 0; 113 114SYSCTL_NODE(_hw_usb2, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe"); 115SYSCTL_INT(_hw_usb2_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0, 116 "Debug level"); 117#endif 118 119/* 120 * Various supported device vendors/products. 121 */ 122static const struct usb2_device_id axe_devs[] = { 123 {USB_VPI(USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200, 0)}, 124 {USB_VPI(USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2, 0)}, 125 {USB_VPI(USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET, AXE_FLAG_772)}, 126 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172, 0)}, 127 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178, AXE_FLAG_178)}, 128 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772, AXE_FLAG_772)}, 129 {USB_VPI(USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T, 0)}, 130 {USB_VPI(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055, AXE_FLAG_178)}, 131 {USB_VPI(USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR, 0)}, 132 {USB_VPI(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2, AXE_FLAG_772)}, 133 {USB_VPI(USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX, 0)}, 134 {USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100, 0)}, 135 {USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1, AXE_FLAG_772)}, 136 {USB_VPI(USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E, 0)}, 137 {USB_VPI(USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2, AXE_FLAG_178)}, 138 {USB_VPI(USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1, 0)}, 139 {USB_VPI(USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M, 0)}, 140 {USB_VPI(USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000, AXE_FLAG_178)}, 141 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX, 0)}, 142 {USB_VPI(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120, 0)}, 143 {USB_VPI(USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS, AXE_FLAG_772)}, 144 {USB_VPI(USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T, AXE_FLAG_178)}, 145 {USB_VPI(USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029, 0)}, 146 {USB_VPI(USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028, AXE_FLAG_178)}, 147 {USB_VPI(USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL, 0)}, 148}; 149 150static device_probe_t axe_probe; 151static device_attach_t axe_attach; 152static device_detach_t axe_detach; 153static device_shutdown_t axe_shutdown; 154 155static usb2_callback_t axe_intr_clear_stall_callback; 156static usb2_callback_t axe_intr_callback; 157static usb2_callback_t axe_bulk_read_clear_stall_callback; 158static usb2_callback_t axe_bulk_read_callback; 159static usb2_callback_t axe_bulk_write_clear_stall_callback; 160static usb2_callback_t axe_bulk_write_callback; 161 162static miibus_readreg_t axe_cfg_miibus_readreg; 163static miibus_writereg_t axe_cfg_miibus_writereg; 164static miibus_statchg_t axe_cfg_miibus_statchg; 165 166static usb2_config_td_command_t axe_cfg_ifmedia_upd; 167static usb2_config_td_command_t axe_config_copy; 168static usb2_config_td_command_t axe_cfg_setmulti; 169static usb2_config_td_command_t axe_cfg_first_time_setup; 170static usb2_config_td_command_t axe_cfg_tick; 171static usb2_config_td_command_t axe_cfg_pre_init; 172static usb2_config_td_command_t axe_cfg_init; 173static usb2_config_td_command_t axe_cfg_promisc_upd; 174static usb2_config_td_command_t axe_cfg_pre_stop; 175static usb2_config_td_command_t axe_cfg_stop; 176 177static int axe_ifmedia_upd_cb(struct ifnet *); 178static void axe_ifmedia_sts_cb(struct ifnet *, struct ifmediareq *); 179static void axe_cfg_reset(struct axe_softc *); 180static void axe_start_cb(struct ifnet *); 181static void axe_start_transfers(struct axe_softc *); 182static void axe_init_cb(void *); 183static int axe_ioctl_cb(struct ifnet *, u_long, caddr_t); 184static void axe_watchdog(void *); 185static void axe_cfg_cmd(struct axe_softc *, uint16_t, uint16_t, uint16_t, 186 void *); 187static void axe_cfg_ax88178_init(struct axe_softc *); 188static void axe_cfg_ax88772_init(struct axe_softc *); 189static int axe_get_phyno(struct axe_softc *, int); 190 191static const struct usb2_config axe_config[AXE_ENDPT_MAX] = { 192 193 [0] = { 194 .type = UE_BULK, 195 .endpoint = UE_ADDR_ANY, 196 .direction = UE_DIR_OUT, 197 .mh.bufsize = AXE_BULK_BUF_SIZE, 198 .mh.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 199 .mh.callback = &axe_bulk_write_callback, 200 .mh.timeout = 10000, /* 10 seconds */ 201 }, 202 203 [1] = { 204 .type = UE_BULK, 205 .endpoint = UE_ADDR_ANY, 206 .direction = UE_DIR_IN, 207#if (MCLBYTES < 2048) 208#error "(MCLBYTES < 2048)" 209#endif 210 .mh.bufsize = MCLBYTES, 211 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 212 .mh.callback = &axe_bulk_read_callback, 213 .mh.timeout = 0, /* no timeout */ 214 }, 215 216 [2] = { 217 .type = UE_CONTROL, 218 .endpoint = 0x00, /* Control pipe */ 219 .direction = UE_DIR_ANY, 220 .mh.bufsize = sizeof(struct usb2_device_request), 221 .mh.flags = {}, 222 .mh.callback = &axe_bulk_write_clear_stall_callback, 223 .mh.timeout = 1000, /* 1 second */ 224 .mh.interval = 50, /* 50ms */ 225 }, 226 227 [3] = { 228 .type = UE_CONTROL, 229 .endpoint = 0x00, /* Control pipe */ 230 .direction = UE_DIR_ANY, 231 .mh.bufsize = sizeof(struct usb2_device_request), 232 .mh.flags = {}, 233 .mh.callback = &axe_bulk_read_clear_stall_callback, 234 .mh.timeout = 1000, /* 1 second */ 235 .mh.interval = 50, /* 50ms */ 236 }, 237 238 [4] = { 239 .type = UE_INTERRUPT, 240 .endpoint = UE_ADDR_ANY, 241 .direction = UE_DIR_IN, 242 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 243 .mh.bufsize = 0, /* use wMaxPacketSize */ 244 .mh.callback = &axe_intr_callback, 245 }, 246 247 [5] = { 248 .type = UE_CONTROL, 249 .endpoint = 0x00, /* Control pipe */ 250 .direction = UE_DIR_ANY, 251 .mh.bufsize = sizeof(struct usb2_device_request), 252 .mh.flags = {}, 253 .mh.callback = &axe_intr_clear_stall_callback, 254 .mh.timeout = 1000, /* 1 second */ 255 .mh.interval = 50, /* 50ms */ 256 }, 257}; 258 259static device_method_t axe_methods[] = { 260 /* Device interface */ 261 DEVMETHOD(device_probe, axe_probe), 262 DEVMETHOD(device_attach, axe_attach), 263 DEVMETHOD(device_detach, axe_detach), 264 DEVMETHOD(device_shutdown, axe_shutdown), 265 266 /* bus interface */ 267 DEVMETHOD(bus_print_child, bus_generic_print_child), 268 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 269 270 /* MII interface */ 271 DEVMETHOD(miibus_readreg, axe_cfg_miibus_readreg), 272 DEVMETHOD(miibus_writereg, axe_cfg_miibus_writereg), 273 DEVMETHOD(miibus_statchg, axe_cfg_miibus_statchg), 274 275 {0, 0} 276}; 277 278static driver_t axe_driver = { 279 .name = "axe", 280 .methods = axe_methods, 281 .size = sizeof(struct axe_softc), 282}; 283 284static devclass_t axe_devclass; 285 286DRIVER_MODULE(axe, ushub, axe_driver, axe_devclass, NULL, 0); 287DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0); 288 289static void 290axe_cfg_cmd(struct axe_softc *sc, uint16_t cmd, uint16_t index, 291 uint16_t val, void *buf) 292{ 293 struct usb2_device_request req; 294 usb2_error_t err; 295 uint16_t length = AXE_CMD_LEN(cmd); 296 297 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ? 298 UT_WRITE_VENDOR_DEVICE : 299 UT_READ_VENDOR_DEVICE); 300 req.bRequest = AXE_CMD_CMD(cmd); 301 USETW(req.wValue, val); 302 USETW(req.wIndex, index); 303 USETW(req.wLength, length); 304 305 if (usb2_config_td_is_gone(&sc->sc_config_td)) { 306 goto error; 307 } 308 err = usb2_do_request_flags 309 (sc->sc_udev, &sc->sc_mtx, &req, buf, 0, NULL, 1000); 310 311 if (err) { 312 313 DPRINTFN(0, "device request failed, err=%s " 314 "(ignored)\n", usb2_errstr(err)); 315 316error: 317 318 if ((req.bmRequestType & UT_READ) && length) { 319 bzero(buf, length); 320 } 321 } 322} 323 324static int 325axe_cfg_miibus_readreg(device_t dev, int phy, int reg) 326{ 327 struct axe_softc *sc = device_get_softc(dev); 328 uint16_t val; 329 uint8_t do_unlock; 330 331 /* avoid recursive locking */ 332 if (mtx_owned(&sc->sc_mtx)) { 333 do_unlock = 0; 334 } else { 335 mtx_lock(&sc->sc_mtx); 336 do_unlock = 1; 337 } 338 339 if (sc->sc_phyno != phy) { 340 val = 0; 341 goto done; 342 } 343 344 axe_cfg_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 345 axe_cfg_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val); 346 axe_cfg_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 347 348 val = le16toh(val); 349 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) { 350 /* 351 * BMSR of AX88772 indicates that it supports extended 352 * capability but the extended status register is 353 * revered for embedded ethernet PHY. So clear the 354 * extended capability bit of BMSR. 355 */ 356 val &= ~BMSR_EXTCAP; 357 } 358 359done: 360 if (do_unlock) { 361 mtx_unlock(&sc->sc_mtx); 362 } 363 return (val); 364} 365 366static int 367axe_cfg_miibus_writereg(device_t dev, int phy, int reg, int val) 368{ 369 struct axe_softc *sc = device_get_softc(dev); 370 uint8_t do_unlock; 371 372 val = htole16(val); 373 374 /* avoid recursive locking */ 375 if (mtx_owned(&sc->sc_mtx)) { 376 do_unlock = 0; 377 } else { 378 mtx_lock(&sc->sc_mtx); 379 do_unlock = 1; 380 } 381 382 if (sc->sc_phyno != phy) 383 goto done; 384 385 axe_cfg_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 386 axe_cfg_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val); 387 axe_cfg_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 388 389done: 390 if (do_unlock) { 391 mtx_unlock(&sc->sc_mtx); 392 } 393 return (0); 394} 395 396static void 397axe_cfg_miibus_statchg(device_t dev) 398{ 399 struct axe_softc *sc = device_get_softc(dev); 400 struct mii_data *mii = GET_MII(sc); 401 struct ifnet *ifp; 402 uint16_t val; 403 uint8_t do_unlock; 404 405 /* avoid recursive locking */ 406 if (mtx_owned(&sc->sc_mtx)) { 407 do_unlock = 0; 408 } else { 409 mtx_lock(&sc->sc_mtx); 410 do_unlock = 1; 411 } 412 413 ifp = sc->sc_ifp; 414 if (mii == NULL || ifp == NULL || 415 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 416 goto done; 417 418 sc->sc_flags &= ~AXE_FLAG_LINK; 419 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 420 (IFM_ACTIVE | IFM_AVALID)) { 421 switch (IFM_SUBTYPE(mii->mii_media_active)) { 422 case IFM_10_T: 423 case IFM_100_TX: 424 sc->sc_flags |= AXE_FLAG_LINK; 425 break; 426 case IFM_1000_T: 427 if ((sc->sc_flags & AXE_FLAG_178) == 0) 428 break; 429 sc->sc_flags |= AXE_FLAG_LINK; 430 break; 431 default: 432 break; 433 } 434 } 435 436 /* Lost link, do nothing. */ 437 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) 438 goto done; 439 440 val = 0; 441 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 442 val |= AXE_MEDIA_FULL_DUPLEX; 443 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 444 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC; 445 if ((sc->sc_flags & AXE_FLAG_178) != 0) 446 val |= AXE_178_MEDIA_ENCK; 447 switch (IFM_SUBTYPE(mii->mii_media_active)) { 448 case IFM_1000_T: 449 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 450 break; 451 case IFM_100_TX: 452 val |= AXE_178_MEDIA_100TX; 453 break; 454 case IFM_10_T: 455 /* doesn't need to be handled */ 456 break; 457 } 458 } 459 axe_cfg_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 460done: 461 if (do_unlock) { 462 mtx_unlock(&sc->sc_mtx); 463 } 464} 465 466/* 467 * Set media options. 468 */ 469static int 470axe_ifmedia_upd_cb(struct ifnet *ifp) 471{ 472 struct axe_softc *sc = ifp->if_softc; 473 474 mtx_lock(&sc->sc_mtx); 475 usb2_config_td_queue_command 476 (&sc->sc_config_td, NULL, &axe_cfg_ifmedia_upd, 0, 0); 477 mtx_unlock(&sc->sc_mtx); 478 479 return (0); 480} 481 482static void 483axe_cfg_ifmedia_upd(struct axe_softc *sc, 484 struct usb2_config_td_cc *cc, uint16_t refcount) 485{ 486 struct ifnet *ifp = sc->sc_ifp; 487 struct mii_data *mii = GET_MII(sc); 488 489 if ((ifp == NULL) || 490 (mii == NULL)) { 491 /* not ready */ 492 return; 493 } 494 495 if (mii->mii_instance) { 496 struct mii_softc *miisc; 497 498 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 499 mii_phy_reset(miisc); 500 } 501 } 502 mii_mediachg(mii); 503} 504 505/* 506 * Report current media status. 507 */ 508static void 509axe_ifmedia_sts_cb(struct ifnet *ifp, struct ifmediareq *ifmr) 510{ 511 struct axe_softc *sc = ifp->if_softc; 512 513 mtx_lock(&sc->sc_mtx); 514 ifmr->ifm_active = sc->sc_media_active; 515 ifmr->ifm_status = sc->sc_media_status; 516 mtx_unlock(&sc->sc_mtx); 517} 518 519static void 520axe_mchash(struct usb2_config_td_cc *cc, const uint8_t *ptr) 521{ 522 uint8_t h; 523 524 h = (ether_crc32_be(ptr, ETHER_ADDR_LEN) >> 26); 525 cc->if_hash[(h >> 3)] |= (1 << (h & 7)); 526} 527 528static void 529axe_config_copy(struct axe_softc *sc, 530 struct usb2_config_td_cc *cc, uint16_t refcount) 531{ 532 bzero(cc, sizeof(*cc)); 533 usb2_ether_cc(sc->sc_ifp, &axe_mchash, cc); 534} 535 536static void 537axe_cfg_setmulti(struct axe_softc *sc, 538 struct usb2_config_td_cc *cc, uint16_t refcount) 539{ 540 uint16_t rxmode; 541 542 axe_cfg_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 543 544 rxmode = le16toh(rxmode); 545 546 if (cc->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 547 rxmode |= AXE_RXCMD_ALLMULTI; 548 axe_cfg_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 549 return; 550 } 551 rxmode &= ~AXE_RXCMD_ALLMULTI; 552 553 axe_cfg_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, cc->if_hash); 554 axe_cfg_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 555} 556 557static void 558axe_cfg_reset(struct axe_softc *sc) 559{ 560 struct usb2_config_descriptor *cd; 561 usb2_error_t err; 562 563 cd = usb2_get_config_descriptor(sc->sc_udev); 564 565 err = usb2_req_set_config(sc->sc_udev, &sc->sc_mtx, 566 cd->bConfigurationValue); 567 if (err) { 568 DPRINTF("reset failed (ignored)\n"); 569 } 570 /* 571 * wait a little while for the chip to get its brains in order: 572 */ 573 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 100); 574} 575 576static int 577axe_get_phyno(struct axe_softc *sc, int sel) 578{ 579 int phyno; 580 581 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) { 582 case PHY_TYPE_100_HOME: 583 case PHY_TYPE_GIG: 584 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]); 585 break; 586 case PHY_TYPE_SPECIAL: 587 /* FALLTHROUGH */ 588 case PHY_TYPE_RSVD: 589 /* FALLTHROUGH */ 590 case PHY_TYPE_NON_SUP: 591 /* FALLTHROUGH */ 592 default: 593 phyno = -1; 594 break; 595 } 596 597 return (phyno); 598} 599 600/* 601 * Probe for a AX88172 chip. 602 */ 603static int 604axe_probe(device_t dev) 605{ 606 struct usb2_attach_arg *uaa = device_get_ivars(dev); 607 608 if (uaa->usb2_mode != USB_MODE_HOST) { 609 return (ENXIO); 610 } 611 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX) { 612 return (ENXIO); 613 } 614 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX) { 615 return (ENXIO); 616 } 617 return (usb2_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa)); 618} 619 620/* 621 * Attach the interface. Allocate softc structures, do ifmedia 622 * setup and ethernet/BPF attach. 623 */ 624static int 625axe_attach(device_t dev) 626{ 627 struct usb2_attach_arg *uaa = device_get_ivars(dev); 628 struct axe_softc *sc = device_get_softc(dev); 629 int32_t error; 630 uint8_t iface_index; 631 632 if (sc == NULL) { 633 return (ENOMEM); 634 } 635 sc->sc_udev = uaa->device; 636 sc->sc_dev = dev; 637 sc->sc_unit = device_get_unit(dev); 638 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 639 640 device_set_usb2_desc(dev); 641 642 snprintf(sc->sc_name, sizeof(sc->sc_name), "%s", 643 device_get_nameunit(dev)); 644 645 mtx_init(&sc->sc_mtx, "axe lock", NULL, MTX_DEF | MTX_RECURSE); 646 647 usb2_callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0); 648 649 iface_index = AXE_IFACE_IDX; 650 error = usb2_transfer_setup(uaa->device, &iface_index, 651 sc->sc_xfer, axe_config, AXE_ENDPT_MAX, 652 sc, &sc->sc_mtx); 653 if (error) { 654 device_printf(dev, "allocating USB " 655 "transfers failed!\n"); 656 goto detach; 657 } 658 error = usb2_config_td_setup(&sc->sc_config_td, sc, &sc->sc_mtx, 659 NULL, sizeof(struct usb2_config_td_cc), 16); 660 if (error) { 661 device_printf(dev, "could not setup config " 662 "thread!\n"); 663 goto detach; 664 } 665 mtx_lock(&sc->sc_mtx); 666 667 /* start setup */ 668 669 usb2_config_td_queue_command 670 (&sc->sc_config_td, NULL, &axe_cfg_first_time_setup, 0, 0); 671 672 axe_watchdog(sc); 673 mtx_unlock(&sc->sc_mtx); 674 return (0); /* success */ 675 676detach: 677 axe_detach(dev); 678 return (ENXIO); /* failure */ 679} 680 681static void 682axe_cfg_ax88178_init(struct axe_softc *sc) 683{ 684 uint16_t eeprom; 685 uint16_t phymode; 686 uint16_t gpio0; 687 uint8_t err; 688 689 DPRINTF("\n"); 690 691 axe_cfg_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 692 /* XXX magic */ 693 axe_cfg_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 694 axe_cfg_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 695 696 /* For big-endian machines: */ 697 eeprom = le16toh(eeprom); 698 699 /* if EEPROM is invalid we have to use to GPIO0 */ 700 if (eeprom == 0xffff) { 701 phymode = 0; 702 gpio0 = 1; 703 } else { 704 phymode = (eeprom & 7); 705 gpio0 = (eeprom & 0x80) ? 0 : 1; 706 } 707 708 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL); 709 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 16); 710 711 if ((eeprom >> 8) != 0x01) { 712 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL); 713 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 32); 714 715 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL); 716 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 3); 717 718 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL); 719 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 32); 720 } else { 721 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL); 722 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 32); 723 724 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL); 725 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 32); 726 } 727 728 /* soft reset */ 729 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 730 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 4); 731 732 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 733 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 734 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 4); 735 /* Enable MII/GMII/RGMII interface to work with external PHY. */ 736 axe_cfg_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 737 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 4); 738 739 axe_cfg_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 740} 741 742static void 743axe_cfg_ax88772_init(struct axe_softc *sc) 744{ 745 uint8_t err; 746 747 DPRINTF("\n"); 748 749 axe_cfg_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 750 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 16); 751 752 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 753 /* ask for the embedded PHY */ 754 axe_cfg_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 755 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 64); 756 757 /* power down and reset state, pin reset state */ 758 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 759 AXE_SW_RESET_CLEAR, NULL); 760 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 16); 761 762 /* power down/reset state, pin operating state */ 763 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 764 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 765 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 4); 766 767 /* power up, reset */ 768 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 769 AXE_SW_RESET_PRL, NULL); 770 771 /* power up, operating */ 772 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 773 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 774 } else { 775 /* ask for external PHY */ 776 axe_cfg_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 777 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 64); 778 779 /* power down internal PHY */ 780 axe_cfg_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 781 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 782 } 783 784 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 4); 785 axe_cfg_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 786} 787 788static void 789axe_cfg_first_time_setup(struct axe_softc *sc, 790 struct usb2_config_td_cc *cc, uint16_t refcount) 791{ 792 struct ifnet *ifp; 793 int error; 794 uint8_t eaddr[min(ETHER_ADDR_LEN, 6)]; 795 796 /* set default value */ 797 bzero(eaddr, sizeof(eaddr)); 798 799 /* 800 * Load PHY indexes first. Needed by axe_xxx_init(). 801 */ 802 axe_cfg_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs); 803#if 1 804 device_printf(sc->sc_dev, "PHYADDR 0x%02x:0x%02x\n", 805 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]); 806#endif 807 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 808 if (sc->sc_phyno == -1) 809 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 810 if (sc->sc_phyno == -1) { 811 device_printf(sc->sc_dev, 812 "no valid PHY address found, " 813 "assuming PHY address 0\n"); 814 sc->sc_phyno = 0; 815 } 816 817 if (sc->sc_flags & AXE_FLAG_178) { 818 axe_cfg_ax88178_init(sc); 819 } else if (sc->sc_flags & AXE_FLAG_772) { 820 axe_cfg_ax88772_init(sc); 821 } 822 /* 823 * Get station address. 824 */ 825 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) 826 axe_cfg_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, eaddr); 827 else 828 axe_cfg_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, eaddr); 829 830 /* 831 * Fetch IPG values. 832 */ 833 axe_cfg_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs); 834 835 mtx_unlock(&sc->sc_mtx); 836 837 ifp = if_alloc(IFT_ETHER); 838 839 mtx_lock(&sc->sc_mtx); 840 841 if (ifp == NULL) { 842 printf("%s: could not if_alloc()\n", 843 sc->sc_name); 844 goto done; 845 } 846 sc->sc_evilhack = ifp; 847 848 ifp->if_softc = sc; 849 if_initname(ifp, "axe", sc->sc_unit); 850 ifp->if_mtu = ETHERMTU; 851 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 852 ifp->if_ioctl = axe_ioctl_cb; 853 ifp->if_start = axe_start_cb; 854 ifp->if_watchdog = NULL; 855 ifp->if_init = axe_init_cb; 856 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 857 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 858 IFQ_SET_READY(&ifp->if_snd); 859 860 /* 861 * XXX need Giant when accessing the device structures ! 862 */ 863 864 mtx_unlock(&sc->sc_mtx); 865 866 mtx_lock(&Giant); 867 868 error = mii_phy_probe(sc->sc_dev, &sc->sc_miibus, 869 &axe_ifmedia_upd_cb, 870 &axe_ifmedia_sts_cb); 871 mtx_unlock(&Giant); 872 873 mtx_lock(&sc->sc_mtx); 874 875 if (error) { 876 printf("%s: MII without any PHY!\n", 877 sc->sc_name); 878 if_free(ifp); 879 goto done; 880 } 881 sc->sc_ifp = ifp; 882 883 mtx_unlock(&sc->sc_mtx); 884 885 /* 886 * Call MI attach routine. 887 */ 888 889 ether_ifattach(ifp, eaddr); 890 891 mtx_lock(&sc->sc_mtx); 892 893done: 894 return; 895} 896 897static int 898axe_detach(device_t dev) 899{ 900 struct axe_softc *sc = device_get_softc(dev); 901 struct ifnet *ifp; 902 903 usb2_config_td_drain(&sc->sc_config_td); 904 905 mtx_lock(&sc->sc_mtx); 906 907 usb2_callout_stop(&sc->sc_watchdog); 908 909 axe_cfg_pre_stop(sc, NULL, 0); 910 911 ifp = sc->sc_ifp; 912 913 mtx_unlock(&sc->sc_mtx); 914 915 /* stop all USB transfers first */ 916 usb2_transfer_unsetup(sc->sc_xfer, AXE_ENDPT_MAX); 917 918 /* get rid of any late children */ 919 bus_generic_detach(dev); 920 921 if (ifp) { 922 ether_ifdetach(ifp); 923 if_free(ifp); 924 } 925 usb2_config_td_unsetup(&sc->sc_config_td); 926 927 usb2_callout_drain(&sc->sc_watchdog); 928 929 mtx_destroy(&sc->sc_mtx); 930 931 return (0); 932} 933 934static void 935axe_intr_clear_stall_callback(struct usb2_xfer *xfer) 936{ 937 struct axe_softc *sc = xfer->priv_sc; 938 struct usb2_xfer *xfer_other = sc->sc_xfer[4]; 939 940 if (usb2_clear_stall_callback(xfer, xfer_other)) { 941 DPRINTF("stall cleared\n"); 942 sc->sc_flags &= ~AXE_FLAG_INTR_STALL; 943 usb2_transfer_start(xfer_other); 944 } 945} 946 947static void 948axe_intr_callback(struct usb2_xfer *xfer) 949{ 950 struct axe_softc *sc = xfer->priv_sc; 951 952 switch (USB_GET_STATE(xfer)) { 953 case USB_ST_TRANSFERRED: 954 955 /* do nothing */ 956 957 case USB_ST_SETUP: 958 if (sc->sc_flags & AXE_FLAG_INTR_STALL) { 959 usb2_transfer_start(sc->sc_xfer[5]); 960 } else { 961 xfer->frlengths[0] = xfer->max_data_length; 962 usb2_start_hardware(xfer); 963 } 964 return; 965 966 default: /* Error */ 967 if (xfer->error != USB_ERR_CANCELLED) { 968 /* start clear stall */ 969 sc->sc_flags |= AXE_FLAG_INTR_STALL; 970 usb2_transfer_start(sc->sc_xfer[5]); 971 } 972 return; 973 } 974} 975 976static void 977axe_bulk_read_clear_stall_callback(struct usb2_xfer *xfer) 978{ 979 struct axe_softc *sc = xfer->priv_sc; 980 struct usb2_xfer *xfer_other = sc->sc_xfer[1]; 981 982 if (usb2_clear_stall_callback(xfer, xfer_other)) { 983 DPRINTF("stall cleared\n"); 984 sc->sc_flags &= ~AXE_FLAG_READ_STALL; 985 usb2_transfer_start(xfer_other); 986 } 987} 988 989#if (AXE_BULK_BUF_SIZE >= 0x10000) 990#error "Please update axe_bulk_read_callback()!" 991#endif 992 993static void 994axe_bulk_read_callback(struct usb2_xfer *xfer) 995{ 996 struct axe_softc *sc = xfer->priv_sc; 997 struct axe_sframe_hdr hdr; 998 struct ifnet *ifp = sc->sc_ifp; 999 struct mbuf *m; 1000 struct { /* mini-queue */ 1001 struct mbuf *ifq_head; 1002 struct mbuf *ifq_tail; 1003 uint16_t ifq_len; 1004 } mq = { 1005 NULL, NULL, 0 1006 }; 1007 uint16_t pos; 1008 uint16_t len; 1009 uint16_t adjust; 1010 1011 switch (USB_GET_STATE(xfer)) { 1012 case USB_ST_TRANSFERRED: 1013 1014 pos = 0; 1015 1016 while (1) { 1017 1018 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 1019 1020 if (xfer->actlen < sizeof(hdr)) { 1021 /* too little data */ 1022 break; 1023 } 1024 usb2_copy_out(xfer->frbuffers, pos, &hdr, sizeof(hdr)); 1025 1026 if ((hdr.len ^ hdr.ilen) != 0xFFFF) { 1027 /* we lost sync */ 1028 break; 1029 } 1030 xfer->actlen -= sizeof(hdr); 1031 pos += sizeof(hdr); 1032 1033 len = le16toh(hdr.len); 1034 if (len > xfer->actlen) { 1035 /* invalid length */ 1036 break; 1037 } 1038 adjust = (len & 1); 1039 1040 } else { 1041 len = xfer->actlen; 1042 adjust = 0; 1043 } 1044 1045 if (len < sizeof(struct ether_header)) { 1046 ifp->if_ierrors++; 1047 goto skip; 1048 } 1049 m = usb2_ether_get_mbuf(); 1050 if (m == NULL) { 1051 /* we are out of memory */ 1052 break; 1053 } 1054 if (m->m_len > len) { 1055 m->m_len = len; 1056 } 1057 usb2_copy_out(xfer->frbuffers, pos, m->m_data, m->m_len); 1058 1059 ifp->if_ipackets++; 1060 m->m_pkthdr.rcvif = ifp; 1061 m->m_pkthdr.len = m->m_len; 1062 1063 /* enqueue */ 1064 _IF_ENQUEUE(&mq, m); 1065 1066 skip: 1067 1068 pos += len; 1069 xfer->actlen -= len; 1070 1071 if (xfer->actlen <= adjust) { 1072 /* we are finished */ 1073 goto tr_setup; 1074 } 1075 pos += adjust; 1076 xfer->actlen -= adjust; 1077 } 1078 1079 /* count an error */ 1080 ifp->if_ierrors++; 1081 1082 case USB_ST_SETUP: 1083tr_setup: 1084 1085 if (sc->sc_flags & AXE_FLAG_READ_STALL) { 1086 usb2_transfer_start(sc->sc_xfer[3]); 1087 } else { 1088 xfer->frlengths[0] = xfer->max_data_length; 1089 usb2_start_hardware(xfer); 1090 } 1091 1092 /* 1093 * At the end of a USB callback it is always safe to unlock 1094 * the private mutex of a device! That is why we do the 1095 * "if_input" here, and not some lines up! 1096 */ 1097 if (mq.ifq_head) { 1098 1099 mtx_unlock(&sc->sc_mtx); 1100 1101 while (1) { 1102 1103 _IF_DEQUEUE(&mq, m); 1104 1105 if (m == NULL) 1106 break; 1107 1108 (ifp->if_input) (ifp, m); 1109 } 1110 1111 mtx_lock(&sc->sc_mtx); 1112 } 1113 return; 1114 1115 default: /* Error */ 1116 if (xfer->error != USB_ERR_CANCELLED) { 1117 /* try to clear stall first */ 1118 sc->sc_flags |= AXE_FLAG_READ_STALL; 1119 usb2_transfer_start(sc->sc_xfer[3]); 1120 } 1121 DPRINTF("bulk read error, %s\n", 1122 usb2_errstr(xfer->error)); 1123 return; 1124 1125 } 1126} 1127 1128static void 1129axe_bulk_write_clear_stall_callback(struct usb2_xfer *xfer) 1130{ 1131 struct axe_softc *sc = xfer->priv_sc; 1132 struct usb2_xfer *xfer_other = sc->sc_xfer[0]; 1133 1134 if (usb2_clear_stall_callback(xfer, xfer_other)) { 1135 DPRINTF("stall cleared\n"); 1136 sc->sc_flags &= ~AXE_FLAG_WRITE_STALL; 1137 usb2_transfer_start(xfer_other); 1138 } 1139} 1140 1141#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4))) 1142#error "Please update axe_bulk_write_callback()!" 1143#endif 1144 1145static void 1146axe_bulk_write_callback(struct usb2_xfer *xfer) 1147{ 1148 struct axe_softc *sc = xfer->priv_sc; 1149 struct axe_sframe_hdr hdr; 1150 struct ifnet *ifp = sc->sc_ifp; 1151 struct mbuf *m; 1152 uint16_t pos; 1153 1154 switch (USB_GET_STATE(xfer)) { 1155 case USB_ST_TRANSFERRED: 1156 DPRINTFN(11, "transfer complete\n"); 1157 1158 ifp->if_opackets++; 1159 1160 case USB_ST_SETUP: 1161 1162 if (sc->sc_flags & AXE_FLAG_WRITE_STALL) { 1163 usb2_transfer_start(sc->sc_xfer[2]); 1164 goto done; 1165 } 1166 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 1167 /* 1168 * don't send anything if there is no link ! 1169 */ 1170 goto done; 1171 } 1172 pos = 0; 1173 1174 while (1) { 1175 1176 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1177 1178 if (m == NULL) { 1179 if (pos > 0) 1180 break; /* send out data */ 1181 else 1182 goto done; 1183 } 1184 if (m->m_pkthdr.len > MCLBYTES) { 1185 m->m_pkthdr.len = MCLBYTES; 1186 } 1187 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 1188 1189 hdr.len = htole16(m->m_pkthdr.len); 1190 hdr.ilen = ~hdr.len; 1191 1192 usb2_copy_in(xfer->frbuffers, pos, &hdr, sizeof(hdr)); 1193 1194 pos += sizeof(hdr); 1195 1196 /* 1197 * NOTE: Some drivers force a short packet 1198 * by appending a dummy header with zero 1199 * length at then end of the USB transfer. 1200 * This driver uses the 1201 * USB_FORCE_SHORT_XFER flag instead. 1202 */ 1203 } 1204 usb2_m_copy_in(xfer->frbuffers, pos, 1205 m, 0, m->m_pkthdr.len); 1206 1207 pos += m->m_pkthdr.len; 1208 1209 /* 1210 * if there's a BPF listener, bounce a copy 1211 * of this frame to him: 1212 */ 1213 BPF_MTAP(ifp, m); 1214 1215 m_freem(m); 1216 1217 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 1218 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) { 1219 /* send out frame(s) */ 1220 break; 1221 } 1222 } else { 1223 /* send out frame */ 1224 break; 1225 } 1226 } 1227 1228 xfer->frlengths[0] = pos; 1229 usb2_start_hardware(xfer); 1230 1231done: 1232 return; 1233 1234 default: /* Error */ 1235 DPRINTFN(11, "transfer error, %s\n", 1236 usb2_errstr(xfer->error)); 1237 1238 if (xfer->error != USB_ERR_CANCELLED) { 1239 /* try to clear stall first */ 1240 sc->sc_flags |= AXE_FLAG_WRITE_STALL; 1241 usb2_transfer_start(sc->sc_xfer[2]); 1242 } 1243 ifp->if_oerrors++; 1244 return; 1245 1246 } 1247} 1248 1249static void 1250axe_cfg_tick(struct axe_softc *sc, 1251 struct usb2_config_td_cc *cc, uint16_t refcount) 1252{ 1253 struct ifnet *ifp = sc->sc_ifp; 1254 struct mii_data *mii = GET_MII(sc); 1255 1256 if ((ifp == NULL) || 1257 (mii == NULL)) { 1258 /* not ready */ 1259 return; 1260 } 1261 mii_tick(mii); 1262 sc->sc_media_active = mii->mii_media_active; 1263 sc->sc_media_status = mii->mii_media_status; 1264 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 1265 axe_cfg_miibus_statchg(sc->sc_dev); 1266 /* XXX */ 1267 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 1268 sc->sc_media_active = IFM_ETHER | IFM_NONE; 1269 sc->sc_media_status = IFM_AVALID; 1270 } 1271 } 1272 /* start stopped transfers, if any */ 1273 axe_start_transfers(sc); 1274} 1275 1276static void 1277axe_start_cb(struct ifnet *ifp) 1278{ 1279 struct axe_softc *sc = ifp->if_softc; 1280 1281 mtx_lock(&sc->sc_mtx); 1282 1283 axe_start_transfers(sc); 1284 1285 mtx_unlock(&sc->sc_mtx); 1286} 1287 1288static void 1289axe_start_transfers(struct axe_softc *sc) 1290{ 1291 if ((sc->sc_flags & AXE_FLAG_LL_READY) && 1292 (sc->sc_flags & AXE_FLAG_HL_READY)) { 1293 1294 /* 1295 * start the USB transfers, if not already started: 1296 */ 1297 usb2_transfer_start(sc->sc_xfer[4]); 1298 usb2_transfer_start(sc->sc_xfer[1]); 1299 usb2_transfer_start(sc->sc_xfer[0]); 1300 } 1301} 1302 1303static void 1304axe_init_cb(void *arg) 1305{ 1306 struct axe_softc *sc = arg; 1307 1308 mtx_lock(&sc->sc_mtx); 1309 usb2_config_td_queue_command 1310 (&sc->sc_config_td, &axe_cfg_pre_init, &axe_cfg_init, 0, 0); 1311 mtx_unlock(&sc->sc_mtx); 1312} 1313 1314static void 1315axe_cfg_pre_init(struct axe_softc *sc, 1316 struct usb2_config_td_cc *cc, uint16_t refcount) 1317{ 1318 struct ifnet *ifp = sc->sc_ifp; 1319 1320 /* immediate configuration */ 1321 1322 axe_cfg_pre_stop(sc, cc, 0); 1323 1324 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1325 1326 sc->sc_flags |= AXE_FLAG_HL_READY; 1327} 1328 1329static void 1330axe_cfg_init(struct axe_softc *sc, 1331 struct usb2_config_td_cc *cc, uint16_t refcount) 1332{ 1333 struct mii_data *mii = GET_MII(sc); 1334 uint16_t rxmode; 1335 1336 /* 1337 * Cancel pending I/O 1338 */ 1339 1340 axe_cfg_stop(sc, cc, 0); 1341 1342#if 0 1343 /* Set MAC address */ 1344 axe_mac(sc, cc->if_lladdr); 1345#endif 1346 1347 /* Set transmitter IPG values */ 1348 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 1349 axe_cfg_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2], 1350 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL); 1351 } else { 1352 axe_cfg_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL); 1353 axe_cfg_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL); 1354 axe_cfg_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL); 1355 } 1356 1357 /* Enable receiver, set RX mode */ 1358 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE); 1359 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 1360 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */ 1361 } else { 1362 rxmode |= AXE_172_RXCMD_UNICAST; 1363 } 1364 1365 /* If we want promiscuous mode, set the allframes bit. */ 1366 if (cc->if_flags & IFF_PROMISC) { 1367 rxmode |= AXE_RXCMD_PROMISC; 1368 } 1369 if (cc->if_flags & IFF_BROADCAST) { 1370 rxmode |= AXE_RXCMD_BROADCAST; 1371 } 1372 axe_cfg_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1373 1374 /* Load the multicast filter. */ 1375 axe_cfg_setmulti(sc, cc, 0); 1376 1377 mii_mediachg(mii); 1378 1379 sc->sc_flags |= (AXE_FLAG_READ_STALL | 1380 AXE_FLAG_WRITE_STALL | 1381 AXE_FLAG_LL_READY); 1382 1383 axe_start_transfers(sc); 1384} 1385 1386static void 1387axe_cfg_promisc_upd(struct axe_softc *sc, 1388 struct usb2_config_td_cc *cc, uint16_t refcount) 1389{ 1390 uint16_t rxmode; 1391 1392 axe_cfg_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 1393 1394 rxmode = le16toh(rxmode); 1395 1396 if (cc->if_flags & IFF_PROMISC) { 1397 rxmode |= AXE_RXCMD_PROMISC; 1398 } else { 1399 rxmode &= ~AXE_RXCMD_PROMISC; 1400 } 1401 1402 axe_cfg_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1403 1404 axe_cfg_setmulti(sc, cc, 0); 1405} 1406 1407static int 1408axe_ioctl_cb(struct ifnet *ifp, u_long command, caddr_t data) 1409{ 1410 struct axe_softc *sc = ifp->if_softc; 1411 struct mii_data *mii; 1412 int error = 0; 1413 1414 switch (command) { 1415 case SIOCSIFFLAGS: 1416 mtx_lock(&sc->sc_mtx); 1417 if (ifp->if_flags & IFF_UP) { 1418 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1419 usb2_config_td_queue_command 1420 (&sc->sc_config_td, &axe_config_copy, 1421 &axe_cfg_promisc_upd, 0, 0); 1422 } else { 1423 usb2_config_td_queue_command 1424 (&sc->sc_config_td, &axe_cfg_pre_init, 1425 &axe_cfg_init, 0, 0); 1426 } 1427 } else { 1428 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1429 usb2_config_td_queue_command 1430 (&sc->sc_config_td, &axe_cfg_pre_stop, 1431 &axe_cfg_stop, 0, 0); 1432 } 1433 } 1434 mtx_unlock(&sc->sc_mtx); 1435 break; 1436 1437 case SIOCADDMULTI: 1438 case SIOCDELMULTI: 1439 mtx_lock(&sc->sc_mtx); 1440 usb2_config_td_queue_command 1441 (&sc->sc_config_td, &axe_config_copy, 1442 &axe_cfg_setmulti, 0, 0); 1443 mtx_unlock(&sc->sc_mtx); 1444 break; 1445 1446 case SIOCGIFMEDIA: 1447 case SIOCSIFMEDIA: 1448 mii = GET_MII(sc); 1449 if (mii == NULL) { 1450 error = EINVAL; 1451 } else { 1452 error = ifmedia_ioctl 1453 (ifp, (void *)data, &mii->mii_media, command); 1454 } 1455 break; 1456 1457 default: 1458 error = ether_ioctl(ifp, command, data); 1459 break; 1460 } 1461 return (error); 1462} 1463 1464static void 1465axe_watchdog(void *arg) 1466{ 1467 struct axe_softc *sc = arg; 1468 1469 mtx_assert(&sc->sc_mtx, MA_OWNED); 1470 1471 usb2_config_td_queue_command 1472 (&sc->sc_config_td, NULL, &axe_cfg_tick, 0, 0); 1473 1474 usb2_callout_reset(&sc->sc_watchdog, 1475 hz, &axe_watchdog, sc); 1476} 1477 1478/* 1479 * NOTE: can be called when "ifp" is NULL 1480 */ 1481static void 1482axe_cfg_pre_stop(struct axe_softc *sc, 1483 struct usb2_config_td_cc *cc, uint16_t refcount) 1484{ 1485 struct ifnet *ifp = sc->sc_ifp; 1486 1487 if (cc) { 1488 /* copy the needed configuration */ 1489 axe_config_copy(sc, cc, refcount); 1490 } 1491 /* immediate configuration */ 1492 1493 if (ifp) { 1494 /* clear flags */ 1495 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1496 } 1497 sc->sc_flags &= ~(AXE_FLAG_HL_READY | 1498 AXE_FLAG_LL_READY); 1499 1500 sc->sc_flags &= ~AXE_FLAG_LINK; 1501 1502 /* 1503 * stop all the transfers, if not already stopped: 1504 */ 1505 usb2_transfer_stop(sc->sc_xfer[0]); 1506 usb2_transfer_stop(sc->sc_xfer[1]); 1507 usb2_transfer_stop(sc->sc_xfer[2]); 1508 usb2_transfer_stop(sc->sc_xfer[3]); 1509 usb2_transfer_stop(sc->sc_xfer[4]); 1510 usb2_transfer_stop(sc->sc_xfer[5]); 1511} 1512 1513static void 1514axe_cfg_stop(struct axe_softc *sc, 1515 struct usb2_config_td_cc *cc, uint16_t refcount) 1516{ 1517 axe_cfg_reset(sc); 1518} 1519 1520/* 1521 * Stop all chip I/O so that the kernel's probe routines don't 1522 * get confused by errant DMAs when rebooting. 1523 */ 1524static int 1525axe_shutdown(device_t dev) 1526{ 1527 struct axe_softc *sc = device_get_softc(dev); 1528 1529 mtx_lock(&sc->sc_mtx); 1530 1531 usb2_config_td_queue_command 1532 (&sc->sc_config_td, &axe_cfg_pre_stop, 1533 &axe_cfg_stop, 0, 0); 1534 1535 mtx_unlock(&sc->sc_mtx); 1536 1537 return (0); 1538} 1539