if_aue.c revision 257176
1/*- 2 * Copyright (c) 1997, 1998, 1999, 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Copyright (c) 2006 6 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Bill Paul. 19 * 4. Neither the name of the author nor the names of any co-contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 33 * THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36#include <sys/cdefs.h> 37__FBSDID("$FreeBSD: head/sys/dev/usb/net/if_aue.c 257176 2013-10-26 17:58:36Z glebius $"); 38 39/* 40 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver. 41 * Datasheet is available from http://www.admtek.com.tw. 42 * 43 * Written by Bill Paul <wpaul@ee.columbia.edu> 44 * Electrical Engineering Department 45 * Columbia University, New York City 46 * 47 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>. 48 * RED Inc. 49 */ 50 51/* 52 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet 53 * support: the control endpoint for reading/writing registers, burst 54 * read endpoint for packet reception, burst write for packet transmission 55 * and one for "interrupts." The chip uses the same RX filter scheme 56 * as the other ADMtek ethernet parts: one perfect filter entry for the 57 * the station address and a 64-bit multicast hash table. The chip supports 58 * both MII and HomePNA attachments. 59 * 60 * Since the maximum data transfer speed of USB is supposed to be 12Mbps, 61 * you're never really going to get 100Mbps speeds from this device. I 62 * think the idea is to allow the device to connect to 10 or 100Mbps 63 * networks, not necessarily to provide 100Mbps performance. Also, since 64 * the controller uses an external PHY chip, it's possible that board 65 * designers might simply choose a 10Mbps PHY. 66 * 67 * Registers are accessed using uether_do_request(). Packet 68 * transfers are done using usbd_transfer() and friends. 69 */ 70 71#include <sys/stdint.h> 72#include <sys/stddef.h> 73#include <sys/param.h> 74#include <sys/queue.h> 75#include <sys/types.h> 76#include <sys/systm.h> 77#include <sys/socket.h> 78#include <sys/kernel.h> 79#include <sys/bus.h> 80#include <sys/module.h> 81#include <sys/lock.h> 82#include <sys/mutex.h> 83#include <sys/condvar.h> 84#include <sys/sysctl.h> 85#include <sys/sx.h> 86#include <sys/unistd.h> 87#include <sys/callout.h> 88#include <sys/malloc.h> 89#include <sys/priv.h> 90 91#include <net/if.h> 92#include <net/if_var.h> 93 94#include <dev/usb/usb.h> 95#include <dev/usb/usbdi.h> 96#include <dev/usb/usbdi_util.h> 97#include "usbdevs.h" 98 99#define USB_DEBUG_VAR aue_debug 100#include <dev/usb/usb_debug.h> 101#include <dev/usb/usb_process.h> 102 103#include <dev/usb/net/usb_ethernet.h> 104#include <dev/usb/net/if_auereg.h> 105 106#ifdef USB_DEBUG 107static int aue_debug = 0; 108 109static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW, 0, "USB aue"); 110SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RW, &aue_debug, 0, 111 "Debug level"); 112#endif 113 114/* 115 * Various supported device vendors/products. 116 */ 117static const STRUCT_USB_HOST_ID aue_devs[] = { 118#define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 119 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII), 120 AUE_DEV(ABOCOM, DSB650TX_PNA, 0), 121 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS), 122 AUE_DEV(ABOCOM, XX10, 0), 123 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII), 124 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII), 125 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA), 126 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA), 127 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII), 128 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII), 129 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII), 130 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA), 131 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII), 132 AUE_DEV(ACCTON, USB320_EC, 0), 133 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII), 134 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII), 135 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII), 136 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII), 137 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY), 138 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII), 139 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII), 140 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII), 141 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII), 142 AUE_DEV(BILLIONTON, USB100, 0), 143 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII), 144 AUE_DEV(BILLIONTON, USBEL100, 0), 145 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA), 146 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII), 147 AUE_DEV(COREGA, FETHER_USB_TX, 0), 148 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS), 149 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 150 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII), 151 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII), 152 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA), 153 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS), 154 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS), 155 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII), 156 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII), 157 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII), 158 AUE_DEV(ELECOM, LDUSBTX0, 0), 159 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS), 160 AUE_DEV(ELECOM, LDUSBTX2, 0), 161 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS), 162 AUE_DEV(ELSA, USB2ETHERNET, 0), 163 AUE_DEV(GIGABYTE, GNBR402W, 0), 164 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII), 165 AUE_DEV(HP, HN210E, AUE_FLAG_PII), 166 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII), 167 AUE_DEV(IODATA, USBETTX, 0), 168 AUE_DEV(KINGSTON, KNU101TX, 0), 169 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA), 170 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS), 171 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS), 172 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII), 173 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 174 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS), 175 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII), 176 AUE_DEV(MELCO, LUATX1, 0), 177 AUE_DEV(MELCO, LUATX5, 0), 178 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII), 179 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII), 180 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII), 181 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII), 182 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII), 183 AUE_DEV(SMC, 2202USB, 0), 184 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII), 185 AUE_DEV(SOHOWARE, NUB100, 0), 186 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII), 187#undef AUE_DEV 188}; 189 190/* prototypes */ 191 192static device_probe_t aue_probe; 193static device_attach_t aue_attach; 194static device_detach_t aue_detach; 195static miibus_readreg_t aue_miibus_readreg; 196static miibus_writereg_t aue_miibus_writereg; 197static miibus_statchg_t aue_miibus_statchg; 198 199static usb_callback_t aue_intr_callback; 200static usb_callback_t aue_bulk_read_callback; 201static usb_callback_t aue_bulk_write_callback; 202 203static uether_fn_t aue_attach_post; 204static uether_fn_t aue_init; 205static uether_fn_t aue_stop; 206static uether_fn_t aue_start; 207static uether_fn_t aue_tick; 208static uether_fn_t aue_setmulti; 209static uether_fn_t aue_setpromisc; 210 211static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t); 212static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t); 213static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t); 214static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t); 215static void aue_eeprom_getword(struct aue_softc *, int, uint16_t *); 216static void aue_read_eeprom(struct aue_softc *, uint8_t *, uint16_t, 217 uint16_t); 218static void aue_reset(struct aue_softc *); 219static void aue_reset_pegasus_II(struct aue_softc *); 220 221static int aue_ifmedia_upd(struct ifnet *); 222static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 223 224static const struct usb_config aue_config[AUE_N_TRANSFER] = { 225 226 [AUE_BULK_DT_WR] = { 227 .type = UE_BULK, 228 .endpoint = UE_ADDR_ANY, 229 .direction = UE_DIR_OUT, 230 .bufsize = (MCLBYTES + 2), 231 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 232 .callback = aue_bulk_write_callback, 233 .timeout = 10000, /* 10 seconds */ 234 }, 235 236 [AUE_BULK_DT_RD] = { 237 .type = UE_BULK, 238 .endpoint = UE_ADDR_ANY, 239 .direction = UE_DIR_IN, 240 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN), 241 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 242 .callback = aue_bulk_read_callback, 243 }, 244 245 [AUE_INTR_DT_RD] = { 246 .type = UE_INTERRUPT, 247 .endpoint = UE_ADDR_ANY, 248 .direction = UE_DIR_IN, 249 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 250 .bufsize = 0, /* use wMaxPacketSize */ 251 .callback = aue_intr_callback, 252 }, 253}; 254 255static device_method_t aue_methods[] = { 256 /* Device interface */ 257 DEVMETHOD(device_probe, aue_probe), 258 DEVMETHOD(device_attach, aue_attach), 259 DEVMETHOD(device_detach, aue_detach), 260 261 /* MII interface */ 262 DEVMETHOD(miibus_readreg, aue_miibus_readreg), 263 DEVMETHOD(miibus_writereg, aue_miibus_writereg), 264 DEVMETHOD(miibus_statchg, aue_miibus_statchg), 265 266 DEVMETHOD_END 267}; 268 269static driver_t aue_driver = { 270 .name = "aue", 271 .methods = aue_methods, 272 .size = sizeof(struct aue_softc) 273}; 274 275static devclass_t aue_devclass; 276 277DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, 0); 278DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, 0, 0); 279MODULE_DEPEND(aue, uether, 1, 1, 1); 280MODULE_DEPEND(aue, usb, 1, 1, 1); 281MODULE_DEPEND(aue, ether, 1, 1, 1); 282MODULE_DEPEND(aue, miibus, 1, 1, 1); 283MODULE_VERSION(aue, 1); 284 285static const struct usb_ether_methods aue_ue_methods = { 286 .ue_attach_post = aue_attach_post, 287 .ue_start = aue_start, 288 .ue_init = aue_init, 289 .ue_stop = aue_stop, 290 .ue_tick = aue_tick, 291 .ue_setmulti = aue_setmulti, 292 .ue_setpromisc = aue_setpromisc, 293 .ue_mii_upd = aue_ifmedia_upd, 294 .ue_mii_sts = aue_ifmedia_sts, 295}; 296 297#define AUE_SETBIT(sc, reg, x) \ 298 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x)) 299 300#define AUE_CLRBIT(sc, reg, x) \ 301 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x)) 302 303static uint8_t 304aue_csr_read_1(struct aue_softc *sc, uint16_t reg) 305{ 306 struct usb_device_request req; 307 usb_error_t err; 308 uint8_t val; 309 310 req.bmRequestType = UT_READ_VENDOR_DEVICE; 311 req.bRequest = AUE_UR_READREG; 312 USETW(req.wValue, 0); 313 USETW(req.wIndex, reg); 314 USETW(req.wLength, 1); 315 316 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 317 if (err) 318 return (0); 319 return (val); 320} 321 322static uint16_t 323aue_csr_read_2(struct aue_softc *sc, uint16_t reg) 324{ 325 struct usb_device_request req; 326 usb_error_t err; 327 uint16_t val; 328 329 req.bmRequestType = UT_READ_VENDOR_DEVICE; 330 req.bRequest = AUE_UR_READREG; 331 USETW(req.wValue, 0); 332 USETW(req.wIndex, reg); 333 USETW(req.wLength, 2); 334 335 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 336 if (err) 337 return (0); 338 return (le16toh(val)); 339} 340 341static void 342aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val) 343{ 344 struct usb_device_request req; 345 346 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 347 req.bRequest = AUE_UR_WRITEREG; 348 req.wValue[0] = val; 349 req.wValue[1] = 0; 350 USETW(req.wIndex, reg); 351 USETW(req.wLength, 1); 352 353 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 354 /* error ignored */ 355 } 356} 357 358static void 359aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val) 360{ 361 struct usb_device_request req; 362 363 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 364 req.bRequest = AUE_UR_WRITEREG; 365 USETW(req.wValue, val); 366 USETW(req.wIndex, reg); 367 USETW(req.wLength, 2); 368 369 val = htole16(val); 370 371 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 372 /* error ignored */ 373 } 374} 375 376/* 377 * Read a word of data stored in the EEPROM at address 'addr.' 378 */ 379static void 380aue_eeprom_getword(struct aue_softc *sc, int addr, uint16_t *dest) 381{ 382 int i; 383 uint16_t word = 0; 384 385 aue_csr_write_1(sc, AUE_EE_REG, addr); 386 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ); 387 388 for (i = 0; i != AUE_TIMEOUT; i++) { 389 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE) 390 break; 391 if (uether_pause(&sc->sc_ue, hz / 100)) 392 break; 393 } 394 395 if (i == AUE_TIMEOUT) 396 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n"); 397 398 word = aue_csr_read_2(sc, AUE_EE_DATA); 399 *dest = word; 400} 401 402/* 403 * Read a sequence of words from the EEPROM. 404 */ 405static void 406aue_read_eeprom(struct aue_softc *sc, uint8_t *dest, 407 uint16_t off, uint16_t len) 408{ 409 uint16_t *ptr = (uint16_t *)dest; 410 int i; 411 412 for (i = 0; i != len; i++, ptr++) 413 aue_eeprom_getword(sc, off + i, ptr); 414} 415 416static int 417aue_miibus_readreg(device_t dev, int phy, int reg) 418{ 419 struct aue_softc *sc = device_get_softc(dev); 420 int i, locked; 421 uint16_t val = 0; 422 423 locked = mtx_owned(&sc->sc_mtx); 424 if (!locked) 425 AUE_LOCK(sc); 426 427 /* 428 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps 429 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY 430 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is 431 * actually connected to anything, so we ignore the 10Mbps one. It 432 * happens to be configured for MII address 3, so we filter that out. 433 */ 434 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) { 435 if (phy == 3) 436 goto done; 437#if 0 438 if (phy != 1) 439 goto done; 440#endif 441 } 442 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 443 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ); 444 445 for (i = 0; i != AUE_TIMEOUT; i++) { 446 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 447 break; 448 if (uether_pause(&sc->sc_ue, hz / 100)) 449 break; 450 } 451 452 if (i == AUE_TIMEOUT) 453 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); 454 455 val = aue_csr_read_2(sc, AUE_PHY_DATA); 456 457done: 458 if (!locked) 459 AUE_UNLOCK(sc); 460 return (val); 461} 462 463static int 464aue_miibus_writereg(device_t dev, int phy, int reg, int data) 465{ 466 struct aue_softc *sc = device_get_softc(dev); 467 int i; 468 int locked; 469 470 if (phy == 3) 471 return (0); 472 473 locked = mtx_owned(&sc->sc_mtx); 474 if (!locked) 475 AUE_LOCK(sc); 476 477 aue_csr_write_2(sc, AUE_PHY_DATA, data); 478 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 479 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE); 480 481 for (i = 0; i != AUE_TIMEOUT; i++) { 482 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 483 break; 484 if (uether_pause(&sc->sc_ue, hz / 100)) 485 break; 486 } 487 488 if (i == AUE_TIMEOUT) 489 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); 490 491 if (!locked) 492 AUE_UNLOCK(sc); 493 return (0); 494} 495 496static void 497aue_miibus_statchg(device_t dev) 498{ 499 struct aue_softc *sc = device_get_softc(dev); 500 struct mii_data *mii = GET_MII(sc); 501 int locked; 502 503 locked = mtx_owned(&sc->sc_mtx); 504 if (!locked) 505 AUE_LOCK(sc); 506 507 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 508 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 509 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 510 else 511 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 512 513 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 514 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 515 else 516 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 517 518 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 519 520 /* 521 * Set the LED modes on the LinkSys adapter. 522 * This turns on the 'dual link LED' bin in the auxmode 523 * register of the Broadcom PHY. 524 */ 525 if (sc->sc_flags & AUE_FLAG_LSYS) { 526 uint16_t auxmode; 527 528 auxmode = aue_miibus_readreg(dev, 0, 0x1b); 529 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04); 530 } 531 if (!locked) 532 AUE_UNLOCK(sc); 533} 534 535#define AUE_BITS 6 536static void 537aue_setmulti(struct usb_ether *ue) 538{ 539 struct aue_softc *sc = uether_getsc(ue); 540 struct ifnet *ifp = uether_getifp(ue); 541 struct ifmultiaddr *ifma; 542 uint32_t h = 0; 543 uint32_t i; 544 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 545 546 AUE_LOCK_ASSERT(sc, MA_OWNED); 547 548 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 549 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 550 return; 551 } 552 553 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 554 555 /* now program new ones */ 556 if_maddr_rlock(ifp); 557 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 558 if (ifma->ifma_addr->sa_family != AF_LINK) 559 continue; 560 h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 561 ifma->ifma_addr), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1); 562 hashtbl[(h >> 3)] |= 1 << (h & 0x7); 563 } 564 if_maddr_runlock(ifp); 565 566 /* write the hashtable */ 567 for (i = 0; i != 8; i++) 568 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]); 569} 570 571static void 572aue_reset_pegasus_II(struct aue_softc *sc) 573{ 574 /* Magic constants taken from Linux driver. */ 575 aue_csr_write_1(sc, AUE_REG_1D, 0); 576 aue_csr_write_1(sc, AUE_REG_7B, 2); 577#if 0 578 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode) 579 aue_csr_write_1(sc, AUE_REG_81, 6); 580 else 581#endif 582 aue_csr_write_1(sc, AUE_REG_81, 2); 583} 584 585static void 586aue_reset(struct aue_softc *sc) 587{ 588 int i; 589 590 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC); 591 592 for (i = 0; i != AUE_TIMEOUT; i++) { 593 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC)) 594 break; 595 if (uether_pause(&sc->sc_ue, hz / 100)) 596 break; 597 } 598 599 if (i == AUE_TIMEOUT) 600 device_printf(sc->sc_ue.ue_dev, "reset failed\n"); 601 602 /* 603 * The PHY(s) attached to the Pegasus chip may be held 604 * in reset until we flip on the GPIO outputs. Make sure 605 * to set the GPIO pins high so that the PHY(s) will 606 * be enabled. 607 * 608 * NOTE: We used to force all of the GPIO pins low first and then 609 * enable the ones we want. This has been changed to better 610 * match the ADMtek's reference design to avoid setting the 611 * power-down configuration line of the PHY at the same time 612 * it is reset. 613 */ 614 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 615 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 616 617 if (sc->sc_flags & AUE_FLAG_LSYS) { 618 /* Grrr. LinkSys has to be different from everyone else. */ 619 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 620 aue_csr_write_1(sc, AUE_GPIO0, 621 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 622 } 623 if (sc->sc_flags & AUE_FLAG_PII) 624 aue_reset_pegasus_II(sc); 625 626 /* Wait a little while for the chip to get its brains in order: */ 627 uether_pause(&sc->sc_ue, hz / 100); 628} 629 630static void 631aue_attach_post(struct usb_ether *ue) 632{ 633 struct aue_softc *sc = uether_getsc(ue); 634 635 /* reset the adapter */ 636 aue_reset(sc); 637 638 /* get station address from the EEPROM */ 639 aue_read_eeprom(sc, ue->ue_eaddr, 0, 3); 640} 641 642/* 643 * Probe for a Pegasus chip. 644 */ 645static int 646aue_probe(device_t dev) 647{ 648 struct usb_attach_arg *uaa = device_get_ivars(dev); 649 650 if (uaa->usb_mode != USB_MODE_HOST) 651 return (ENXIO); 652 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX) 653 return (ENXIO); 654 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX) 655 return (ENXIO); 656 /* 657 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict 658 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of 659 * the devices that look like Bluetooth adapters. 660 */ 661 if (uaa->info.idVendor == USB_VENDOR_BELKIN && 662 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 && 663 uaa->info.bcdDevice == 0x0413) 664 return (ENXIO); 665 666 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa)); 667} 668 669/* 670 * Attach the interface. Allocate softc structures, do ifmedia 671 * setup and ethernet/BPF attach. 672 */ 673static int 674aue_attach(device_t dev) 675{ 676 struct usb_attach_arg *uaa = device_get_ivars(dev); 677 struct aue_softc *sc = device_get_softc(dev); 678 struct usb_ether *ue = &sc->sc_ue; 679 uint8_t iface_index; 680 int error; 681 682 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 683 684 if (uaa->info.bcdDevice >= 0x0201) { 685 /* XXX currently undocumented */ 686 sc->sc_flags |= AUE_FLAG_VER_2; 687 } 688 689 device_set_usb_desc(dev); 690 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 691 692 iface_index = AUE_IFACE_IDX; 693 error = usbd_transfer_setup(uaa->device, &iface_index, 694 sc->sc_xfer, aue_config, AUE_N_TRANSFER, 695 sc, &sc->sc_mtx); 696 if (error) { 697 device_printf(dev, "allocating USB transfers failed\n"); 698 goto detach; 699 } 700 701 ue->ue_sc = sc; 702 ue->ue_dev = dev; 703 ue->ue_udev = uaa->device; 704 ue->ue_mtx = &sc->sc_mtx; 705 ue->ue_methods = &aue_ue_methods; 706 707 error = uether_ifattach(ue); 708 if (error) { 709 device_printf(dev, "could not attach interface\n"); 710 goto detach; 711 } 712 return (0); /* success */ 713 714detach: 715 aue_detach(dev); 716 return (ENXIO); /* failure */ 717} 718 719static int 720aue_detach(device_t dev) 721{ 722 struct aue_softc *sc = device_get_softc(dev); 723 struct usb_ether *ue = &sc->sc_ue; 724 725 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER); 726 uether_ifdetach(ue); 727 mtx_destroy(&sc->sc_mtx); 728 729 return (0); 730} 731 732static void 733aue_intr_callback(struct usb_xfer *xfer, usb_error_t error) 734{ 735 struct aue_softc *sc = usbd_xfer_softc(xfer); 736 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 737 struct aue_intrpkt pkt; 738 struct usb_page_cache *pc; 739 int actlen; 740 741 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 742 743 switch (USB_GET_STATE(xfer)) { 744 case USB_ST_TRANSFERRED: 745 746 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 747 actlen >= (int)sizeof(pkt)) { 748 749 pc = usbd_xfer_get_frame(xfer, 0); 750 usbd_copy_out(pc, 0, &pkt, sizeof(pkt)); 751 752 if (pkt.aue_txstat0) 753 ifp->if_oerrors++; 754 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL & 755 AUE_TXSTAT0_EXCESSCOLL)) 756 ifp->if_collisions++; 757 } 758 /* FALLTHROUGH */ 759 case USB_ST_SETUP: 760tr_setup: 761 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 762 usbd_transfer_submit(xfer); 763 return; 764 765 default: /* Error */ 766 if (error != USB_ERR_CANCELLED) { 767 /* try to clear stall first */ 768 usbd_xfer_set_stall(xfer); 769 goto tr_setup; 770 } 771 return; 772 } 773} 774 775static void 776aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 777{ 778 struct aue_softc *sc = usbd_xfer_softc(xfer); 779 struct usb_ether *ue = &sc->sc_ue; 780 struct ifnet *ifp = uether_getifp(ue); 781 struct aue_rxpkt stat; 782 struct usb_page_cache *pc; 783 int actlen; 784 785 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 786 pc = usbd_xfer_get_frame(xfer, 0); 787 788 switch (USB_GET_STATE(xfer)) { 789 case USB_ST_TRANSFERRED: 790 DPRINTFN(11, "received %d bytes\n", actlen); 791 792 if (sc->sc_flags & AUE_FLAG_VER_2) { 793 794 if (actlen == 0) { 795 ifp->if_ierrors++; 796 goto tr_setup; 797 } 798 } else { 799 800 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) { 801 ifp->if_ierrors++; 802 goto tr_setup; 803 } 804 usbd_copy_out(pc, actlen - sizeof(stat), &stat, 805 sizeof(stat)); 806 807 /* 808 * turn off all the non-error bits in the rx status 809 * word: 810 */ 811 stat.aue_rxstat &= AUE_RXSTAT_MASK; 812 if (stat.aue_rxstat) { 813 ifp->if_ierrors++; 814 goto tr_setup; 815 } 816 /* No errors; receive the packet. */ 817 actlen -= (sizeof(stat) + ETHER_CRC_LEN); 818 } 819 uether_rxbuf(ue, pc, 0, actlen); 820 821 /* FALLTHROUGH */ 822 case USB_ST_SETUP: 823tr_setup: 824 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 825 usbd_transfer_submit(xfer); 826 uether_rxflush(ue); 827 return; 828 829 default: /* Error */ 830 DPRINTF("bulk read error, %s\n", 831 usbd_errstr(error)); 832 833 if (error != USB_ERR_CANCELLED) { 834 /* try to clear stall first */ 835 usbd_xfer_set_stall(xfer); 836 goto tr_setup; 837 } 838 return; 839 } 840} 841 842static void 843aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 844{ 845 struct aue_softc *sc = usbd_xfer_softc(xfer); 846 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 847 struct usb_page_cache *pc; 848 struct mbuf *m; 849 uint8_t buf[2]; 850 int actlen; 851 852 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 853 pc = usbd_xfer_get_frame(xfer, 0); 854 855 switch (USB_GET_STATE(xfer)) { 856 case USB_ST_TRANSFERRED: 857 DPRINTFN(11, "transfer of %d bytes complete\n", actlen); 858 ifp->if_opackets++; 859 860 /* FALLTHROUGH */ 861 case USB_ST_SETUP: 862tr_setup: 863 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) { 864 /* 865 * don't send anything if there is no link ! 866 */ 867 return; 868 } 869 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 870 871 if (m == NULL) 872 return; 873 if (m->m_pkthdr.len > MCLBYTES) 874 m->m_pkthdr.len = MCLBYTES; 875 if (sc->sc_flags & AUE_FLAG_VER_2) { 876 877 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len); 878 879 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len); 880 881 } else { 882 883 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2)); 884 885 /* 886 * The ADMtek documentation says that the 887 * packet length is supposed to be specified 888 * in the first two bytes of the transfer, 889 * however it actually seems to ignore this 890 * info and base the frame size on the bulk 891 * transfer length. 892 */ 893 buf[0] = (uint8_t)(m->m_pkthdr.len); 894 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8); 895 896 usbd_copy_in(pc, 0, buf, 2); 897 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len); 898 } 899 900 /* 901 * if there's a BPF listener, bounce a copy 902 * of this frame to him: 903 */ 904 BPF_MTAP(ifp, m); 905 906 m_freem(m); 907 908 usbd_transfer_submit(xfer); 909 return; 910 911 default: /* Error */ 912 DPRINTFN(11, "transfer error, %s\n", 913 usbd_errstr(error)); 914 915 ifp->if_oerrors++; 916 917 if (error != USB_ERR_CANCELLED) { 918 /* try to clear stall first */ 919 usbd_xfer_set_stall(xfer); 920 goto tr_setup; 921 } 922 return; 923 } 924} 925 926static void 927aue_tick(struct usb_ether *ue) 928{ 929 struct aue_softc *sc = uether_getsc(ue); 930 struct mii_data *mii = GET_MII(sc); 931 932 AUE_LOCK_ASSERT(sc, MA_OWNED); 933 934 mii_tick(mii); 935 if ((sc->sc_flags & AUE_FLAG_LINK) == 0 936 && mii->mii_media_status & IFM_ACTIVE && 937 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 938 sc->sc_flags |= AUE_FLAG_LINK; 939 aue_start(ue); 940 } 941} 942 943static void 944aue_start(struct usb_ether *ue) 945{ 946 struct aue_softc *sc = uether_getsc(ue); 947 948 /* 949 * start the USB transfers, if not already started: 950 */ 951 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]); 952 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]); 953 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]); 954} 955 956static void 957aue_init(struct usb_ether *ue) 958{ 959 struct aue_softc *sc = uether_getsc(ue); 960 struct ifnet *ifp = uether_getifp(ue); 961 int i; 962 963 AUE_LOCK_ASSERT(sc, MA_OWNED); 964 965 /* 966 * Cancel pending I/O 967 */ 968 aue_reset(sc); 969 970 /* Set MAC address */ 971 for (i = 0; i != ETHER_ADDR_LEN; i++) 972 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]); 973 974 /* update promiscuous setting */ 975 aue_setpromisc(ue); 976 977 /* Load the multicast filter. */ 978 aue_setmulti(ue); 979 980 /* Enable RX and TX */ 981 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB); 982 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB); 983 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR); 984 985 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]); 986 987 ifp->if_drv_flags |= IFF_DRV_RUNNING; 988 aue_start(ue); 989} 990 991static void 992aue_setpromisc(struct usb_ether *ue) 993{ 994 struct aue_softc *sc = uether_getsc(ue); 995 struct ifnet *ifp = uether_getifp(ue); 996 997 AUE_LOCK_ASSERT(sc, MA_OWNED); 998 999 /* if we want promiscuous mode, set the allframes bit: */ 1000 if (ifp->if_flags & IFF_PROMISC) 1001 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1002 else 1003 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1004} 1005 1006/* 1007 * Set media options. 1008 */ 1009static int 1010aue_ifmedia_upd(struct ifnet *ifp) 1011{ 1012 struct aue_softc *sc = ifp->if_softc; 1013 struct mii_data *mii = GET_MII(sc); 1014 struct mii_softc *miisc; 1015 int error; 1016 1017 AUE_LOCK_ASSERT(sc, MA_OWNED); 1018 1019 sc->sc_flags &= ~AUE_FLAG_LINK; 1020 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1021 PHY_RESET(miisc); 1022 error = mii_mediachg(mii); 1023 return (error); 1024} 1025 1026/* 1027 * Report current media status. 1028 */ 1029static void 1030aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1031{ 1032 struct aue_softc *sc = ifp->if_softc; 1033 struct mii_data *mii = GET_MII(sc); 1034 1035 AUE_LOCK(sc); 1036 mii_pollstat(mii); 1037 ifmr->ifm_active = mii->mii_media_active; 1038 ifmr->ifm_status = mii->mii_media_status; 1039 AUE_UNLOCK(sc); 1040} 1041 1042/* 1043 * Stop the adapter and free any mbufs allocated to the 1044 * RX and TX lists. 1045 */ 1046static void 1047aue_stop(struct usb_ether *ue) 1048{ 1049 struct aue_softc *sc = uether_getsc(ue); 1050 struct ifnet *ifp = uether_getifp(ue); 1051 1052 AUE_LOCK_ASSERT(sc, MA_OWNED); 1053 1054 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1055 sc->sc_flags &= ~AUE_FLAG_LINK; 1056 1057 /* 1058 * stop all the transfers, if not already stopped: 1059 */ 1060 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]); 1061 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]); 1062 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]); 1063 1064 aue_csr_write_1(sc, AUE_CTL0, 0); 1065 aue_csr_write_1(sc, AUE_CTL1, 0); 1066 aue_reset(sc); 1067} 1068