ehci_mv.c revision 220558
1/*- 2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. 3 * All rights reserved. 4 * 5 * Developed by Semihalf. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of MARVELL nor the names of contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32/* 33 * FDT attachment driver for the USB Enhanced Host Controller. 34 */ 35 36#include <sys/cdefs.h> 37__FBSDID("$FreeBSD: head/sys/dev/usb/controller/ehci_mv.c 220558 2011-04-12 07:49:11Z hselasky $"); 38 39#include "opt_bus.h" 40 41#include <sys/stdint.h> 42#include <sys/stddef.h> 43#include <sys/param.h> 44#include <sys/queue.h> 45#include <sys/types.h> 46#include <sys/systm.h> 47#include <sys/kernel.h> 48#include <sys/bus.h> 49#include <sys/module.h> 50#include <sys/lock.h> 51#include <sys/mutex.h> 52#include <sys/condvar.h> 53#include <sys/sysctl.h> 54#include <sys/sx.h> 55#include <sys/unistd.h> 56#include <sys/callout.h> 57#include <sys/malloc.h> 58#include <sys/priv.h> 59 60#include <dev/ofw/ofw_bus.h> 61#include <dev/ofw/ofw_bus_subr.h> 62 63#include <dev/usb/usb.h> 64#include <dev/usb/usbdi.h> 65 66#include <dev/usb/usb_core.h> 67#include <dev/usb/usb_busdma.h> 68#include <dev/usb/usb_process.h> 69#include <dev/usb/usb_util.h> 70 71#include <dev/usb/usb_controller.h> 72#include <dev/usb/usb_bus.h> 73#include <dev/usb/controller/ehci.h> 74#include <dev/usb/controller/ehcireg.h> 75 76#include <arm/mv/mvreg.h> 77#include <arm/mv/mvvar.h> 78 79#define EHCI_VENDORID_MRVL 0x1286 80#define EHCI_HC_DEVSTR "Marvell Integrated USB 2.0 controller" 81 82static device_attach_t mv_ehci_attach; 83static device_detach_t mv_ehci_detach; 84static device_shutdown_t mv_ehci_shutdown; 85static device_suspend_t mv_ehci_suspend; 86static device_resume_t mv_ehci_resume; 87 88static int err_intr(void *arg); 89 90static struct resource *irq_err; 91static void *ih_err; 92 93/* EHCI HC regs start at this offset within USB range */ 94#define MV_USB_HOST_OFST 0x0100 95 96#define USB_BRIDGE_INTR_CAUSE 0x210 97#define USB_BRIDGE_INTR_MASK 0x214 98#define USB_BRIDGE_ERR_ADDR 0x21C 99 100#define MV_USB_ADDR_DECODE_ERR (1 << 0) 101#define MV_USB_HOST_UNDERFLOW (1 << 1) 102#define MV_USB_HOST_OVERFLOW (1 << 2) 103#define MV_USB_DEVICE_UNDERFLOW (1 << 3) 104 105static int 106mv_ehci_suspend(device_t self) 107{ 108 ehci_softc_t *sc = device_get_softc(self); 109 int err; 110 111 err = bus_generic_suspend(self); 112 if (err) 113 return (err); 114 ehci_suspend(sc); 115 return (0); 116} 117 118static int 119mv_ehci_resume(device_t self) 120{ 121 ehci_softc_t *sc = device_get_softc(self); 122 123 ehci_resume(sc); 124 125 bus_generic_resume(self); 126 127 return (0); 128} 129 130static int 131mv_ehci_shutdown(device_t self) 132{ 133 ehci_softc_t *sc = device_get_softc(self); 134 int err; 135 136 err = bus_generic_shutdown(self); 137 if (err) 138 return (err); 139 ehci_shutdown(sc); 140 141 return (0); 142} 143 144static int 145mv_ehci_probe(device_t self) 146{ 147 148 if (!ofw_bus_is_compatible(self, "mrvl,usb-ehci")) 149 return (ENXIO); 150 151 device_set_desc(self, EHCI_HC_DEVSTR); 152 153 return (BUS_PROBE_DEFAULT); 154} 155 156static int 157mv_ehci_attach(device_t self) 158{ 159 ehci_softc_t *sc = device_get_softc(self); 160 bus_space_handle_t bsh; 161 int err; 162 int rid; 163 164 /* initialise some bus fields */ 165 sc->sc_bus.parent = self; 166 sc->sc_bus.devices = sc->sc_devices; 167 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 168 169 /* get all DMA memory */ 170 if (usb_bus_mem_alloc_all(&sc->sc_bus, 171 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 172 return (ENOMEM); 173 } 174 175 rid = 0; 176 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 177 if (!sc->sc_io_res) { 178 device_printf(self, "Could not map memory\n"); 179 goto error; 180 } 181 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 182 bsh = rman_get_bushandle(sc->sc_io_res); 183 sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST; 184 185 /* 186 * Marvell EHCI host controller registers start at certain offset 187 * within the whole USB registers range, so create a subregion for the 188 * host mode configuration purposes. 189 */ 190 191 if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST, 192 sc->sc_io_size, &sc->sc_io_hdl) != 0) 193 panic("%s: unable to subregion USB host registers", 194 device_get_name(self)); 195 196 rid = 0; 197 irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 198 RF_SHAREABLE | RF_ACTIVE); 199 if (irq_err == NULL) { 200 device_printf(self, "Could not allocate error irq\n"); 201 mv_ehci_detach(self); 202 return (ENXIO); 203 } 204 205 /* 206 * Notice: Marvell EHCI controller has TWO interrupt lines, so make 207 * sure to use the correct rid for the main one (controller interrupt) 208 * -- refer to DTS for the right resource number to use here. 209 */ 210 rid = 1; 211 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 212 RF_SHAREABLE | RF_ACTIVE); 213 if (sc->sc_irq_res == NULL) { 214 device_printf(self, "Could not allocate irq\n"); 215 goto error; 216 } 217 218 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 219 if (!sc->sc_bus.bdev) { 220 device_printf(self, "Could not add USB device\n"); 221 goto error; 222 } 223 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 224 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 225 226 sprintf(sc->sc_vendor, "Marvell"); 227 228 err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO, 229 err_intr, NULL, sc, &ih_err); 230 if (err) { 231 device_printf(self, "Could not setup error irq, %d\n", err); 232 ih_err = NULL; 233 goto error; 234 } 235 236 EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR | 237 MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW | 238 MV_USB_DEVICE_UNDERFLOW); 239 240 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 241 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 242 if (err) { 243 device_printf(self, "Could not setup irq, %d\n", err); 244 sc->sc_intr_hdl = NULL; 245 goto error; 246 } 247 248 /* 249 * Workaround for Marvell integrated EHCI controller: reset of 250 * the EHCI core clears the USBMODE register, which sets the core in 251 * an undefined state (neither host nor agent), so it needs to be set 252 * again for proper operation. 253 * 254 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for 255 * details. 256 */ 257 sc->sc_flags |= EHCI_SCFLG_SETMODE; 258 if (bootverbose) 259 device_printf(self, "5.24 GL USB-2 workaround enabled\n"); 260 261 /* XXX all MV chips need it? */ 262 sc->sc_flags |= EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_NORESTERM; 263 264 err = ehci_init(sc); 265 if (!err) { 266 err = device_probe_and_attach(sc->sc_bus.bdev); 267 } 268 if (err) { 269 device_printf(self, "USB init failed err=%d\n", err); 270 goto error; 271 } 272 return (0); 273 274error: 275 mv_ehci_detach(self); 276 return (ENXIO); 277} 278 279static int 280mv_ehci_detach(device_t self) 281{ 282 ehci_softc_t *sc = device_get_softc(self); 283 device_t bdev; 284 int err; 285 286 if (sc->sc_bus.bdev) { 287 bdev = sc->sc_bus.bdev; 288 device_detach(bdev); 289 device_delete_child(self, bdev); 290 } 291 /* during module unload there are lots of children leftover */ 292 device_delete_all_children(self); 293 294 /* 295 * disable interrupts that might have been switched on in mv_ehci_attach 296 */ 297 if (sc->sc_io_res) { 298 EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0); 299 } 300 if (sc->sc_irq_res && sc->sc_intr_hdl) { 301 /* 302 * only call ehci_detach() after ehci_init() 303 */ 304 ehci_detach(sc); 305 306 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 307 308 if (err) 309 /* XXX or should we panic? */ 310 device_printf(self, "Could not tear down irq, %d\n", 311 err); 312 sc->sc_intr_hdl = NULL; 313 } 314 if (irq_err && ih_err) { 315 err = bus_teardown_intr(self, irq_err, ih_err); 316 317 if (err) 318 device_printf(self, "Could not tear down irq, %d\n", 319 err); 320 ih_err = NULL; 321 } 322 if (irq_err) { 323 bus_release_resource(self, SYS_RES_IRQ, 0, irq_err); 324 irq_err = NULL; 325 } 326 if (sc->sc_irq_res) { 327 bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res); 328 sc->sc_irq_res = NULL; 329 } 330 if (sc->sc_io_res) { 331 bus_release_resource(self, SYS_RES_MEMORY, 0, 332 sc->sc_io_res); 333 sc->sc_io_res = NULL; 334 } 335 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 336 337 return (0); 338} 339 340static int 341err_intr(void *arg) 342{ 343 ehci_softc_t *sc = arg; 344 unsigned int cause; 345 346 cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE); 347 if (cause) { 348 printf("USB error: "); 349 if (cause & MV_USB_ADDR_DECODE_ERR) { 350 uint32_t addr; 351 352 addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR); 353 printf("address decoding error (addr=%#x)\n", addr); 354 } 355 if (cause & MV_USB_HOST_UNDERFLOW) 356 printf("host underflow\n"); 357 if (cause & MV_USB_HOST_OVERFLOW) 358 printf("host overflow\n"); 359 if (cause & MV_USB_DEVICE_UNDERFLOW) 360 printf("device underflow\n"); 361 if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW | 362 MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW)) 363 printf("unknown cause (cause=%#x)\n", cause); 364 365 EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0); 366 } 367 return (FILTER_HANDLED); 368} 369 370static device_method_t ehci_methods[] = { 371 /* Device interface */ 372 DEVMETHOD(device_probe, mv_ehci_probe), 373 DEVMETHOD(device_attach, mv_ehci_attach), 374 DEVMETHOD(device_detach, mv_ehci_detach), 375 DEVMETHOD(device_suspend, mv_ehci_suspend), 376 DEVMETHOD(device_resume, mv_ehci_resume), 377 DEVMETHOD(device_shutdown, mv_ehci_shutdown), 378 379 /* Bus interface */ 380 DEVMETHOD(bus_print_child, bus_generic_print_child), 381 382 {0, 0} 383}; 384 385static driver_t ehci_driver = { 386 "ehci", 387 ehci_methods, 388 sizeof(ehci_softc_t), 389}; 390 391static devclass_t ehci_devclass; 392 393DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); 394MODULE_DEPEND(ehci, usb, 1, 1, 1); 395