ehci_ixp4xx.c revision 188410
1/*- 2 * Copyright (c) 2008 Sam Leffler. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25/* 26 * IXP435 attachment driver for the USB Enhanced Host Controller. 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/sys/dev/usb2/controller/ehci2_ixp4xx.c 188410 2009-02-09 21:50:04Z thompsa $"); 31 32#include "opt_bus.h" 33 34#include <dev/usb2/include/usb2_mfunc.h> 35#include <dev/usb2/include/usb2_defs.h> 36#include <dev/usb2/include/usb2_standard.h> 37 38#include <dev/usb2/core/usb2_core.h> 39#include <dev/usb2/core/usb2_busdma.h> 40#include <dev/usb2/core/usb2_process.h> 41#include <dev/usb2/core/usb2_sw_transfer.h> 42#include <dev/usb2/core/usb2_util.h> 43 44#include <dev/usb2/controller/usb2_controller.h> 45#include <dev/usb2/controller/usb2_bus.h> 46#include <dev/usb2/controller/ehci2.h> 47 48#include <arm/xscale/ixp425/ixp425reg.h> 49#include <arm/xscale/ixp425/ixp425var.h> 50 51#define EHCI_VENDORID_IXP4XX 0x42fa05 52#define EHCI_HC_DEVSTR "IXP4XX Integrated USB 2.0 controller" 53 54struct ixp_ehci_softc { 55 ehci_softc_t base; /* storage for EHCI code */ 56 bus_space_tag_t iot; 57 bus_space_handle_t ioh; 58 struct bus_space tag; /* tag for private bus space ops */ 59}; 60 61static device_attach_t ehci_ixp_attach; 62static device_detach_t ehci_ixp_detach; 63static device_shutdown_t ehci_ixp_shutdown; 64static device_suspend_t ehci_ixp_suspend; 65static device_resume_t ehci_ixp_resume; 66 67static uint8_t ehci_bs_r_1(void *, bus_space_handle_t, bus_size_t); 68static void ehci_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t); 69static uint16_t ehci_bs_r_2(void *, bus_space_handle_t, bus_size_t); 70static void ehci_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t); 71static uint32_t ehci_bs_r_4(void *, bus_space_handle_t, bus_size_t); 72static void ehci_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t); 73 74static int 75ehci_ixp_suspend(device_t self) 76{ 77 ehci_softc_t *sc = device_get_softc(self); 78 int err; 79 80 err = bus_generic_suspend(self); 81 if (err) 82 return (err); 83 ehci_suspend(sc); 84 return (0); 85} 86 87static int 88ehci_ixp_resume(device_t self) 89{ 90 ehci_softc_t *sc = device_get_softc(self); 91 92 ehci_resume(sc); 93 94 bus_generic_resume(self); 95 96 return (0); 97} 98 99static int 100ehci_ixp_shutdown(device_t self) 101{ 102 ehci_softc_t *sc = device_get_softc(self); 103 int err; 104 105 err = bus_generic_shutdown(self); 106 if (err) 107 return (err); 108 ehci_shutdown(sc); 109 110 return (0); 111} 112 113static int 114ehci_ixp_probe(device_t self) 115{ 116 117 device_set_desc(self, EHCI_HC_DEVSTR); 118 119 return (BUS_PROBE_DEFAULT); 120} 121 122static int 123ehci_ixp_attach(device_t self) 124{ 125 struct ixp_ehci_softc *isc = device_get_softc(self); 126 ehci_softc_t *sc = &isc->base; 127 int err; 128 int rid; 129 130 /* initialise some bus fields */ 131 sc->sc_bus.parent = self; 132 sc->sc_bus.devices = sc->sc_devices; 133 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 134 135 /* get all DMA memory */ 136 if (usb2_bus_mem_alloc_all(&sc->sc_bus, 137 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 138 return (ENOMEM); 139 } 140 141 sc->sc_bus.usbrev = USB_REV_2_0; 142 143 /* NB: hints fix the memory location and irq */ 144 145 rid = 0; 146 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 147 if (!sc->sc_io_res) { 148 device_printf(self, "Could not map memory\n"); 149 goto error; 150 } 151 152 /* 153 * Craft special resource for bus space ops that handle 154 * byte-alignment of non-word addresses. Also, since 155 * we're already intercepting bus space ops we handle 156 * the register window offset that could otherwise be 157 * done with bus_space_subregion. 158 */ 159 isc->iot = rman_get_bustag(sc->sc_io_res); 160 isc->tag.bs_cookie = isc->iot; 161 /* read single */ 162 isc->tag.bs_r_1 = ehci_bs_r_1, 163 isc->tag.bs_r_2 = ehci_bs_r_2, 164 isc->tag.bs_r_4 = ehci_bs_r_4, 165 /* write (single) */ 166 isc->tag.bs_w_1 = ehci_bs_w_1, 167 isc->tag.bs_w_2 = ehci_bs_w_2, 168 isc->tag.bs_w_4 = ehci_bs_w_4, 169 170 sc->sc_io_tag = &isc->tag; 171 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 172 sc->sc_io_size = IXP435_USB1_SIZE - 0x100; 173 174 rid = 0; 175 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 176 RF_ACTIVE); 177 if (sc->sc_irq_res == NULL) { 178 device_printf(self, "Could not allocate irq\n"); 179 goto error; 180 } 181 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 182 if (!sc->sc_bus.bdev) { 183 device_printf(self, "Could not add USB device\n"); 184 goto error; 185 } 186 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 187 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 188 189 sprintf(sc->sc_vendor, "Intel"); 190 191 192 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 193 NULL, (void *)(void *)ehci_interrupt, sc, &sc->sc_intr_hdl); 194 if (err) { 195 device_printf(self, "Could not setup irq, %d\n", err); 196 sc->sc_intr_hdl = NULL; 197 goto error; 198 } 199 200 /* 201 * Arrange to force Host mode, select big-endian byte alignment, 202 * and arrange to not terminate reset operations (the adapter 203 * will ignore it if we do but might as well save a reg write). 204 * Also, the controller has an embedded Transaction Translator 205 * which means port speed must be read from the Port Status 206 * register following a port enable. 207 */ 208 sc->sc_flags |= EHCI_SCFLG_TT 209 | EHCI_SCFLG_SETMODE 210 | EHCI_SCFLG_BIGEDESC 211 | EHCI_SCFLG_BIGEMMIO 212 | EHCI_SCFLG_NORESTERM 213 ; 214 215 err = ehci_init(sc); 216 if (!err) { 217 err = device_probe_and_attach(sc->sc_bus.bdev); 218 } 219 if (err) { 220 device_printf(self, "USB init failed err=%d\n", err); 221 goto error; 222 } 223 return (0); 224 225error: 226 ehci_ixp_detach(self); 227 return (ENXIO); 228} 229 230static int 231ehci_ixp_detach(device_t self) 232{ 233 struct ixp_ehci_softc *isc = device_get_softc(self); 234 ehci_softc_t *sc = &isc->base; 235 device_t bdev; 236 int err; 237 238 if (sc->sc_bus.bdev) { 239 bdev = sc->sc_bus.bdev; 240 device_detach(bdev); 241 device_delete_child(self, bdev); 242 } 243 /* during module unload there are lots of children leftover */ 244 device_delete_all_children(self); 245 246 /* 247 * disable interrupts that might have been switched on in ehci_init 248 */ 249 if (sc->sc_io_res) { 250 EWRITE4(sc, EHCI_USBINTR, 0); 251 } 252 253 if (sc->sc_irq_res && sc->sc_intr_hdl) { 254 /* 255 * only call ehci_detach() after ehci_init() 256 */ 257 ehci_detach(sc); 258 259 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 260 261 if (err) 262 /* XXX or should we panic? */ 263 device_printf(self, "Could not tear down irq, %d\n", 264 err); 265 sc->sc_intr_hdl = NULL; 266 } 267 268 if (sc->sc_irq_res) { 269 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 270 sc->sc_irq_res = NULL; 271 } 272 if (sc->sc_io_res) { 273 bus_release_resource(self, SYS_RES_MEMORY, 0, 274 sc->sc_io_res); 275 sc->sc_io_res = NULL; 276 } 277 usb2_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 278 279 return (0); 280} 281 282/* 283 * Bus space accessors for PIO operations. 284 */ 285 286static uint8_t 287ehci_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o) 288{ 289 return bus_space_read_1((bus_space_tag_t) t, h, 290 0x100 + (o &~ 3) + (3 - (o & 3))); 291} 292 293static void 294ehci_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v) 295{ 296 panic("%s", __func__); 297} 298 299static uint16_t 300ehci_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o) 301{ 302 return bus_space_read_2((bus_space_tag_t) t, h, 303 0x100 + (o &~ 3) + (2 - (o & 3))); 304} 305 306static void 307ehci_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v) 308{ 309 panic("%s", __func__); 310} 311 312static uint32_t 313ehci_bs_r_4(void *t, bus_space_handle_t h, bus_size_t o) 314{ 315 return bus_space_read_4((bus_space_tag_t) t, h, 0x100 + o); 316} 317 318static void 319ehci_bs_w_4(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v) 320{ 321 bus_space_write_4((bus_space_tag_t) t, h, 0x100 + o, v); 322} 323 324static device_method_t ehci_methods[] = { 325 /* Device interface */ 326 DEVMETHOD(device_probe, ehci_ixp_probe), 327 DEVMETHOD(device_attach, ehci_ixp_attach), 328 DEVMETHOD(device_detach, ehci_ixp_detach), 329 DEVMETHOD(device_suspend, ehci_ixp_suspend), 330 DEVMETHOD(device_resume, ehci_ixp_resume), 331 DEVMETHOD(device_shutdown, ehci_ixp_shutdown), 332 333 /* Bus interface */ 334 DEVMETHOD(bus_print_child, bus_generic_print_child), 335 336 {0, 0} 337}; 338 339static driver_t ehci_driver = { 340 "ehci", 341 ehci_methods, 342 sizeof(struct ixp_ehci_softc), 343}; 344 345static devclass_t ehci_devclass; 346 347DRIVER_MODULE(ehci, ixp, ehci_driver, ehci_devclass, 0, 0); 348MODULE_DEPEND(ehci, usb2_controller, 1, 1, 1); 349MODULE_DEPEND(ehci, usb2_core, 1, 1, 1); 350