if_urtwnreg.h revision 294471
1/*- 2 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 * 16 * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ 17 * $FreeBSD: head/sys/dev/usb/wlan/if_urtwnreg.h 294471 2016-01-20 23:27:02Z avos $ 18 */ 19 20#define URTWN_CONFIG_INDEX 0 21#define URTWN_IFACE_INDEX 0 22 23#define URTWN_NOISE_FLOOR -95 24 25#define R92C_MAX_CHAINS 2 26 27/* Maximum number of output pipes is 3. */ 28#define R92C_MAX_EPOUT 3 29 30#define R92C_MAX_TX_PWR 0x3f 31 32#define R92C_PUBQ_NPAGES 231 33#define R92C_TXPKTBUF_COUNT 256 34#define R92C_TX_PAGE_COUNT 248 35#define R92C_TX_PAGE_BOUNDARY (R92C_TX_PAGE_COUNT + 1) 36#define R88E_TXPKTBUF_COUNT 177 37#define R88E_TX_PAGE_COUNT 169 38#define R88E_TX_PAGE_BOUNDARY (R88E_TX_PAGE_COUNT + 1) 39 40#define R92C_H2C_NBOX 4 41 42/* USB Requests. */ 43#define R92C_REQ_REGS 0x05 44 45/* 46 * MAC registers. 47 */ 48/* System Configuration. */ 49#define R92C_SYS_ISO_CTRL 0x000 50#define R92C_SYS_FUNC_EN 0x002 51#define R92C_APS_FSMCO 0x004 52#define R92C_SYS_CLKR 0x008 53#define R92C_AFE_MISC 0x010 54#define R92C_SPS0_CTRL 0x011 55#define R92C_SPS_OCP_CFG 0x018 56#define R92C_RSV_CTRL 0x01c 57#define R92C_RF_CTRL 0x01f 58#define R92C_LDOA15_CTRL 0x020 59#define R92C_LDOV12D_CTRL 0x021 60#define R92C_LDOHCI12_CTRL 0x022 61#define R92C_LPLDO_CTRL 0x023 62#define R92C_AFE_XTAL_CTRL 0x024 63#define R92C_AFE_PLL_CTRL 0x028 64#define R92C_EFUSE_CTRL 0x030 65#define R92C_EFUSE_TEST 0x034 66#define R92C_PWR_DATA 0x038 67#define R92C_CAL_TIMER 0x03c 68#define R92C_ACLK_MON 0x03e 69#define R92C_GPIO_MUXCFG 0x040 70#define R92C_GPIO_IO_SEL 0x042 71#define R92C_MAC_PINMUX_CFG 0x043 72#define R92C_GPIO_PIN_CTRL 0x044 73#define R92C_GPIO_INTM 0x048 74#define R92C_LEDCFG0 0x04c 75#define R92C_LEDCFG1 0x04d 76#define R92C_LEDCFG2 0x04e 77#define R92C_LEDCFG3 0x04f 78#define R92C_FSIMR 0x050 79#define R92C_FSISR 0x054 80#define R92C_HSIMR 0x058 81#define R92C_HSISR 0x05c 82#define R92C_MCUFWDL 0x080 83#define R92C_HMEBOX_EXT(idx) (0x088 + (idx) * 2) 84#define R88E_HIMR 0x0b0 85#define R88E_HISR 0x0b4 86#define R88E_HIMRE 0x0b8 87#define R88E_HISRE 0x0bc 88#define R92C_EFUSE_ACCESS 0x0cf 89#define R92C_BIST_SCAN 0x0d0 90#define R92C_BIST_RPT 0x0d4 91#define R92C_BIST_ROM_RPT 0x0d8 92#define R92C_USB_SIE_INTF 0x0e0 93#define R92C_PCIE_MIO_INTF 0x0e4 94#define R92C_PCIE_MIO_INTD 0x0e8 95#define R92C_HPON_FSM 0x0ec 96#define R92C_SYS_CFG 0x0f0 97/* MAC General Configuration. */ 98#define R92C_CR 0x100 99#define R92C_MSR 0x102 100#define R92C_PBP 0x104 101#define R92C_TRXDMA_CTRL 0x10c 102#define R92C_TRXFF_BNDY 0x114 103#define R92C_TRXFF_STATUS 0x118 104#define R92C_RXFF_PTR 0x11c 105#define R92C_HIMR 0x120 106#define R92C_HISR 0x124 107#define R92C_HIMRE 0x128 108#define R92C_HISRE 0x12c 109#define R92C_CPWM 0x12f 110#define R92C_FWIMR 0x130 111#define R92C_FWISR 0x134 112#define R92C_PKTBUF_DBG_CTRL 0x140 113#define R92C_PKTBUF_DBG_DATA_L 0x144 114#define R92C_PKTBUF_DBG_DATA_H 0x148 115#define R92C_TC0_CTRL(i) (0x150 + (i) * 4) 116#define R92C_TCUNIT_BASE 0x164 117#define R92C_MBIST_START 0x174 118#define R92C_MBIST_DONE 0x178 119#define R92C_MBIST_FAIL 0x17c 120#define R92C_C2HEVT_MSG_NORMAL 0x1a0 121#define R92C_C2HEVT_MSG_TEST 0x1b8 122#define R92C_C2HEVT_CLEAR 0x1bf 123#define R92C_MCUTST_1 0x1c0 124#define R92C_FMETHR 0x1c8 125#define R92C_HMETFR 0x1cc 126#define R92C_HMEBOX(idx) (0x1d0 + (idx) * 4) 127#define R92C_LLT_INIT 0x1e0 128#define R92C_BB_ACCESS_CTRL 0x1e8 129#define R92C_BB_ACCESS_DATA 0x1ec 130#define R88E_HMEBOX_EXT(idx) (0x1f0 + (idx) * 4) 131/* Tx DMA Configuration. */ 132#define R92C_RQPN 0x200 133#define R92C_FIFOPAGE 0x204 134#define R92C_TDECTRL 0x208 135#define R92C_TXDMA_OFFSET_CHK 0x20c 136#define R92C_TXDMA_STATUS 0x210 137#define R92C_RQPN_NPQ 0x214 138/* Rx DMA Configuration. */ 139#define R92C_RXDMA_AGG_PG_TH 0x280 140#define R92C_RXPKT_NUM 0x284 141#define R92C_RXDMA_STATUS 0x288 142/* Protocol Configuration. */ 143#define R92C_FWHW_TXQ_CTRL 0x420 144#define R92C_HWSEQ_CTRL 0x423 145#define R92C_TXPKTBUF_BCNQ_BDNY 0x424 146#define R92C_TXPKTBUF_MGQ_BDNY 0x425 147#define R92C_SPEC_SIFS 0x428 148#define R92C_RL 0x42a 149#define R92C_DARFRC 0x430 150#define R92C_RARFRC 0x438 151#define R92C_RRSR 0x440 152#define R92C_ARFR(i) (0x444 + (i) * 4) 153#define R92C_AGGLEN_LMT 0x458 154#define R92C_AMPDU_MIN_SPACE 0x45c 155#define R92C_TXPKTBUF_WMAC_LBK_BF_HD 0x45d 156#define R92C_FAST_EDCA_CTRL 0x460 157#define R92C_RD_RESP_PKT_TH 0x463 158#define R92C_INIRTS_RATE_SEL 0x480 159#define R92C_INIDATA_RATE_SEL(macid) (0x484 + (macid)) 160#define R92C_MAX_AGGR_NUM 0x4ca 161#define R88E_TX_RPT_CTRL 0x4ec 162#define R88E_TX_RPT_MACID_MAX 0x4ed 163#define R88E_TX_RPT_TIME 0x4f0 164/* EDCA Configuration. */ 165#define R92C_EDCA_VO_PARAM 0x500 166#define R92C_EDCA_VI_PARAM 0x504 167#define R92C_EDCA_BE_PARAM 0x508 168#define R92C_EDCA_BK_PARAM 0x50c 169#define R92C_BCNTCFG 0x510 170#define R92C_PIFS 0x512 171#define R92C_RDG_PIFS 0x513 172#define R92C_SIFS_CCK 0x514 173#define R92C_SIFS_OFDM 0x516 174#define R92C_AGGR_BREAK_TIME 0x51a 175#define R92C_SLOT 0x51b 176#define R92C_TX_PTCL_CTRL 0x520 177#define R92C_TXPAUSE 0x522 178#define R92C_DIS_TXREQ_CLR 0x523 179#define R92C_RD_CTRL 0x524 180#define R92C_TBTT_PROHIBIT 0x540 181#define R92C_RD_NAV_NXT 0x544 182#define R92C_NAV_PROT_LEN 0x546 183#define R92C_BCN_CTRL 0x550 184#define R92C_MBID_NUM 0x552 185#define R92C_DUAL_TSF_RST 0x553 186#define R92C_BCN_INTERVAL 0x554 187#define R92C_DRVERLYINT 0x558 188#define R92C_BCNDMATIM 0x559 189#define R92C_ATIMWND 0x55a 190#define R92C_USTIME_TSF 0x55c 191#define R92C_BCN_MAX_ERR 0x55d 192#define R92C_RXTSF_OFFSET_CCK 0x55e 193#define R92C_RXTSF_OFFSET_OFDM 0x55f 194#define R92C_TSFTR 0x560 195#define R92C_INIT_TSFTR 0x564 196#define R92C_PSTIMER 0x580 197#define R92C_TIMER0 0x584 198#define R92C_TIMER1 0x588 199#define R92C_ACMHWCTRL 0x5c0 200#define R92C_ACMRSTCTRL 0x5c1 201#define R92C_ACMAVG 0x5c2 202#define R92C_VO_ADMTIME 0x5c4 203#define R92C_VI_ADMTIME 0x5c6 204#define R92C_BE_ADMTIME 0x5c8 205#define R92C_EDCA_RANDOM_GEN 0x5cc 206#define R92C_SCH_TXCMD 0x5d0 207/* WMAC Configuration. */ 208#define R92C_APSD_CTRL 0x600 209#define R92C_BWOPMODE 0x603 210#define R92C_RCR 0x608 211#define R92C_RX_DRVINFO_SZ 0x60f 212#define R92C_MACID 0x610 213#define R92C_BSSID 0x618 214#define R92C_MAR 0x620 215#define R92C_MAC_SPEC_SIFS 0x63a 216#define R92C_R2T_SIFS 0x63c 217#define R92C_T2T_SIFS 0x63e 218#define R92C_ACKTO 0x640 219#define R92C_CAMCMD 0x670 220#define R92C_CAMWRITE 0x674 221#define R92C_CAMREAD 0x678 222#define R92C_CAMDBG 0x67c 223#define R92C_SECCFG 0x680 224#define R92C_RXFLTMAP0 0x6a0 225#define R92C_RXFLTMAP1 0x6a2 226#define R92C_RXFLTMAP2 0x6a4 227 228/* Bits for R92C_SYS_ISO_CTRL. */ 229#define R92C_SYS_ISO_CTRL_MD2PP 0x0001 230#define R92C_SYS_ISO_CTRL_UA2USB 0x0002 231#define R92C_SYS_ISO_CTRL_UD2CORE 0x0004 232#define R92C_SYS_ISO_CTRL_PA2PCIE 0x0008 233#define R92C_SYS_ISO_CTRL_PD2CORE 0x0010 234#define R92C_SYS_ISO_CTRL_IP2MAC 0x0020 235#define R92C_SYS_ISO_CTRL_DIOP 0x0040 236#define R92C_SYS_ISO_CTRL_DIOE 0x0080 237#define R92C_SYS_ISO_CTRL_EB2CORE 0x0100 238#define R92C_SYS_ISO_CTRL_DIOR 0x0200 239#define R92C_SYS_ISO_CTRL_PWC_EV25V 0x4000 240#define R92C_SYS_ISO_CTRL_PWC_EV12V 0x8000 241 242/* Bits for R92C_SYS_FUNC_EN. */ 243#define R92C_SYS_FUNC_EN_BBRSTB 0x0001 244#define R92C_SYS_FUNC_EN_BB_GLB_RST 0x0002 245#define R92C_SYS_FUNC_EN_USBA 0x0004 246#define R92C_SYS_FUNC_EN_UPLL 0x0008 247#define R92C_SYS_FUNC_EN_USBD 0x0010 248#define R92C_SYS_FUNC_EN_DIO_PCIE 0x0020 249#define R92C_SYS_FUNC_EN_PCIEA 0x0040 250#define R92C_SYS_FUNC_EN_PPLL 0x0080 251#define R92C_SYS_FUNC_EN_PCIED 0x0100 252#define R92C_SYS_FUNC_EN_DIOE 0x0200 253#define R92C_SYS_FUNC_EN_CPUEN 0x0400 254#define R92C_SYS_FUNC_EN_DCORE 0x0800 255#define R92C_SYS_FUNC_EN_ELDR 0x1000 256#define R92C_SYS_FUNC_EN_DIO_RF 0x2000 257#define R92C_SYS_FUNC_EN_HWPDN 0x4000 258#define R92C_SYS_FUNC_EN_MREGEN 0x8000 259 260/* Bits for R92C_APS_FSMCO. */ 261#define R92C_APS_FSMCO_PFM_LDALL 0x00000001 262#define R92C_APS_FSMCO_PFM_ALDN 0x00000002 263#define R92C_APS_FSMCO_PFM_LDKP 0x00000004 264#define R92C_APS_FSMCO_PFM_WOWL 0x00000008 265#define R92C_APS_FSMCO_PDN_EN 0x00000010 266#define R92C_APS_FSMCO_PDN_PL 0x00000020 267#define R92C_APS_FSMCO_APFM_ONMAC 0x00000100 268#define R92C_APS_FSMCO_APFM_OFF 0x00000200 269#define R92C_APS_FSMCO_APFM_RSM 0x00000400 270#define R92C_APS_FSMCO_AFSM_HSUS 0x00000800 271#define R92C_APS_FSMCO_AFSM_PCIE 0x00001000 272#define R92C_APS_FSMCO_APDM_MAC 0x00002000 273#define R92C_APS_FSMCO_APDM_HOST 0x00004000 274#define R92C_APS_FSMCO_APDM_HPDN 0x00008000 275#define R92C_APS_FSMCO_RDY_MACON 0x00010000 276#define R92C_APS_FSMCO_SUS_HOST 0x00020000 277#define R92C_APS_FSMCO_ROP_ALD 0x00100000 278#define R92C_APS_FSMCO_ROP_PWR 0x00200000 279#define R92C_APS_FSMCO_ROP_SPS 0x00400000 280#define R92C_APS_FSMCO_SOP_MRST 0x02000000 281#define R92C_APS_FSMCO_SOP_FUSE 0x04000000 282#define R92C_APS_FSMCO_SOP_ABG 0x08000000 283#define R92C_APS_FSMCO_SOP_AMB 0x10000000 284#define R92C_APS_FSMCO_SOP_RCK 0x20000000 285#define R92C_APS_FSMCO_SOP_A8M 0x40000000 286#define R92C_APS_FSMCO_XOP_BTCK 0x80000000 287 288/* Bits for R92C_SYS_CLKR. */ 289#define R92C_SYS_CLKR_ANAD16V_EN 0x00000001 290#define R92C_SYS_CLKR_ANA8M 0x00000002 291#define R92C_SYS_CLKR_MACSLP 0x00000010 292#define R92C_SYS_CLKR_LOADER_EN 0x00000020 293#define R92C_SYS_CLKR_80M_SSC_DIS 0x00000080 294#define R92C_SYS_CLKR_80M_SSC_EN_HO 0x00000100 295#define R92C_SYS_CLKR_PHY_SSC_RSTB 0x00000200 296#define R92C_SYS_CLKR_SEC_EN 0x00000400 297#define R92C_SYS_CLKR_MAC_EN 0x00000800 298#define R92C_SYS_CLKR_SYS_EN 0x00001000 299#define R92C_SYS_CLKR_RING_EN 0x00002000 300 301/* Bits for R92C_RF_CTRL. */ 302#define R92C_RF_CTRL_EN 0x01 303#define R92C_RF_CTRL_RSTB 0x02 304#define R92C_RF_CTRL_SDMRSTB 0x04 305 306/* Bits for R92C_LDOV12D_CTRL. */ 307#define R92C_LDOV12D_CTRL_LDV12_EN 0x01 308 309/* Bits for R92C_AFE_XTAL_CTRL. */ 310#define R92C_AFE_XTAL_CTRL_ADDR_M 0x007ff800 311#define R92C_AFE_XTAL_CTRL_ADDR_S 11 312 313/* Bits for R92C_EFUSE_CTRL. */ 314#define R92C_EFUSE_CTRL_DATA_M 0x000000ff 315#define R92C_EFUSE_CTRL_DATA_S 0 316#define R92C_EFUSE_CTRL_ADDR_M 0x0003ff00 317#define R92C_EFUSE_CTRL_ADDR_S 8 318#define R92C_EFUSE_CTRL_VALID 0x80000000 319 320/* Bits for R92C_GPIO_MUXCFG. */ 321#define R92C_GPIO_MUXCFG_ENBT 0x0020 322 323/* Bits for R92C_LEDCFG0. */ 324#define R92C_LEDCFG0_DIS 0x08 325 326/* Bits for R92C_MCUFWDL. */ 327#define R92C_MCUFWDL_EN 0x00000001 328#define R92C_MCUFWDL_RDY 0x00000002 329#define R92C_MCUFWDL_CHKSUM_RPT 0x00000004 330#define R92C_MCUFWDL_MACINI_RDY 0x00000008 331#define R92C_MCUFWDL_BBINI_RDY 0x00000010 332#define R92C_MCUFWDL_RFINI_RDY 0x00000020 333#define R92C_MCUFWDL_WINTINI_RDY 0x00000040 334#define R92C_MCUFWDL_RAM_DL_SEL 0x00000080 335#define R92C_MCUFWDL_PAGE_M 0x00070000 336#define R92C_MCUFWDL_PAGE_S 16 337#define R92C_MCUFWDL_CPRST 0x00800000 338 339/* Bits for R88E_HIMR. */ 340#define R88E_HIMR_CPWM 0x00000100 341#define R88E_HIMR_CPWM2 0x00000200 342#define R88E_HIMR_TBDER 0x04000000 343#define R88E_HIMR_PSTIMEOUT 0x20000000 344 345/* Bits for R88E_HIMRE.*/ 346#define R88E_HIMRE_RXFOVW 0x00000100 347#define R88E_HIMRE_TXFOVW 0x00000200 348#define R88E_HIMRE_RXERR 0x00000400 349#define R88E_HIMRE_TXERR 0x00000800 350 351/* Bits for R92C_EFUSE_ACCESS. */ 352#define R92C_EFUSE_ACCESS_OFF 0x00 353#define R92C_EFUSE_ACCESS_ON 0x69 354 355/* Bits for R92C_HPON_FSM. */ 356#define R92C_HPON_FSM_CHIP_BONDING_ID_S 22 357#define R92C_HPON_FSM_CHIP_BONDING_ID_M 0x00c00000 358#define R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R 1 359 360/* Bits for R92C_SYS_CFG. */ 361#define R92C_SYS_CFG_XCLK_VLD 0x00000001 362#define R92C_SYS_CFG_ACLK_VLD 0x00000002 363#define R92C_SYS_CFG_UCLK_VLD 0x00000004 364#define R92C_SYS_CFG_PCLK_VLD 0x00000008 365#define R92C_SYS_CFG_PCIRSTB 0x00000010 366#define R92C_SYS_CFG_V15_VLD 0x00000020 367#define R92C_SYS_CFG_TRP_B15V_EN 0x00000080 368#define R92C_SYS_CFG_SIC_IDLE 0x00000100 369#define R92C_SYS_CFG_BD_MAC2 0x00000200 370#define R92C_SYS_CFG_BD_MAC1 0x00000400 371#define R92C_SYS_CFG_IC_MACPHY_MODE 0x00000800 372#define R92C_SYS_CFG_CHIP_VER_RTL_M 0x0000f000 373#define R92C_SYS_CFG_CHIP_VER_RTL_S 12 374#define R92C_SYS_CFG_BT_FUNC 0x00010000 375#define R92C_SYS_CFG_VENDOR_UMC 0x00080000 376#define R92C_SYS_CFG_PAD_HWPD_IDN 0x00400000 377#define R92C_SYS_CFG_TRP_VAUX_EN 0x00800000 378#define R92C_SYS_CFG_TRP_BT_EN 0x01000000 379#define R92C_SYS_CFG_BD_PKG_SEL 0x02000000 380#define R92C_SYS_CFG_BD_HCI_SEL 0x04000000 381#define R92C_SYS_CFG_TYPE_92C 0x08000000 382 383/* Bits for R92C_CR. */ 384#define R92C_CR_HCI_TXDMA_EN 0x0001 385#define R92C_CR_HCI_RXDMA_EN 0x0002 386#define R92C_CR_TXDMA_EN 0x0004 387#define R92C_CR_RXDMA_EN 0x0008 388#define R92C_CR_PROTOCOL_EN 0x0010 389#define R92C_CR_SCHEDULE_EN 0x0020 390#define R92C_CR_MACTXEN 0x0040 391#define R92C_CR_MACRXEN 0x0080 392#define R92C_CR_ENSEC 0x0200 393#define R92C_CR_CALTMR_EN 0x0400 394 395/* Bits for R92C_MSR. */ 396#define R92C_MSR_NOLINK 0x00 397#define R92C_MSR_ADHOC 0x01 398#define R92C_MSR_INFRA 0x02 399#define R92C_MSR_AP 0x03 400#define R92C_MSR_MASK (R92C_MSR_AP) 401 402/* Bits for R92C_PBP. */ 403#define R92C_PBP_PSRX_M 0x0f 404#define R92C_PBP_PSRX_S 0 405#define R92C_PBP_PSTX_M 0xf0 406#define R92C_PBP_PSTX_S 4 407#define R92C_PBP_64 0 408#define R92C_PBP_128 1 409#define R92C_PBP_256 2 410#define R92C_PBP_512 3 411#define R92C_PBP_1024 4 412 413/* Bits for R92C_TRXDMA_CTRL. */ 414#define R92C_TRXDMA_CTRL_RXDMA_AGG_EN 0x0004 415#define R92C_TRXDMA_CTRL_TXDMA_VOQ_MAP_M 0x0030 416#define R92C_TRXDMA_CTRL_TXDMA_VOQ_MAP_S 4 417#define R92C_TRXDMA_CTRL_TXDMA_VIQ_MAP_M 0x00c0 418#define R92C_TRXDMA_CTRL_TXDMA_VIQ_MAP_S 6 419#define R92C_TRXDMA_CTRL_TXDMA_BEQ_MAP_M 0x0300 420#define R92C_TRXDMA_CTRL_TXDMA_BEQ_MAP_S 8 421#define R92C_TRXDMA_CTRL_TXDMA_BKQ_MAP_M 0x0c00 422#define R92C_TRXDMA_CTRL_TXDMA_BKQ_MAP_S 10 423#define R92C_TRXDMA_CTRL_TXDMA_MGQ_MAP_M 0x3000 424#define R92C_TRXDMA_CTRL_TXDMA_MGQ_MAP_S 12 425#define R92C_TRXDMA_CTRL_TXDMA_HIQ_MAP_M 0xc000 426#define R92C_TRXDMA_CTRL_TXDMA_HIQ_MAP_S 14 427#define R92C_TRXDMA_CTRL_QUEUE_LOW 1 428#define R92C_TRXDMA_CTRL_QUEUE_NORMAL 2 429#define R92C_TRXDMA_CTRL_QUEUE_HIGH 3 430#define R92C_TRXDMA_CTRL_QMAP_M 0xfff0 431/* Shortcuts. */ 432#define R92C_TRXDMA_CTRL_QMAP_3EP 0xf5b0 433#define R92C_TRXDMA_CTRL_QMAP_HQ_LQ 0xf5f0 434#define R92C_TRXDMA_CTRL_QMAP_HQ_NQ 0xfaf0 435#define R92C_TRXDMA_CTRL_QMAP_LQ 0x5550 436#define R92C_TRXDMA_CTRL_QMAP_NQ 0xaaa0 437#define R92C_TRXDMA_CTRL_QMAP_HQ 0xfff0 438 439/* Bits for R92C_LLT_INIT. */ 440#define R92C_LLT_INIT_DATA_M 0x000000ff 441#define R92C_LLT_INIT_DATA_S 0 442#define R92C_LLT_INIT_ADDR_M 0x0000ff00 443#define R92C_LLT_INIT_ADDR_S 8 444#define R92C_LLT_INIT_OP_M 0xc0000000 445#define R92C_LLT_INIT_OP_S 30 446#define R92C_LLT_INIT_OP_NO_ACTIVE 0 447#define R92C_LLT_INIT_OP_WRITE 1 448 449/* Bits for R92C_RQPN. */ 450#define R92C_RQPN_HPQ_M 0x000000ff 451#define R92C_RQPN_HPQ_S 0 452#define R92C_RQPN_LPQ_M 0x0000ff00 453#define R92C_RQPN_LPQ_S 8 454#define R92C_RQPN_PUBQ_M 0x00ff0000 455#define R92C_RQPN_PUBQ_S 16 456#define R92C_RQPN_LD 0x80000000 457 458/* Bits for R92C_TDECTRL. */ 459#define R92C_TDECTRL_BLK_DESC_NUM_M 0x000000f0 460#define R92C_TDECTRL_BLK_DESC_NUM_S 4 461#define R92C_TDECTRL_BCN_VALID 0x00010000 462 463/* Bits for R92C_FWHW_TXQ_CTRL. */ 464#define R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW 0x80 465 466/* Bits for R92C_SPEC_SIFS. */ 467#define R92C_SPEC_SIFS_CCK_M 0x00ff 468#define R92C_SPEC_SIFS_CCK_S 0 469#define R92C_SPEC_SIFS_OFDM_M 0xff00 470#define R92C_SPEC_SIFS_OFDM_S 8 471 472/* Bits for R92C_RL. */ 473#define R92C_RL_LRL_M 0x003f 474#define R92C_RL_LRL_S 0 475#define R92C_RL_SRL_M 0x3f00 476#define R92C_RL_SRL_S 8 477 478/* Bits for R92C_RRSR. */ 479#define R92C_RRSR_RATE_BITMAP_M 0x000fffff 480#define R92C_RRSR_RATE_BITMAP_S 0 481#define R92C_RRSR_RATE_CCK_ONLY_1M 0xffff1 482#define R92C_RRSR_RSC_LOWSUBCHNL 0x00200000 483#define R92C_RRSR_RSC_UPSUBCHNL 0x00400000 484#define R92C_RRSR_SHORT 0x00800000 485 486/* Bits for R88E_TX_RPT_CTRL. */ 487#define R88E_TX_RPT1_ENA 0x01 488#define R88E_TX_RPT2_ENA 0x02 489 490/* Bits for R92C_EDCA_XX_PARAM. */ 491#define R92C_EDCA_PARAM_AIFS_M 0x000000ff 492#define R92C_EDCA_PARAM_AIFS_S 0 493#define R92C_EDCA_PARAM_ECWMIN_M 0x00000f00 494#define R92C_EDCA_PARAM_ECWMIN_S 8 495#define R92C_EDCA_PARAM_ECWMAX_M 0x0000f000 496#define R92C_EDCA_PARAM_ECWMAX_S 12 497#define R92C_EDCA_PARAM_TXOP_M 0xffff0000 498#define R92C_EDCA_PARAM_TXOP_S 16 499 500/* Bits for R92C_HWSEQ_CTRL / R92C_TXPAUSE. */ 501#define R92C_TX_QUEUE_VO 0x01 502#define R92C_TX_QUEUE_VI 0x02 503#define R92C_TX_QUEUE_BE 0x04 504#define R92C_TX_QUEUE_BK 0x08 505#define R92C_TX_QUEUE_MGT 0x10 506#define R92C_TX_QUEUE_HIGH 0x20 507#define R92C_TX_QUEUE_BCN 0x40 508 509/* Shortcuts. */ 510#define R92C_TX_QUEUE_AC \ 511 (R92C_TX_QUEUE_VO | R92C_TX_QUEUE_VI | \ 512 R92C_TX_QUEUE_BE | R92C_TX_QUEUE_BK) 513 514#define R92C_TX_QUEUE_ALL \ 515 (R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | \ 516 R92C_TX_QUEUE_HIGH | R92C_TX_QUEUE_BCN | 0x80) /* XXX */ 517 518/* Bits for R92C_BCN_CTRL. */ 519#define R92C_BCN_CTRL_EN_MBSSID 0x02 520#define R92C_BCN_CTRL_TXBCN_RPT 0x04 521#define R92C_BCN_CTRL_EN_BCN 0x08 522#define R92C_BCN_CTRL_DIS_TSF_UDT0 0x10 523 524/* Bits for R92C_MBID_NUM. */ 525#define R92C_MBID_TXBCN_RPT0 0x08 526#define R92C_MBID_TXBCN_RPT1 0x10 527 528/* Bits for R92C_DUAL_TSF_RST. */ 529#define R92C_DUAL_TSF_RST0 0x01 530#define R92C_DUAL_TSF_RST1 0x02 531 532/* Bits for R92C_ACMHWCTRL. */ 533#define R92C_ACMHWCTRL_EN 0x01 534#define R92C_ACMHWCTRL_BE 0x02 535#define R92C_ACMHWCTRL_VI 0x04 536#define R92C_ACMHWCTRL_VO 0x08 537#define R92C_ACMHWCTRL_ACM_MASK 0x0f 538 539/* Bits for R92C_APSD_CTRL. */ 540#define R92C_APSD_CTRL_OFF 0x40 541#define R92C_APSD_CTRL_OFF_STATUS 0x80 542 543/* Bits for R92C_BWOPMODE. */ 544#define R92C_BWOPMODE_11J 0x01 545#define R92C_BWOPMODE_5G 0x02 546#define R92C_BWOPMODE_20MHZ 0x04 547 548/* Bits for R92C_RCR. */ 549#define R92C_RCR_AAP 0x00000001 550#define R92C_RCR_APM 0x00000002 551#define R92C_RCR_AM 0x00000004 552#define R92C_RCR_AB 0x00000008 553#define R92C_RCR_ADD3 0x00000010 554#define R92C_RCR_APWRMGT 0x00000020 555#define R92C_RCR_CBSSID_DATA 0x00000040 556#define R92C_RCR_CBSSID_BCN 0x00000080 557#define R92C_RCR_ACRC32 0x00000100 558#define R92C_RCR_AICV 0x00000200 559#define R92C_RCR_ADF 0x00000800 560#define R92C_RCR_ACF 0x00001000 561#define R92C_RCR_AMF 0x00002000 562#define R92C_RCR_HTC_LOC_CTRL 0x00004000 563#define R92C_RCR_MFBEN 0x00400000 564#define R92C_RCR_LSIGEN 0x00800000 565#define R92C_RCR_ENMBID 0x01000000 566#define R92C_RCR_APP_BA_SSN 0x08000000 567#define R92C_RCR_APP_PHYSTS 0x10000000 568#define R92C_RCR_APP_ICV 0x20000000 569#define R92C_RCR_APP_MIC 0x40000000 570#define R92C_RCR_APPFCS 0x80000000 571 572/* Bits for R92C_CAMCMD. */ 573#define R92C_CAMCMD_ADDR_M 0x0000ffff 574#define R92C_CAMCMD_ADDR_S 0 575#define R92C_CAMCMD_WRITE 0x00010000 576#define R92C_CAMCMD_CLR 0x40000000 577#define R92C_CAMCMD_POLLING 0x80000000 578 579/* Bits for R92C_SECCFG. */ 580#define R92C_SECCFG_TXUCKEY_DEF 0x0001 581#define R92C_SECCFG_RXUCKEY_DEF 0x0002 582#define R92C_SECCFG_TXENC_ENA 0x0004 583#define R92C_SECCFG_RXDEC_ENA 0x0008 584#define R92C_SECCFG_CMP_A2 0x0010 585#define R92C_SECCFG_TXBCKEY_DEF 0x0040 586#define R92C_SECCFG_RXBCKEY_DEF 0x0080 587#define R88E_SECCFG_CHK_KEYID 0x0100 588 589/* Bits for R92C_RXFLTMAP*. */ 590#define R92C_RXFLTMAP_SUBTYPE(subtype) \ 591 (1 << ((subtype) >> IEEE80211_FC0_SUBTYPE_SHIFT)) 592 593 594/* 595 * Baseband registers. 596 */ 597#define R92C_FPGA0_RFMOD 0x800 598#define R92C_FPGA0_TXINFO 0x804 599#define R92C_HSSI_PARAM1(chain) (0x820 + (chain) * 8) 600#define R92C_HSSI_PARAM2(chain) (0x824 + (chain) * 8) 601#define R92C_TXAGC_RATE18_06(i) (((i) == 0) ? 0xe00 : 0x830) 602#define R92C_TXAGC_RATE54_24(i) (((i) == 0) ? 0xe04 : 0x834) 603#define R92C_TXAGC_A_CCK1_MCS32 0xe08 604#define R92C_TXAGC_B_CCK1_55_MCS32 0x838 605#define R92C_TXAGC_B_CCK11_A_CCK2_11 0x86c 606#define R92C_TXAGC_MCS03_MCS00(i) (((i) == 0) ? 0xe10 : 0x83c) 607#define R92C_TXAGC_MCS07_MCS04(i) (((i) == 0) ? 0xe14 : 0x848) 608#define R92C_TXAGC_MCS11_MCS08(i) (((i) == 0) ? 0xe18 : 0x84c) 609#define R92C_TXAGC_MCS15_MCS12(i) (((i) == 0) ? 0xe1c : 0x868) 610#define R92C_LSSI_PARAM(chain) (0x840 + (chain) * 4) 611#define R92C_FPGA0_RFIFACEOE(chain) (0x860 + (chain) * 4) 612#define R92C_FPGA0_RFIFACESW(idx) (0x870 + (idx) * 4) 613#define R92C_FPGA0_RFPARAM(idx) (0x878 + (idx) * 4) 614#define R92C_FPGA0_ANAPARAM2 0x884 615#define R92C_LSSI_READBACK(chain) (0x8a0 + (chain) * 4) 616#define R92C_HSPI_READBACK(chain) (0x8b8 + (chain) * 4) 617#define R92C_FPGA1_RFMOD 0x900 618#define R92C_FPGA1_TXINFO 0x90c 619#define R92C_CCK0_SYSTEM 0xa00 620#define R92C_CCK0_AFESETTING 0xa04 621#define R92C_OFDM0_TRXPATHENA 0xc04 622#define R92C_OFDM0_TRMUXPAR 0xc08 623#define R92C_OFDM0_AGCCORE1(chain) (0xc50 + (chain) * 8) 624#define R92C_OFDM0_AGCPARAM1 0xc70 625#define R92C_OFDM0_AGCRSSITABLE 0xc78 626#define R92C_OFDM1_LSTF 0xd00 627 628/* Bits for R92C_FPGA[01]_RFMOD. */ 629#define R92C_RFMOD_40MHZ 0x00000001 630#define R92C_RFMOD_JAPAN 0x00000002 631#define R92C_RFMOD_CCK_TXSC 0x00000030 632#define R92C_RFMOD_CCK_EN 0x01000000 633#define R92C_RFMOD_OFDM_EN 0x02000000 634 635/* Bits for R92C_HSSI_PARAM1(i). */ 636#define R92C_HSSI_PARAM1_PI 0x00000100 637 638/* Bits for R92C_HSSI_PARAM2(i). */ 639#define R92C_HSSI_PARAM2_CCK_HIPWR 0x00000200 640#define R92C_HSSI_PARAM2_ADDR_LENGTH 0x00000400 641#define R92C_HSSI_PARAM2_DATA_LENGTH 0x00000800 642#define R92C_HSSI_PARAM2_READ_ADDR_M 0x7f800000 643#define R92C_HSSI_PARAM2_READ_ADDR_S 23 644#define R92C_HSSI_PARAM2_READ_EDGE 0x80000000 645 646/* Bits for R92C_TXAGC_A_CCK1_MCS32. */ 647#define R92C_TXAGC_A_CCK1_M 0x0000ff00 648#define R92C_TXAGC_A_CCK1_S 8 649 650/* Bits for R92C_TXAGC_B_CCK11_A_CCK2_11. */ 651#define R92C_TXAGC_B_CCK11_M 0x000000ff 652#define R92C_TXAGC_B_CCK11_S 0 653#define R92C_TXAGC_A_CCK2_M 0x0000ff00 654#define R92C_TXAGC_A_CCK2_S 8 655#define R92C_TXAGC_A_CCK55_M 0x00ff0000 656#define R92C_TXAGC_A_CCK55_S 16 657#define R92C_TXAGC_A_CCK11_M 0xff000000 658#define R92C_TXAGC_A_CCK11_S 24 659 660/* Bits for R92C_TXAGC_B_CCK1_55_MCS32. */ 661#define R92C_TXAGC_B_CCK1_M 0x0000ff00 662#define R92C_TXAGC_B_CCK1_S 8 663#define R92C_TXAGC_B_CCK2_M 0x00ff0000 664#define R92C_TXAGC_B_CCK2_S 16 665#define R92C_TXAGC_B_CCK55_M 0xff000000 666#define R92C_TXAGC_B_CCK55_S 24 667 668/* Bits for R92C_TXAGC_RATE18_06(x). */ 669#define R92C_TXAGC_RATE06_M 0x000000ff 670#define R92C_TXAGC_RATE06_S 0 671#define R92C_TXAGC_RATE09_M 0x0000ff00 672#define R92C_TXAGC_RATE09_S 8 673#define R92C_TXAGC_RATE12_M 0x00ff0000 674#define R92C_TXAGC_RATE12_S 16 675#define R92C_TXAGC_RATE18_M 0xff000000 676#define R92C_TXAGC_RATE18_S 24 677 678/* Bits for R92C_TXAGC_RATE54_24(x). */ 679#define R92C_TXAGC_RATE24_M 0x000000ff 680#define R92C_TXAGC_RATE24_S 0 681#define R92C_TXAGC_RATE36_M 0x0000ff00 682#define R92C_TXAGC_RATE36_S 8 683#define R92C_TXAGC_RATE48_M 0x00ff0000 684#define R92C_TXAGC_RATE48_S 16 685#define R92C_TXAGC_RATE54_M 0xff000000 686#define R92C_TXAGC_RATE54_S 24 687 688/* Bits for R92C_TXAGC_MCS03_MCS00(x). */ 689#define R92C_TXAGC_MCS00_M 0x000000ff 690#define R92C_TXAGC_MCS00_S 0 691#define R92C_TXAGC_MCS01_M 0x0000ff00 692#define R92C_TXAGC_MCS01_S 8 693#define R92C_TXAGC_MCS02_M 0x00ff0000 694#define R92C_TXAGC_MCS02_S 16 695#define R92C_TXAGC_MCS03_M 0xff000000 696#define R92C_TXAGC_MCS03_S 24 697 698/* Bits for R92C_TXAGC_MCS07_MCS04(x). */ 699#define R92C_TXAGC_MCS04_M 0x000000ff 700#define R92C_TXAGC_MCS04_S 0 701#define R92C_TXAGC_MCS05_M 0x0000ff00 702#define R92C_TXAGC_MCS05_S 8 703#define R92C_TXAGC_MCS06_M 0x00ff0000 704#define R92C_TXAGC_MCS06_S 16 705#define R92C_TXAGC_MCS07_M 0xff000000 706#define R92C_TXAGC_MCS07_S 24 707 708/* Bits for R92C_TXAGC_MCS11_MCS08(x). */ 709#define R92C_TXAGC_MCS08_M 0x000000ff 710#define R92C_TXAGC_MCS08_S 0 711#define R92C_TXAGC_MCS09_M 0x0000ff00 712#define R92C_TXAGC_MCS09_S 8 713#define R92C_TXAGC_MCS10_M 0x00ff0000 714#define R92C_TXAGC_MCS10_S 16 715#define R92C_TXAGC_MCS11_M 0xff000000 716#define R92C_TXAGC_MCS11_S 24 717 718/* Bits for R92C_TXAGC_MCS15_MCS12(x). */ 719#define R92C_TXAGC_MCS12_M 0x000000ff 720#define R92C_TXAGC_MCS12_S 0 721#define R92C_TXAGC_MCS13_M 0x0000ff00 722#define R92C_TXAGC_MCS13_S 8 723#define R92C_TXAGC_MCS14_M 0x00ff0000 724#define R92C_TXAGC_MCS14_S 16 725#define R92C_TXAGC_MCS15_M 0xff000000 726#define R92C_TXAGC_MCS15_S 24 727 728/* Bits for R92C_LSSI_PARAM(i). */ 729#define R92C_LSSI_PARAM_DATA_M 0x000fffff 730#define R92C_LSSI_PARAM_DATA_S 0 731#define R92C_LSSI_PARAM_ADDR_M 0x03f00000 732#define R92C_LSSI_PARAM_ADDR_S 20 733#define R88E_LSSI_PARAM_ADDR_M 0x0ff00000 734#define R88E_LSSI_PARAM_ADDR_S 20 735 736/* Bits for R92C_FPGA0_ANAPARAM2. */ 737#define R92C_FPGA0_ANAPARAM2_CBW20 0x00000400 738 739/* Bits for R92C_LSSI_READBACK(i). */ 740#define R92C_LSSI_READBACK_DATA_M 0x000fffff 741#define R92C_LSSI_READBACK_DATA_S 0 742 743/* Bits for R92C_OFDM0_AGCCORE1(i). */ 744#define R92C_OFDM0_AGCCORE1_GAIN_M 0x0000007f 745#define R92C_OFDM0_AGCCORE1_GAIN_S 0 746 747 748/* 749 * USB registers. 750 */ 751#define R92C_USB_INFO 0xfe17 752#define R92C_USB_SPECIAL_OPTION 0xfe55 753#define R92C_USB_HCPWM 0xfe57 754#define R92C_USB_HRPWM 0xfe58 755#define R92C_USB_DMA_AGG_TO 0xfe5b 756#define R92C_USB_AGG_TO 0xfe5c 757#define R92C_USB_AGG_TH 0xfe5d 758#define R92C_USB_VID 0xfe60 759#define R92C_USB_PID 0xfe62 760#define R92C_USB_OPTIONAL 0xfe64 761#define R92C_USB_EP 0xfe65 762#define R92C_USB_PHY 0xfe68 763#define R92C_USB_MAC_ADDR 0xfe70 764#define R92C_USB_STRING 0xfe80 765 766/* Bits for R92C_USB_SPECIAL_OPTION. */ 767#define R92C_USB_SPECIAL_OPTION_AGG_EN 0x08 768#define R92C_USB_SPECIAL_OPTION_INT_BULK_SEL 0x10 769 770/* Bits for R92C_USB_EP. */ 771#define R92C_USB_EP_HQ_M 0x000f 772#define R92C_USB_EP_HQ_S 0 773#define R92C_USB_EP_NQ_M 0x00f0 774#define R92C_USB_EP_NQ_S 4 775#define R92C_USB_EP_LQ_M 0x0f00 776#define R92C_USB_EP_LQ_S 8 777 778 779/* 780 * Firmware base address. 781 */ 782#define R92C_FW_START_ADDR 0x1000 783#define R92C_FW_PAGE_SIZE 4096 784 785 786/* 787 * RF (6052) registers. 788 */ 789#define R92C_RF_AC 0x00 790#define R92C_RF_IQADJ_G(i) (0x01 + (i)) 791#define R92C_RF_POW_TRSW 0x05 792#define R92C_RF_GAIN_RX 0x06 793#define R92C_RF_GAIN_TX 0x07 794#define R92C_RF_TXM_IDAC 0x08 795#define R92C_RF_BS_IQGEN 0x0f 796#define R92C_RF_MODE1 0x10 797#define R92C_RF_MODE2 0x11 798#define R92C_RF_RX_AGC_HP 0x12 799#define R92C_RF_TX_AGC 0x13 800#define R92C_RF_BIAS 0x14 801#define R92C_RF_IPA 0x15 802#define R92C_RF_POW_ABILITY 0x17 803#define R92C_RF_CHNLBW 0x18 804#define R92C_RF_RX_G1 0x1a 805#define R92C_RF_RX_G2 0x1b 806#define R92C_RF_RX_BB2 0x1c 807#define R92C_RF_RX_BB1 0x1d 808#define R92C_RF_RCK1 0x1e 809#define R92C_RF_RCK2 0x1f 810#define R92C_RF_TX_G(i) (0x20 + (i)) 811#define R92C_RF_TX_BB1 0x23 812#define R92C_RF_T_METER 0x24 813#define R92C_RF_SYN_G(i) (0x25 + (i)) 814#define R92C_RF_RCK_OS 0x30 815#define R92C_RF_TXPA_G(i) (0x31 + (i)) 816 817/* Bits for R92C_RF_AC. */ 818#define R92C_RF_AC_MODE_M 0x70000 819#define R92C_RF_AC_MODE_S 16 820#define R92C_RF_AC_MODE_STANDBY 1 821 822/* Bits for R92C_RF_CHNLBW. */ 823#define R92C_RF_CHNLBW_CHNL_M 0x003ff 824#define R92C_RF_CHNLBW_CHNL_S 0 825#define R92C_RF_CHNLBW_BW20 0x00400 826#define R88E_RF_CHNLBW_BW20 0x00c00 827#define R92C_RF_CHNLBW_LCSTART 0x08000 828 829 830/* 831 * CAM entries. 832 */ 833#define R92C_CAM_ENTRY_COUNT 32 834 835#define R92C_CAM_CTL0(entry) ((entry) * 8 + 0) 836#define R92C_CAM_CTL1(entry) ((entry) * 8 + 1) 837#define R92C_CAM_KEY(entry, i) ((entry) * 8 + 2 + (i)) 838 839/* Bits for R92C_CAM_CTL0(i). */ 840#define R92C_CAM_KEYID_M 0x00000003 841#define R92C_CAM_KEYID_S 0 842#define R92C_CAM_ALGO_M 0x0000001c 843#define R92C_CAM_ALGO_S 2 844#define R92C_CAM_ALGO_NONE 0 845#define R92C_CAM_ALGO_WEP40 1 846#define R92C_CAM_ALGO_TKIP 2 847#define R92C_CAM_ALGO_AES 4 848#define R92C_CAM_ALGO_WEP104 5 849#define R92C_CAM_VALID 0x00008000 850#define R92C_CAM_MACLO_M 0xffff0000 851#define R92C_CAM_MACLO_S 16 852 853/* Rate adaptation modes. */ 854#define R92C_RAID_11GN 1 855#define R92C_RAID_11N 3 856#define R92C_RAID_11BG 4 857#define R92C_RAID_11G 5 /* "pure" 11g */ 858#define R92C_RAID_11B 6 859 860 861/* 862 * Macros to access subfields in registers. 863 */ 864/* Mask and Shift (getter). */ 865#define MS(val, field) \ 866 (((val) & field##_M) >> field##_S) 867 868/* Shift and Mask (setter). */ 869#define SM(field, val) \ 870 (((val) << field##_S) & field##_M) 871 872/* Rewrite. */ 873#define RW(var, field, val) \ 874 (((var) & ~field##_M) | SM(field, val)) 875 876/* 877 * Firmware image header. 878 */ 879struct r92c_fw_hdr { 880 /* QWORD0 */ 881 uint16_t signature; 882 uint8_t category; 883 uint8_t function; 884 uint16_t version; 885 uint16_t subversion; 886 /* QWORD1 */ 887 uint8_t month; 888 uint8_t date; 889 uint8_t hour; 890 uint8_t minute; 891 uint16_t ramcodesize; 892 uint16_t reserved2; 893 /* QWORD2 */ 894 uint32_t svnidx; 895 uint32_t reserved3; 896 /* QWORD3 */ 897 uint32_t reserved4; 898 uint32_t reserved5; 899} __packed; 900 901/* 902 * Host to firmware commands. 903 */ 904struct r92c_fw_cmd { 905 uint8_t id; 906#define R92C_CMD_AP_OFFLOAD 0 907#define R92C_CMD_SET_PWRMODE 1 908#define R92C_CMD_JOINBSS_RPT 2 909#define R92C_CMD_RSVD_PAGE 3 910#define R92C_CMD_RSSI 4 911#define R92C_CMD_RSSI_SETTING 5 912#define R92C_CMD_MACID_CONFIG 6 913#define R92C_CMD_MACID_PS_MODE 7 914#define R92C_CMD_P2P_PS_OFFLOAD 8 915#define R92C_CMD_SELECTIVE_SUSPEND 9 916#define R92C_CMD_FLAG_EXT 0x80 917 918 uint8_t msg[5]; 919} __packed; 920 921/* Structure for R92C_CMD_RSSI_SETTING. */ 922struct r92c_fw_cmd_rssi { 923 uint8_t macid; 924 uint8_t reserved; 925 uint8_t pwdb; 926} __packed; 927 928/* Structure for R92C_CMD_MACID_CONFIG. */ 929struct r92c_fw_cmd_macid_cfg { 930 uint32_t mask; 931 uint8_t macid; 932#define URTWN_MACID_BSS 0 933#define URTWN_MACID_BC 4 /* Broadcast. */ 934#define R92C_MACID_MAX 31 935#define R88E_MACID_MAX 63 936#define URTWN_MACID_MAX(sc) (((sc)->chip & URTWN_CHIP_88E) ? \ 937 R88E_MACID_MAX : R92C_MACID_MAX) 938#define URTWN_MACID_UNDEFINED (uint8_t)-1 939#define URTWN_MACID_VALID 0x80 940} __packed; 941 942/* 943 * RTL8192CU ROM image. 944 */ 945struct r92c_rom { 946 uint16_t id; /* 0x8192 */ 947 uint8_t reserved1[5]; 948 uint8_t dbg_sel; 949 uint16_t reserved2; 950 uint16_t vid; 951 uint16_t pid; 952 uint8_t usb_opt; 953 uint8_t ep_setting; 954 uint16_t reserved3; 955 uint8_t usb_phy; 956 uint8_t reserved4[3]; 957 uint8_t macaddr[IEEE80211_ADDR_LEN]; 958 uint8_t string[61]; /* "Realtek" */ 959 uint8_t subcustomer_id; 960 uint8_t cck_tx_pwr[R92C_MAX_CHAINS][3]; 961 uint8_t ht40_1s_tx_pwr[R92C_MAX_CHAINS][3]; 962 uint8_t ht40_2s_tx_pwr_diff[3]; 963 uint8_t ht20_tx_pwr_diff[3]; 964 uint8_t ofdm_tx_pwr_diff[3]; 965 uint8_t ht40_max_pwr[3]; 966 uint8_t ht20_max_pwr[3]; 967 uint8_t xtal_calib; 968 uint8_t tssi[R92C_MAX_CHAINS]; 969 uint8_t thermal_meter; 970 uint8_t rf_opt1; 971#define R92C_ROM_RF1_REGULATORY_M 0x07 972#define R92C_ROM_RF1_REGULATORY_S 0 973#define R92C_ROM_RF1_BOARD_TYPE_M 0xe0 974#define R92C_ROM_RF1_BOARD_TYPE_S 5 975#define R92C_BOARD_TYPE_DONGLE 0 976#define R92C_BOARD_TYPE_HIGHPA 1 977#define R92C_BOARD_TYPE_MINICARD 2 978#define R92C_BOARD_TYPE_SOLO 3 979#define R92C_BOARD_TYPE_COMBO 4 980 981 uint8_t rf_opt2; 982 uint8_t rf_opt3; 983 uint8_t rf_opt4; 984 uint8_t channel_plan; 985 uint8_t version; 986 uint8_t customer_id; 987} __packed; 988 989/* 990 * RTL8188EU ROM image. 991 */ 992struct r88e_rom { 993 uint8_t reserved1[16]; 994 uint8_t cck_tx_pwr[6]; 995 uint8_t ht40_tx_pwr[5]; 996 uint8_t tx_pwr_diff; 997 uint8_t reserved2[156]; 998 uint8_t channel_plan; 999 uint8_t crystalcap; 1000 uint8_t reserved3[7]; 1001 uint8_t rf_board_opt; 1002 uint8_t rf_feature_opt; 1003 uint8_t rf_bt_opt; 1004 uint8_t version; 1005 uint8_t customer_id; 1006 uint8_t reserved4[3]; 1007 uint8_t rf_ant_opt; 1008 uint8_t reserved5[6]; 1009 uint16_t vid; 1010 uint16_t pid; 1011 uint8_t usb_opt; 1012 uint8_t reserved6[2]; 1013 uint8_t macaddr[IEEE80211_ADDR_LEN]; 1014 uint8_t reserved7[2]; 1015 uint8_t string[33]; /* "realtek 802.11n NIC" */ 1016 uint8_t reserved8[256]; 1017} __packed; 1018 1019#define URTWN_EFUSE_MAX_LEN 512 1020 1021/* Rx MAC descriptor. */ 1022struct r92c_rx_stat { 1023 uint32_t rxdw0; 1024#define R92C_RXDW0_PKTLEN_M 0x00003fff 1025#define R92C_RXDW0_PKTLEN_S 0 1026#define R92C_RXDW0_CRCERR 0x00004000 1027#define R92C_RXDW0_ICVERR 0x00008000 1028#define R92C_RXDW0_INFOSZ_M 0x000f0000 1029#define R92C_RXDW0_INFOSZ_S 16 1030#define R92C_RXDW0_CIPHER_M 0x00700000 1031#define R92C_RXDW0_CIPHER_S 20 1032#define R92C_RXDW0_QOS 0x00800000 1033#define R92C_RXDW0_SHIFT_M 0x03000000 1034#define R92C_RXDW0_SHIFT_S 24 1035#define R92C_RXDW0_PHYST 0x04000000 1036#define R92C_RXDW0_DECRYPTED 0x08000000 1037 1038 uint32_t rxdw1; 1039 uint32_t rxdw2; 1040#define R92C_RXDW2_PKTCNT_M 0x00ff0000 1041#define R92C_RXDW2_PKTCNT_S 16 1042 1043 uint32_t rxdw3; 1044#define R92C_RXDW3_RATE_M 0x0000003f 1045#define R92C_RXDW3_RATE_S 0 1046#define R92C_RXDW3_HT 0x00000040 1047#define R92C_RXDW3_HTC 0x00000400 1048#define R88E_RXDW3_RPT_M 0x0000c000 1049#define R88E_RXDW3_RPT_S 14 1050#define R88E_RXDW3_RPT_RX 0 1051#define R88E_RXDW3_RPT_TX1 1 1052#define R88E_RXDW3_RPT_TX2 2 1053 1054 uint32_t rxdw4; 1055 uint32_t rxdw5; 1056} __packed __attribute__((aligned(4))); 1057 1058/* Rx PHY descriptor. */ 1059struct r92c_rx_phystat { 1060 uint32_t phydw0; 1061 uint32_t phydw1; 1062 uint32_t phydw2; 1063 uint32_t phydw3; 1064 uint32_t phydw4; 1065 uint32_t phydw5; 1066 uint32_t phydw6; 1067 uint32_t phydw7; 1068} __packed __attribute__((aligned(4))); 1069 1070/* Rx PHY CCK descriptor. */ 1071struct r92c_rx_cck { 1072 uint8_t adc_pwdb[4]; 1073 uint8_t sq_rpt; 1074 uint8_t agc_rpt; 1075} __packed; 1076 1077struct r88e_rx_cck { 1078 uint8_t path_agc[2]; 1079 uint8_t chan; 1080 uint8_t reserved1; 1081 uint8_t sig_qual; 1082 uint8_t agc_rpt; 1083 uint8_t rpt_b; 1084 uint8_t reserved2; 1085 uint8_t noise_power; 1086 uint8_t path_cfotail[2]; 1087 uint8_t pcts_mask[2]; 1088 uint8_t stream_rxevm[2]; 1089 uint8_t path_rxsnr[2]; 1090 uint8_t noise_power_db_lsb; 1091 uint8_t reserved3[3]; 1092 uint8_t stream_csi[2]; 1093 uint8_t stream_target_csi[2]; 1094 uint8_t sig_evm; 1095} __packed; 1096 1097/* Tx MAC descriptor. */ 1098struct r92c_tx_desc { 1099 uint32_t txdw0; 1100#define R92C_TXDW0_PKTLEN_M 0x0000ffff 1101#define R92C_TXDW0_PKTLEN_S 0 1102#define R92C_TXDW0_OFFSET_M 0x00ff0000 1103#define R92C_TXDW0_OFFSET_S 16 1104#define R92C_TXDW0_BMCAST 0x01000000 1105#define R92C_TXDW0_LSG 0x04000000 1106#define R92C_TXDW0_FSG 0x08000000 1107#define R92C_TXDW0_OWN 0x80000000 1108 1109 uint32_t txdw1; 1110#define R92C_TXDW1_MACID_M 0x0000001f 1111#define R92C_TXDW1_MACID_S 0 1112#define R88E_TXDW1_MACID_M 0x0000003f 1113#define R88E_TXDW1_MACID_S 0 1114#define R92C_TXDW1_AGGEN 0x00000020 1115#define R92C_TXDW1_AGGBK 0x00000040 1116#define R92C_TXDW1_QSEL_M 0x00001f00 1117#define R92C_TXDW1_QSEL_S 8 1118 1119#define R92C_TXDW1_QSEL_BE 0x00 /* or 0x03 */ 1120#define R92C_TXDW1_QSEL_BK 0x01 /* or 0x02 */ 1121#define R92C_TXDW1_QSEL_VI 0x04 /* or 0x05 */ 1122#define R92C_TXDW1_QSEL_VO 0x06 /* or 0x07 */ 1123#define URTWN_MAX_TID 8 1124 1125#define R92C_TXDW1_QSEL_BEACON 0x10 1126#define R92C_TXDW1_QSEL_MGNT 0x12 1127 1128#define R92C_TXDW1_RAID_M 0x000f0000 1129#define R92C_TXDW1_RAID_S 16 1130#define R92C_TXDW1_CIPHER_M 0x00c00000 1131#define R92C_TXDW1_CIPHER_S 22 1132#define R92C_TXDW1_CIPHER_NONE 0 1133#define R92C_TXDW1_CIPHER_RC4 1 1134#define R92C_TXDW1_CIPHER_AES 3 1135#define R92C_TXDW1_PKTOFF_M 0x7c000000 1136#define R92C_TXDW1_PKTOFF_S 26 1137 1138 uint32_t txdw2; 1139#define R88E_TXDW2_AGGBK 0x00010000 1140#define R88E_TXDW2_CCX_RPT 0x00080000 1141 1142 uint16_t txdw3; 1143 uint16_t txdseq; 1144#define R88E_TXDSEQ_HWSEQ_EN 0x8000 1145 1146 uint32_t txdw4; 1147#define R92C_TXDW4_RTSRATE_M 0x0000003f 1148#define R92C_TXDW4_RTSRATE_S 0 1149#define R92C_TXDW4_HWSEQ_QOS 0x00000040 1150#define R92C_TXDW4_HWSEQ_EN 0x00000080 1151#define R92C_TXDW4_DRVRATE 0x00000100 1152#define R92C_TXDW4_CTS2SELF 0x00000800 1153#define R92C_TXDW4_RTSEN 0x00001000 1154#define R92C_TXDW4_HWRTSEN 0x00002000 1155#define R92C_TXDW4_SCO_M 0x003f0000 1156#define R92C_TXDW4_SCO_S 20 1157#define R92C_TXDW4_SCO_SCA 1 1158#define R92C_TXDW4_SCO_SCB 2 1159#define R92C_TXDW4_40MHZ 0x02000000 1160 1161 uint32_t txdw5; 1162#define R92C_TXDW5_DATARATE_M 0x0000003f 1163#define R92C_TXDW5_DATARATE_S 0 1164#define R92C_TXDW5_SGI 0x00000040 1165#define R92C_TXDW5_AGGNUM_M 0xff000000 1166#define R92C_TXDW5_AGGNUM_S 24 1167 1168 uint32_t txdw6; 1169 uint16_t txdsum; 1170 uint16_t pad; 1171} __packed __attribute__((aligned(4))); 1172 1173struct r88e_tx_rpt_ccx { 1174 uint8_t rptb0; 1175 uint8_t rptb1; 1176#define R88E_RPTB1_MACID_M 0x3f 1177#define R88E_RPTB1_MACID_S 0 1178#define R88E_RPTB1_PKT_OK 0x40 1179#define R88E_RPTB1_BMC 0x80 1180 1181 uint8_t rptb2; 1182#define R88E_RPTB2_RETRY_CNT_M 0x3f 1183#define R88E_RPTB2_RETRY_CNT_S 0 1184#define R88E_RPTB2_LIFE_EXPIRE 0x40 1185#define R88E_RPTB2_RETRY_OVER 0x80 1186 1187 uint8_t rptb3; 1188 uint8_t rptb4; 1189 uint8_t rptb5; 1190 uint8_t rptb6; 1191#define R88E_RPTB6_QSEL_M 0xf0 1192#define R88E_RPTB6_QSEL_S 4 1193 1194 uint8_t rptb7; 1195} __packed; 1196 1197 1198static const uint8_t ridx2rate[] = 1199 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 }; 1200 1201/* HW rate indices. */ 1202#define URTWN_RIDX_CCK1 0 1203#define URTWN_RIDX_CCK11 3 1204#define URTWN_RIDX_OFDM6 4 1205#define URTWN_RIDX_OFDM24 8 1206#define URTWN_RIDX_OFDM54 11 1207 1208#define URTWN_RIDX_COUNT 28 1209 1210 1211/* 1212 * MAC initialization values. 1213 */ 1214static const struct { 1215 uint16_t reg; 1216 uint8_t val; 1217} rtl8188eu_mac[] = { 1218 { 0x026, 0x41 }, { 0x027, 0x35 }, { 0x040, 0x00 }, { 0x428, 0x0a }, 1219 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x01 }, { 0x432, 0x02 }, 1220 { 0x433, 0x04 }, { 0x434, 0x05 }, { 0x435, 0x06 }, { 0x436, 0x07 }, 1221 { 0x437, 0x08 }, { 0x438, 0x00 }, { 0x439, 0x00 }, { 0x43a, 0x01 }, 1222 { 0x43b, 0x02 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x06 }, 1223 { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, 1224 { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, { 0x447, 0x00 }, 1225 { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, { 0x45b, 0xb9 }, 1226 { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x480, 0x08 }, { 0x4c8, 0xff }, 1227 { 0x4c9, 0x08 }, { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 }, 1228 { 0x4d3, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 }, { 0x502, 0x2f }, 1229 { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 }, { 0x506, 0x5e }, 1230 { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 }, { 0x50a, 0x5e }, 1231 { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 }, { 0x50e, 0x00 }, 1232 { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a }, { 0x516, 0x0a }, 1233 { 0x525, 0x4f }, { 0x550, 0x10 }, { 0x551, 0x10 }, { 0x559, 0x02 }, 1234 { 0x55d, 0xff }, { 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, 1235 { 0x620, 0xff }, { 0x621, 0xff }, { 0x622, 0xff }, { 0x623, 0xff }, 1236 { 0x624, 0xff }, { 0x625, 0xff }, { 0x626, 0xff }, { 0x627, 0xff }, 1237 { 0x652, 0x20 }, { 0x63c, 0x0a }, { 0x63d, 0x0a }, { 0x63e, 0x0e }, 1238 { 0x63f, 0x0e }, { 0x640, 0x40 }, { 0x66e, 0x05 }, { 0x700, 0x21 }, 1239 { 0x701, 0x43 }, { 0x702, 0x65 }, { 0x703, 0x87 }, { 0x708, 0x21 }, 1240 { 0x709, 0x43 }, { 0x70a, 0x65 }, { 0x70b, 0x87 } 1241}, rtl8192cu_mac[] = { 1242 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 }, 1243 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, 1244 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 }, 1245 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, 1246 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, 1247 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, 1248 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, 1249 { 0x45b, 0xb9 }, { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x462, 0x08 }, 1250 { 0x463, 0x03 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 }, { 0x4cc, 0xff }, 1251 { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 }, 1252 { 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 }, 1253 { 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 }, 1254 { 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 }, 1255 { 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a }, 1256 { 0x515, 0x10 }, { 0x516, 0x0a }, { 0x517, 0x10 }, { 0x51a, 0x16 }, 1257 { 0x524, 0x0f }, { 0x525, 0x4f }, { 0x546, 0x40 }, { 0x547, 0x00 }, 1258 { 0x550, 0x10 }, { 0x551, 0x10 }, { 0x559, 0x02 }, { 0x55a, 0x02 }, 1259 { 0x55d, 0xff }, { 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, 1260 { 0x652, 0x20 }, { 0x63c, 0x0a }, { 0x63d, 0x0e }, { 0x63e, 0x0a }, 1261 { 0x63f, 0x0e }, { 0x66e, 0x05 }, { 0x700, 0x21 }, { 0x701, 0x43 }, 1262 { 0x702, 0x65 }, { 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, 1263 { 0x70a, 0x65 }, { 0x70b, 0x87 } 1264}; 1265 1266/* 1267 * Baseband initialization values. 1268 */ 1269struct urtwn_bb_prog { 1270 int count; 1271 const uint16_t *regs; 1272 const uint32_t *vals; 1273 int agccount; 1274 const uint32_t *agcvals; 1275}; 1276 1277/* 1278 * RTL8192CU and RTL8192CE-VAU. 1279 */ 1280static const uint16_t rtl8192ce_bb_regs[] = { 1281 0x024, 0x028, 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 1282 0x81c, 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 1283 0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 1284 0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884, 1285 0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 0x908, 1286 0x90c, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 1287 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xc00, 0xc04, 0xc08, 1288 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 0xc2c, 1289 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 1290 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 0xc74, 1291 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 0xc98, 1292 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 0xcbc, 1293 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 0xce0, 1294 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 0xd14, 1295 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 0xd48, 1296 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 0xd6c, 1297 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 0xe18, 1298 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 0xe48, 1299 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 0xe70, 1300 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 0xed4, 1301 0xed8, 0xedc, 0xee0, 0xeec, 0xf14, 0xf4c, 0xf00 1302}; 1303 1304static const uint32_t rtl8192ce_bb_vals[] = { 1305 0x0011800d, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00, 1306 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 1307 0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727, 1308 0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000, 1309 0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a, 1310 0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27, 1311 0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070, 1312 0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe, 1313 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 1314 0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 1315 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 1316 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 1317 0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000, 1318 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 1319 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 1320 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 1321 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 1322 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 1323 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 1324 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 1325 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 1326 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 1327 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 1328 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 1329 0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333, 1330 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 1331 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 1332 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 1333 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 1334 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 1335 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 1336 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 1337 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 1338 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x63db25a4, 1339 0x63db25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 1340 0x63db25a4, 0x0c1b25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 1341 0x63db25a4, 0x001b25a4, 0x001b25a4, 0x6fdb25a4, 0x00000003, 1342 0x00000000, 0x00000300 1343}; 1344 1345static const uint32_t rtl8192ce_agc_vals[] = { 1346 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 1347 0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001, 1348 0x760a0001, 0x750b0001, 0x740c0001, 0x730d0001, 0x720e0001, 1349 0x710f0001, 0x70100001, 0x6f110001, 0x6e120001, 0x6d130001, 1350 0x6c140001, 0x6b150001, 0x6a160001, 0x69170001, 0x68180001, 1351 0x67190001, 0x661a0001, 0x651b0001, 0x641c0001, 0x631d0001, 1352 0x621e0001, 0x611f0001, 0x60200001, 0x49210001, 0x48220001, 1353 0x47230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 1354 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 1355 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 1356 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 1357 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 1358 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 1359 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 1360 0x7a460001, 0x79470001, 0x78480001, 0x77490001, 0x764a0001, 1361 0x754b0001, 0x744c0001, 0x734d0001, 0x724e0001, 0x714f0001, 1362 0x70500001, 0x6f510001, 0x6e520001, 0x6d530001, 0x6c540001, 1363 0x6b550001, 0x6a560001, 0x69570001, 0x68580001, 0x67590001, 1364 0x665a0001, 0x655b0001, 0x645c0001, 0x635d0001, 0x625e0001, 1365 0x615f0001, 0x60600001, 0x49610001, 0x48620001, 0x47630001, 1366 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 1367 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 1368 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 1369 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 1370 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 1371 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 1372 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 1373 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 1374 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 1375 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 1376 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 1377 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 1378}; 1379 1380static const struct urtwn_bb_prog rtl8192ce_bb_prog = { 1381 nitems(rtl8192ce_bb_regs), 1382 rtl8192ce_bb_regs, 1383 rtl8192ce_bb_vals, 1384 nitems(rtl8192ce_agc_vals), 1385 rtl8192ce_agc_vals 1386}; 1387 1388/* 1389 * RTL8188CU. 1390 */ 1391static const uint32_t rtl8192cu_bb_vals[] = { 1392 0x0011800d, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00, 1393 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 1394 0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727, 1395 0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000, 1396 0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a, 1397 0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27, 1398 0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070, 1399 0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe, 1400 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 1401 0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 1402 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 1403 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 1404 0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000, 1405 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 1406 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 1407 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 1408 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 1409 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x0186115b, 1410 0x0000001f, 0x00b99612, 0x40000100, 0x20f60000, 0x40000100, 1411 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 1412 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 1413 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 1414 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 1415 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 1416 0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333, 1417 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 1418 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 1419 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 1420 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 1421 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 1422 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 1423 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 1424 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 1425 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x63db25a4, 1426 0x63db25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 1427 0x63db25a4, 0x0c1b25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 1428 0x63db25a4, 0x001b25a4, 0x001b25a4, 0x6fdb25a4, 0x00000003, 1429 0x00000000, 0x00000300 1430}; 1431 1432static const struct urtwn_bb_prog rtl8192cu_bb_prog = { 1433 nitems(rtl8192ce_bb_regs), 1434 rtl8192ce_bb_regs, 1435 rtl8192cu_bb_vals, 1436 nitems(rtl8192ce_agc_vals), 1437 rtl8192ce_agc_vals 1438}; 1439 1440/* 1441 * RTL8188CE-VAU. 1442 */ 1443static const uint32_t rtl8188ce_bb_vals[] = { 1444 0x0011800d, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00, 1445 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 1446 0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000, 1447 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, 1448 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a, 1449 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200, 1450 0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070, 1451 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe, 1452 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 1453 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 1454 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 1455 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 1456 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 1457 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 1458 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 1459 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 1460 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 1461 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 1462 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 1463 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 1464 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 1465 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 1466 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 1467 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 1468 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 1469 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 1470 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 1471 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 1472 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 1473 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 1474 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 1475 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 1476 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 1477 0x02140102, 0x28160d05, 0x00000008, 0x001b25a4, 0x631b25a0, 1478 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 1479 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 1480 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003, 1481 0x00000000, 0x00000300 1482}; 1483 1484static const uint32_t rtl8188ce_agc_vals[] = { 1485 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 1486 0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001, 1487 0x760a0001, 0x750b0001, 0x740c0001, 0x730d0001, 0x720e0001, 1488 0x710f0001, 0x70100001, 0x6f110001, 0x6e120001, 0x6d130001, 1489 0x6c140001, 0x6b150001, 0x6a160001, 0x69170001, 0x68180001, 1490 0x67190001, 0x661a0001, 0x651b0001, 0x641c0001, 0x631d0001, 1491 0x621e0001, 0x611f0001, 0x60200001, 0x49210001, 0x48220001, 1492 0x47230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 1493 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 1494 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 1495 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 1496 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 1497 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 1498 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 1499 0x7a460001, 0x79470001, 0x78480001, 0x77490001, 0x764a0001, 1500 0x754b0001, 0x744c0001, 0x734d0001, 0x724e0001, 0x714f0001, 1501 0x70500001, 0x6f510001, 0x6e520001, 0x6d530001, 0x6c540001, 1502 0x6b550001, 0x6a560001, 0x69570001, 0x68580001, 0x67590001, 1503 0x665a0001, 0x655b0001, 0x645c0001, 0x635d0001, 0x625e0001, 1504 0x615f0001, 0x60600001, 0x49610001, 0x48620001, 0x47630001, 1505 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 1506 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 1507 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 1508 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 1509 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 1510 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 1511 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 1512 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 1513 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 1514 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 1515 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 1516 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 1517}; 1518 1519static const struct urtwn_bb_prog rtl8188ce_bb_prog = { 1520 nitems(rtl8192ce_bb_regs), 1521 rtl8192ce_bb_regs, 1522 rtl8188ce_bb_vals, 1523 nitems(rtl8188ce_agc_vals), 1524 rtl8188ce_agc_vals 1525}; 1526 1527static const uint32_t rtl8188cu_bb_vals[] = { 1528 0x0011800d, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00, 1529 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 1530 0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000, 1531 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, 1532 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a, 1533 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200, 1534 0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070, 1535 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe, 1536 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 1537 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 1538 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 1539 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 1540 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 1541 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 1542 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 1543 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 1544 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 1545 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 1546 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 1547 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 1548 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 1549 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 1550 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 1551 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 1552 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 1553 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 1554 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 1555 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 1556 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 1557 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 1558 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 1559 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 1560 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 1561 0x02140102, 0x28160d05, 0x00000008, 0x001b25a4, 0x631b25a0, 1562 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 1563 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 1564 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003, 1565 0x00000000, 0x00000300 1566}; 1567 1568static const struct urtwn_bb_prog rtl8188cu_bb_prog = { 1569 nitems(rtl8192ce_bb_regs), 1570 rtl8192ce_bb_regs, 1571 rtl8188cu_bb_vals, 1572 nitems(rtl8188ce_agc_vals), 1573 rtl8188ce_agc_vals 1574}; 1575 1576/* 1577 * RTL8188EU. 1578 */ 1579static const uint16_t rtl8188eu_bb_regs[] = { 1580 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x81c, 1581 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 1582 0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 1583 0x860, 0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 1584 0x880, 0x884, 0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c, 1585 0x900, 0x904, 0x908, 0x90c, 0x910, 0x914, 0xa00, 0xa04, 1586 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 0xa20, 0xa24, 1587 0xa28, 0xa2c, 0xa70, 0xa74, 0xa78, 0xa7c, 0xa80, 0xb2c, 1588 0xc00, 0xc04, 0xc08, 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 1589 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 1590 0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 0xc54, 0xc58, 0xc5c, 1591 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 0xc74, 0xc78, 0xc7c, 1592 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 0xc98, 0xc9c, 1593 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 0xcbc, 1594 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 1595 0xce0, 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 1596 0xd10, 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 1597 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 1598 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 1599 0xe04, 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30, 1600 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xe50, 1601 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 0xe70, 0xe74, 1602 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 0xed4, 1603 0xed8, 0xedc, 0xee0, 0xee8, 0xeec, 0xf14, 0xf4c, 0xf00 1604}; 1605 1606static const uint32_t rtl8188eu_bb_vals[] = { 1607 0x80040000, 0x00000003, 0x0000fc00, 0x0000000a, 0x10001331, 1608 0x020c3d10, 0x02200385, 0x00000000, 0x01000100, 0x00390204, 1609 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1610 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, 1611 0x00000000, 0x00000000, 0x569a11a9, 0x01000014, 0x66f60110, 1612 0x061f0649, 0x00000000, 0x27272700, 0x07000760, 0x25004000, 1613 0x00000808, 0x00000000, 0xb0000c1c, 0x00000001, 0x00000000, 1614 0xccc000c0, 0x00000800, 0xfffffffe, 0x40302010, 0x00706050, 1615 0x00000000, 0x00000023, 0x00000000, 0x81121111, 0x00000002, 1616 0x00000201, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e7f120f, 1617 0x9500bb78, 0x1114d028, 0x00881117, 0x89140f00, 0x1a1b0000, 1618 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 1619 0x00000900, 0x225b0606, 0x218075b1, 0x80000000, 0x48071d40, 1620 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 0x40000100, 1621 0x08800000, 0x40000100, 0x00000000, 0x00000000, 0x00000000, 1622 0x00000000, 0x69e9ac47, 0x469652af, 0x49795994, 0x0a97971c, 1623 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 0x69553420, 1624 0x43bc0094, 0x00013169, 0x00250492, 0x00000000, 0x7112848b, 1625 0x47c00bff, 0x00000036, 0x2c7f000d, 0x020610db, 0x0000001f, 1626 0x00b91612, 0x390000e4, 0x20f60000, 0x40000100, 0x20200000, 1627 0x00091521, 0x00000000, 0x00121820, 0x00007f7f, 0x00000000, 1628 0x000300a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1629 0x00000000, 0x28000000, 0x00000000, 0x00000000, 0x00000000, 1630 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 0x00766932, 1631 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 0x00000740, 1632 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 0x3333bc43, 1633 0x7a8f5b6f, 0xcc979975, 0x00000000, 0x80608000, 0x00000000, 1634 0x00127353, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1635 0x6437140a, 0x00000000, 0x00000282, 0x30032064, 0x4653de68, 1636 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220, 1637 0x000e3c24, 0x2d2d2d2d, 0x2d2d2d2d, 0x0390272d, 0x2d2d2d2d, 1638 0x2d2d2d2d, 0x2d2d2d2d, 0x2d2d2d2d, 0x00000000, 0x1000dc1f, 1639 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 1640 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 1641 0x28160d05, 0x00000008, 0x001b25a4, 0x00c00014, 0x00c00014, 1642 0x01000014, 0x01000014, 0x01000014, 0x01000014, 0x00c00014, 1643 0x01000014, 0x00c00014, 0x00c00014, 0x00c00014, 0x00c00014, 1644 0x00000014, 0x00000014, 0x21555448, 0x01c00014, 0x00000003, 1645 0x00000000, 0x00000300 1646}; 1647 1648static const uint32_t rtl8188eu_agc_vals[] = { 1649 0xfb000001, 0xfb010001, 0xfb020001, 0xfb030001, 0xfb040001, 1650 0xfb050001, 0xfa060001, 0xf9070001, 0xf8080001, 0xf7090001, 1651 0xf60a0001, 0xf50b0001, 0xf40c0001, 0xf30d0001, 0xf20e0001, 1652 0xf10f0001, 0xf0100001, 0xef110001, 0xee120001, 0xed130001, 1653 0xec140001, 0xeb150001, 0xea160001, 0xe9170001, 0xe8180001, 1654 0xe7190001, 0xe61a0001, 0xe51b0001, 0xe41c0001, 0xe31d0001, 1655 0xe21e0001, 0xe11f0001, 0x8a200001, 0x89210001, 0x88220001, 1656 0x87230001, 0x86240001, 0x85250001, 0x84260001, 0x83270001, 1657 0x82280001, 0x6b290001, 0x6a2a0001, 0x692b0001, 0x682c0001, 1658 0x672d0001, 0x662e0001, 0x652f0001, 0x64300001, 0x63310001, 1659 0x62320001, 0x61330001, 0x46340001, 0x45350001, 0x44360001, 1660 0x43370001, 0x42380001, 0x41390001, 0x403a0001, 0x403b0001, 1661 0x403c0001, 0x403d0001, 0x403e0001, 0x403f0001, 0xfb400001, 1662 0xfb410001, 0xfb420001, 0xfb430001, 0xfb440001, 0xfb450001, 1663 0xfb460001, 0xfb470001, 0xfb480001, 0xfa490001, 0xf94a0001, 1664 0xf84B0001, 0xf74c0001, 0xf64d0001, 0xf54e0001, 0xf44f0001, 1665 0xf3500001, 0xf2510001, 0xf1520001, 0xf0530001, 0xef540001, 1666 0xee550001, 0xed560001, 0xec570001, 0xeb580001, 0xea590001, 1667 0xe95a0001, 0xe85b0001, 0xe75c0001, 0xe65d0001, 0xe55e0001, 1668 0xe45f0001, 0xe3600001, 0xe2610001, 0xc3620001, 0xc2630001, 1669 0xc1640001, 0x8b650001, 0x8a660001, 0x89670001, 0x88680001, 1670 0x87690001, 0x866a0001, 0x856b0001, 0x846c0001, 0x676d0001, 1671 0x666e0001, 0x656f0001, 0x64700001, 0x63710001, 0x62720001, 1672 0x61730001, 0x60740001, 0x46750001, 0x45760001, 0x44770001, 1673 0x43780001, 0x42790001, 0x417a0001, 0x407b0001, 0x407c0001, 1674 0x407d0001, 0x407e0001, 0x407f0001 1675}; 1676 1677static const struct urtwn_bb_prog rtl8188eu_bb_prog = { 1678 nitems(rtl8188eu_bb_regs), 1679 rtl8188eu_bb_regs, 1680 rtl8188eu_bb_vals, 1681 nitems(rtl8188eu_agc_vals), 1682 rtl8188eu_agc_vals 1683}; 1684 1685/* 1686 * RTL8188RU. 1687 */ 1688static const uint16_t rtl8188ru_bb_regs[] = { 1689 0x024, 0x028, 0x040, 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 1690 0x818, 0x81c, 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 1691 0x83c, 0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 1692 0x860, 0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 1693 0x884, 0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 1694 0x908, 0x90c, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 1695 0xa1c, 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xc00, 0xc04, 1696 0xc08, 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 1697 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 1698 0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 1699 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 1700 0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 1701 0xcbc, 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 1702 0xce0, 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 1703 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 1704 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 1705 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 1706 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 1707 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 1708 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 1709 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xee8, 0xf14, 0xf4c, 0xf00 1710}; 1711 1712static const uint32_t rtl8188ru_bb_vals[] = { 1713 0x0011800d, 0x00ffdb83, 0x000c0004, 0x80040000, 0x00000001, 1714 0x0000fc00, 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 1715 0x00000000, 0x01000100, 0x00390204, 0x00000000, 0x00000000, 1716 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 1717 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1718 0x569a569a, 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 1719 0x32323200, 0x03000300, 0x22004000, 0x00000808, 0x00ffc3f1, 1720 0xc0083070, 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 1721 0xfffffffe, 0x40302010, 0x00706050, 0x00000000, 0x00000023, 1722 0x00000000, 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 1723 0x2e68120f, 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 1724 0x15160000, 0x070b0f12, 0x00000104, 0x00d30000, 0x101fbf00, 1725 0x00000007, 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 1726 0x08800000, 0x40000100, 0x08800000, 0x40000100, 0x00000000, 1727 0x00000000, 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 1728 0x49795994, 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 1729 0x007f037f, 0x6954342e, 0x43bc0094, 0x6954342f, 0x433c0094, 1730 0x00000000, 0x5116848b, 0x47c00bff, 0x00000036, 0x2c56000d, 1731 0x018610db, 0x0000001f, 0x00b91612, 0x24000090, 0x20f60000, 1732 0x24000090, 0x20200000, 0x00121820, 0x00000000, 0x00121820, 1733 0x00007f7f, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 1734 0x00000000, 0x00000000, 0x00000000, 0x28000000, 0x00000000, 1735 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1736 0x64b22427, 0x00766932, 0x00222222, 0x00000000, 0x37644302, 1737 0x2f97d40c, 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 1738 0xa0633333, 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 1739 0x80608000, 0x00000000, 0x00027293, 0x00000000, 0x00000000, 1740 0x00000000, 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 1741 0x30032064, 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 1742 0x1812362e, 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 1743 0x03902a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 1744 0x00000000, 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 1745 0x01007c00, 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 1746 0x10008c1f, 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 1747 0x631b25a0, 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 1748 0x081b25a0, 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 1749 0x631b25a0, 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 1750 0x31555448, 0x00000003, 0x00000000, 0x00000300 1751}; 1752 1753static const uint32_t rtl8188ru_agc_vals[] = { 1754 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 1755 0x7b050001, 0x7b060001, 0x7b070001, 0x7b080001, 0x7a090001, 1756 0x790a0001, 0x780b0001, 0x770c0001, 0x760d0001, 0x750e0001, 1757 0x740f0001, 0x73100001, 0x72110001, 0x71120001, 0x70130001, 1758 0x6f140001, 0x6e150001, 0x6d160001, 0x6c170001, 0x6b180001, 1759 0x6a190001, 0x691a0001, 0x681b0001, 0x671c0001, 0x661d0001, 1760 0x651e0001, 0x641f0001, 0x63200001, 0x62210001, 0x61220001, 1761 0x60230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 1762 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 1763 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 1764 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 1765 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 1766 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 1767 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 1768 0x7b460001, 0x7b470001, 0x7b480001, 0x7a490001, 0x794a0001, 1769 0x784b0001, 0x774c0001, 0x764d0001, 0x754e0001, 0x744f0001, 1770 0x73500001, 0x72510001, 0x71520001, 0x70530001, 0x6f540001, 1771 0x6e550001, 0x6d560001, 0x6c570001, 0x6b580001, 0x6a590001, 1772 0x695a0001, 0x685b0001, 0x675c0001, 0x665d0001, 0x655e0001, 1773 0x645f0001, 0x63600001, 0x62610001, 0x61620001, 0x60630001, 1774 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 1775 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 1776 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 1777 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 1778 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 1779 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 1780 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 1781 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 1782 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 1783 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 1784 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 1785 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 1786}; 1787 1788static const struct urtwn_bb_prog rtl8188ru_bb_prog = { 1789 nitems(rtl8188ru_bb_regs), 1790 rtl8188ru_bb_regs, 1791 rtl8188ru_bb_vals, 1792 nitems(rtl8188ru_agc_vals), 1793 rtl8188ru_agc_vals 1794}; 1795 1796/* 1797 * RF initialization values. 1798 */ 1799struct urtwn_rf_prog { 1800 int count; 1801 const uint8_t *regs; 1802 const uint32_t *vals; 1803}; 1804 1805/* 1806 * RTL8192CU and RTL8192CE-VAU. 1807 */ 1808static const uint8_t rtl8192ce_rf1_regs[] = { 1809 0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 1810 0x0f, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 1811 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2a, 0x2b, 1812 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 1813 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 1814 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 1815 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 1816 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 1817 0x2c, 0x2a, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 1818 0x11, 0x10, 0x11, 0x10, 0x11, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 1819 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 1820 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, 0x16, 0x16, 0x16, 0x16, 0x00, 1821 0x18, 0xfe, 0xfe, 0x1f, 0xfe, 0xfe, 0x1e, 0x1f, 0x00 1822}; 1823 1824static const uint32_t rtl8192ce_rf1_vals[] = { 1825 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 1826 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 1827 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 1828 0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x577c0, 1829 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 1830 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 1831 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 1832 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 1833 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 1834 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 1835 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 1836 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 1837 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 1838 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 1839 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 1840 0x71000, 0xb0000, 0xfc000, 0x287af, 0x244b7, 0x204ab, 0x1c49f, 1841 0x18493, 0x14297, 0x10295, 0x0c298, 0x0819c, 0x040a8, 0x0001c, 1842 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 1843 0xcf424, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 1844 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 1845 0x30159 1846}; 1847 1848static const uint8_t rtl8192ce_rf2_regs[] = { 1849 0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 1850 0x0f, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 1851 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 1852 0x15, 0x15, 0x16, 0x16, 0x16, 0x16 1853}; 1854 1855static const uint32_t rtl8192ce_rf2_vals[] = { 1856 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 1857 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x32000, 0x71000, 1858 0xb0000, 0xfc000, 0x287af, 0x244b7, 0x204ab, 0x1c49f, 0x18493, 1859 0x14297, 0x10295, 0x0c298, 0x0819c, 0x040a8, 0x0001c, 0x1944c, 1860 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 0xcf424, 1861 0xe0330, 0xa0330, 0x60330, 0x20330 1862}; 1863 1864static const struct urtwn_rf_prog rtl8192ce_rf_prog[] = { 1865 { 1866 nitems(rtl8192ce_rf1_regs), 1867 rtl8192ce_rf1_regs, 1868 rtl8192ce_rf1_vals 1869 }, 1870 { 1871 nitems(rtl8192ce_rf2_regs), 1872 rtl8192ce_rf2_regs, 1873 rtl8192ce_rf2_vals 1874 } 1875}; 1876 1877/* 1878 * RTL8188CE-VAU. 1879 */ 1880static const uint32_t rtl8188ce_rf_vals[] = { 1881 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 1882 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 1883 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 1884 0x00000, 0x01558, 0x00060, 0x00483, 0x4f200, 0xec7d9, 0x577c0, 1885 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 1886 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 1887 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 1888 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 1889 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 1890 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 1891 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 1892 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 1893 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 1894 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 1895 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 1896 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab, 0x1c49f, 1897 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac, 0x00020, 1898 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 1899 0xcf424, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 1900 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 1901 0x30159 1902}; 1903 1904static const struct urtwn_rf_prog rtl8188ce_rf_prog[] = { 1905 { 1906 nitems(rtl8192ce_rf1_regs), 1907 rtl8192ce_rf1_regs, 1908 rtl8188ce_rf_vals 1909 } 1910}; 1911 1912 1913/* 1914 * RTL8188CU. 1915 */ 1916static const uint32_t rtl8188cu_rf_vals[] = { 1917 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 1918 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 1919 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 1920 0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x577c0, 1921 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 1922 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 1923 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 1924 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 1925 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 1926 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 1927 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 1928 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 1929 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 1930 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 1931 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 1932 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab, 0x1c49f, 1933 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac, 0x00020, 1934 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f405, 0x4f405, 0x8f405, 1935 0xcf405, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 1936 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 1937 0x30159 1938}; 1939 1940static const struct urtwn_rf_prog rtl8188cu_rf_prog[] = { 1941 { 1942 nitems(rtl8192ce_rf1_regs), 1943 rtl8192ce_rf1_regs, 1944 rtl8188cu_rf_vals 1945 } 1946}; 1947 1948/* 1949 * RTL8188EU. 1950 */ 1951static const uint8_t rtl8188eu_rf_regs[] = { 1952 0x00, 0x08, 0x18, 0x19, 0x1e, 0x1f, 0x2f, 0x3f, 0x42, 0x57, 1953 0x58, 0x67, 0x83, 0xb0, 0xb1, 0xb2, 0xb4, 0xb6, 0xb7, 0xb8, 1954 0xb9, 0xba, 0xbb, 0xbf, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 1955 0xc8, 0xc9, 0xca, 0xdf, 0xef, 0x51, 0x52, 0x53, 0x56, 1956 0x35, 0x35, 0x35, 0x36, 0x36, 0x36, 0x36, 0xb6, 0x18, 0x5a, 1957 0x19, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 1958 0x34, 0x34, 0x00, 0x84, 0x86, 0x87, 0x8e, 0x8f, 0xef, 0x3b, 1959 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 1960 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0xef, 0x00, 0x18, 0xfe, 0xfe, 1961 0x1f, 0xfe, 0xfe, 0x1e, 0x1f, 0x00 1962}; 1963 1964static const uint32_t rtl8188eu_rf_vals[] = { 1965 0x30000, 0x84000, 0x00407, 0x00012, 0x80009, 0x00880, 0x1a060, 1966 0x00000, 0x060c0, 0xd0000, 0xbe180, 0x01552, 0x00000, 0xff8fc, 1967 0x54400, 0xccc19, 0x43003, 0x4953e, 0x1c718, 0x060ff, 0x80001, 1968 0x40000, 0x00400, 0xc0000, 0x02400, 0x00009, 0x40c91, 0x99999, 1969 0x000a3, 0x88820, 0x76c06, 0x00000, 0x80000, 0x00180, 0x001a0, 1970 0x6b27d, 0x7e49d, 0x00073, 0x51ff3, 0x00086, 0x00186, 1971 0x00286, 0x01c25, 0x09c25, 0x11c25, 0x19c25, 0x48538, 0x00c07, 1972 0x4bd00, 0x739d0, 0x0adf3, 0x09df0, 0x08ded, 0x07dea, 0x06de7, 1973 0x054ee, 0x044eb, 0x034e8, 0x0246b, 0x01468, 0x0006d, 0x30159, 1974 0x68200, 0x000ce, 0x48a00, 0x65540, 0x88000, 0x020a0, 0xf02b0, 1975 0xef7b0, 0xd4fb0, 0xcf060, 0xb0090, 0xa0080, 0x90080, 0x8f780, 1976 0x722b0, 0x6f7b0, 0x54fb0, 0x4f060, 0x30090, 0x20080, 0x10080, 1977 0x0f780, 0x000a0, 0x10159, 0x0f407, 0x00000, 0x00000, 0x80003, 1978 0x00000, 0x00000, 0x00001, 0x80000, 0x33e60 1979}; 1980 1981static const struct urtwn_rf_prog rtl8188eu_rf_prog[] = { 1982 { 1983 nitems(rtl8188eu_rf_regs), 1984 rtl8188eu_rf_regs, 1985 rtl8188eu_rf_vals 1986 } 1987}; 1988 1989/* 1990 * RTL8188RU. 1991 */ 1992static const uint32_t rtl8188ru_rf_vals[] = { 1993 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb0, 1994 0x54867, 0x8992e, 0x0e529, 0x39ce7, 0x00451, 0x00000, 0x00255, 1995 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 1996 0x0083c, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x977c0, 1997 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 1998 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 1999 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 2000 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 2001 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 2002 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 2003 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 2004 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 2005 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 2006 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 2007 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0xd8000, 2008 0x90000, 0x51000, 0x12000, 0x28fb4, 0x24fa8, 0x207a4, 0x1c798, 2009 0x183a4, 0x14398, 0x101a4, 0x0c198, 0x080a4, 0x04098, 0x00014, 2010 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f405, 0x4f405, 0x8f405, 2011 0xcf405, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 2012 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 2013 0x30159 2014}; 2015 2016static const struct urtwn_rf_prog rtl8188ru_rf_prog[] = { 2017 { 2018 nitems(rtl8192ce_rf1_regs), 2019 rtl8192ce_rf1_regs, 2020 rtl8188ru_rf_vals 2021 } 2022}; 2023 2024struct urtwn_txpwr { 2025 uint8_t pwr[3][28]; 2026}; 2027 2028struct urtwn_r88e_txpwr { 2029 uint8_t pwr[6][28]; 2030}; 2031 2032/* 2033 * Per RF chain/group/rate Tx gain values. 2034 */ 2035static const struct urtwn_txpwr rtl8192cu_txagc[] = { 2036 { { /* Chain 0. */ 2037 { /* Group 0. */ 2038 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2039 0x0c, 0x0c, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, /* OFDM6~54. */ 2040 0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, /* MCS0~7. */ 2041 0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02 /* MCS8~15. */ 2042 }, 2043 { /* Group 1. */ 2044 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2045 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2046 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2047 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2048 }, 2049 { /* Group 2. */ 2050 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2051 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00, /* OFDM6~54. */ 2052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2053 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2054 } 2055 } }, 2056 { { /* Chain 1. */ 2057 { /* Group 0. */ 2058 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2059 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2060 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2061 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2062 }, 2063 { /* Group 1. */ 2064 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2065 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2066 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2067 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2068 }, 2069 { /* Group 2. */ 2070 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2071 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00, /* OFDM6~54. */ 2072 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2073 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2074 } 2075 } } 2076}; 2077 2078static const struct urtwn_txpwr rtl8188ru_txagc[] = { 2079 { { /* Chain 0. */ 2080 { /* Group 0. */ 2081 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2082 0x08, 0x08, 0x08, 0x06, 0x06, 0x04, 0x04, 0x00, /* OFDM6~54. */ 2083 0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00, /* MCS0~7. */ 2084 0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00 /* MCS8~15. */ 2085 }, 2086 { /* Group 1. */ 2087 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2088 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2089 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2090 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2091 }, 2092 { /* Group 2. */ 2093 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2094 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2095 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2096 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2097 } 2098 } } 2099}; 2100 2101static const struct urtwn_r88e_txpwr rtl8188eu_txagc[] = { 2102 { { /* Chain 0. */ 2103 { /* Group 0. */ 2104 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2108 }, 2109 { /* Group 1. */ 2110 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2113 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2114 }, 2115 { /* Group 2. */ 2116 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2119 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2120 }, 2121 { /* Group 3. */ 2122 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2126 }, 2127 { /* Group 4. */ 2128 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2132 }, 2133 { /* Group 5. */ 2134 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 2135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 2136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 2137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 2138 } 2139 } } 2140}; 2141