uart_core.c revision 286469
1/*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/uart/uart_core.c 286469 2015-08-08 20:11:47Z ian $"); 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/conf.h> 34#include <sys/cons.h> 35#include <sys/fcntl.h> 36#include <sys/interrupt.h> 37#include <sys/kdb.h> 38#include <sys/kernel.h> 39#include <sys/malloc.h> 40#include <sys/queue.h> 41#include <sys/reboot.h> 42#include <sys/sysctl.h> 43#include <machine/bus.h> 44#include <sys/rman.h> 45#include <machine/resource.h> 46#include <machine/stdarg.h> 47 48#include <dev/uart/uart.h> 49#include <dev/uart/uart_bus.h> 50#include <dev/uart/uart_cpu.h> 51 52#include "uart_if.h" 53 54devclass_t uart_devclass; 55const char uart_driver_name[] = "uart"; 56 57SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 58 SLIST_HEAD_INITIALIZER(uart_sysdevs); 59 60static MALLOC_DEFINE(M_UART, "UART", "UART driver"); 61 62#ifndef UART_POLL_FREQ 63#define UART_POLL_FREQ 50 64#endif 65static int uart_poll_freq = UART_POLL_FREQ; 66SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq, 67 0, "UART poll frequency"); 68 69static int uart_force_poll; 70SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll, 71 0, "Force UART polling"); 72 73void 74uart_add_sysdev(struct uart_devinfo *di) 75{ 76 SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 77} 78 79const char * 80uart_getname(struct uart_class *uc) 81{ 82 return ((uc != NULL) ? uc->name : NULL); 83} 84 85struct uart_ops * 86uart_getops(struct uart_class *uc) 87{ 88 return ((uc != NULL) ? uc->uc_ops : NULL); 89} 90 91int 92uart_getrange(struct uart_class *uc) 93{ 94 return ((uc != NULL) ? uc->uc_range : 0); 95} 96 97u_int 98uart_getregshift(struct uart_class *uc) 99{ 100 return ((uc != NULL) ? uc->uc_rshift : 0); 101} 102 103/* 104 * Schedule a soft interrupt. We do this on the 0 to !0 transition 105 * of the TTY pending interrupt status. 106 */ 107void 108uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 109{ 110 uint32_t new, old; 111 112 do { 113 old = sc->sc_ttypend; 114 new = old | ipend; 115 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 116 117 if ((old & SER_INT_MASK) == 0) 118 swi_sched(sc->sc_softih, 0); 119} 120 121/* 122 * A break condition has been detected. We treat the break condition as 123 * a special case that should not happen during normal operation. When 124 * the break condition is to be passed to higher levels in the form of 125 * a NUL character, we really want the break to be in the right place in 126 * the input stream. The overhead to achieve that is not in relation to 127 * the exceptional nature of the break condition, so we permit ourselves 128 * to be sloppy. 129 */ 130static __inline int 131uart_intr_break(void *arg) 132{ 133 struct uart_softc *sc = arg; 134 135#if defined(KDB) 136 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 137 if (kdb_break()) 138 return (0); 139 } 140#endif 141 if (sc->sc_opened) 142 uart_sched_softih(sc, SER_INT_BREAK); 143 return (0); 144} 145 146/* 147 * Handle a receiver overrun situation. We lost at least 1 byte in the 148 * input stream and it's our job to contain the situation. We grab as 149 * much of the data we can, but otherwise flush the receiver FIFO to 150 * create some breathing room. The net effect is that we avoid the 151 * overrun condition to happen for the next X characters, where X is 152 * related to the FIFO size at the cost of losing data right away. 153 * So, instead of having multiple overrun interrupts in close proximity 154 * to each other and possibly pessimizing UART interrupt latency for 155 * other UARTs in a multiport configuration, we create a longer segment 156 * of missing characters by freeing up the FIFO. 157 * Each overrun condition is marked in the input buffer by a token. The 158 * token represents the loss of at least one, but possible more bytes in 159 * the input stream. 160 */ 161static __inline int 162uart_intr_overrun(void *arg) 163{ 164 struct uart_softc *sc = arg; 165 166 if (sc->sc_opened) { 167 UART_RECEIVE(sc); 168 if (uart_rx_put(sc, UART_STAT_OVERRUN)) 169 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 170 uart_sched_softih(sc, SER_INT_RXREADY); 171 } 172 UART_FLUSH(sc, UART_FLUSH_RECEIVER); 173 return (0); 174} 175 176/* 177 * Received data ready. 178 */ 179static __inline int 180uart_intr_rxready(void *arg) 181{ 182 struct uart_softc *sc = arg; 183 int rxp; 184 185 rxp = sc->sc_rxput; 186 UART_RECEIVE(sc); 187#if defined(KDB) 188 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 189 while (rxp != sc->sc_rxput) { 190 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); 191 if (rxp == sc->sc_rxbufsz) 192 rxp = 0; 193 } 194 } 195#endif 196 if (sc->sc_opened) 197 uart_sched_softih(sc, SER_INT_RXREADY); 198 else 199 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 200 return (1); 201} 202 203/* 204 * Line or modem status change (OOB signalling). 205 * We pass the signals to the software interrupt handler for further 206 * processing. Note that we merge the delta bits, but set the state 207 * bits. This is to avoid losing state transitions due to having more 208 * than 1 hardware interrupt between software interrupts. 209 */ 210static __inline int 211uart_intr_sigchg(void *arg) 212{ 213 struct uart_softc *sc = arg; 214 int new, old, sig; 215 216 sig = UART_GETSIG(sc); 217 218 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 219 if (sig & UART_SIG_DPPS) { 220 pps_capture(&sc->sc_pps); 221 pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? 222 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 223 } 224 } 225 226 /* 227 * Keep track of signal changes, even when the device is not 228 * opened. This allows us to inform upper layers about a 229 * possible loss of DCD and thus the existence of a (possibly) 230 * different connection when we have DCD back, during the time 231 * that the device was closed. 232 */ 233 do { 234 old = sc->sc_ttypend; 235 new = old & ~SER_MASK_STATE; 236 new |= sig & SER_INT_SIGMASK; 237 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 238 239 if (sc->sc_opened) 240 uart_sched_softih(sc, SER_INT_SIGCHG); 241 return (1); 242} 243 244/* 245 * The transmitter can accept more data. 246 */ 247static __inline int 248uart_intr_txidle(void *arg) 249{ 250 struct uart_softc *sc = arg; 251 252 if (sc->sc_txbusy) { 253 sc->sc_txbusy = 0; 254 uart_sched_softih(sc, SER_INT_TXIDLE); 255 } 256 return (0); 257} 258 259static int 260uart_intr(void *arg) 261{ 262 struct uart_softc *sc = arg; 263 int cnt, ipend, testintr; 264 265 if (sc->sc_leaving) 266 return (FILTER_STRAY); 267 268 cnt = 0; 269 testintr = sc->sc_testintr; 270 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) { 271 cnt++; 272 if (ipend & SER_INT_OVERRUN) 273 uart_intr_overrun(sc); 274 if (ipend & SER_INT_BREAK) 275 uart_intr_break(sc); 276 if (ipend & SER_INT_RXREADY) 277 uart_intr_rxready(sc); 278 if (ipend & SER_INT_SIGCHG) 279 uart_intr_sigchg(sc); 280 if (ipend & SER_INT_TXIDLE) 281 uart_intr_txidle(sc); 282 } 283 284 if (sc->sc_polled) { 285 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 286 (timeout_t *)uart_intr, sc); 287 } 288 289 return ((cnt == 0) ? FILTER_STRAY : 290 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD : 291 FILTER_HANDLED)); 292} 293 294serdev_intr_t * 295uart_bus_ihand(device_t dev, int ipend) 296{ 297 298 switch (ipend) { 299 case SER_INT_BREAK: 300 return (uart_intr_break); 301 case SER_INT_OVERRUN: 302 return (uart_intr_overrun); 303 case SER_INT_RXREADY: 304 return (uart_intr_rxready); 305 case SER_INT_SIGCHG: 306 return (uart_intr_sigchg); 307 case SER_INT_TXIDLE: 308 return (uart_intr_txidle); 309 } 310 return (NULL); 311} 312 313int 314uart_bus_ipend(device_t dev) 315{ 316 struct uart_softc *sc; 317 318 sc = device_get_softc(dev); 319 return (UART_IPEND(sc)); 320} 321 322int 323uart_bus_sysdev(device_t dev) 324{ 325 struct uart_softc *sc; 326 327 sc = device_get_softc(dev); 328 return ((sc->sc_sysdev != NULL) ? 1 : 0); 329} 330 331int 332uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 333{ 334 struct uart_softc *sc; 335 struct uart_devinfo *sysdev; 336 int error; 337 338 sc = device_get_softc(dev); 339 340 /* 341 * All uart_class references are weak. Check that the needed 342 * class has been compiled-in. Fail if not. 343 */ 344 if (sc->sc_class == NULL) 345 return (ENXIO); 346 347 /* 348 * Initialize the instance. Note that the instance (=softc) does 349 * not necessarily match the hardware specific softc. We can't do 350 * anything about it now, because we may not attach to the device. 351 * Hardware drivers cannot use any of the class specific fields 352 * while probing. 353 */ 354 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 355 sc->sc_dev = dev; 356 if (device_get_desc(dev) == NULL) 357 device_set_desc(dev, uart_getname(sc->sc_class)); 358 359 /* 360 * Allocate the register resource. We assume that all UARTs have 361 * a single register window in either I/O port space or memory 362 * mapped I/O space. Any UART that needs multiple windows will 363 * consequently not be supported by this driver as-is. We try I/O 364 * port space first because that's the common case. 365 */ 366 sc->sc_rrid = rid; 367 sc->sc_rtype = SYS_RES_IOPORT; 368 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 369 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 370 if (sc->sc_rres == NULL) { 371 sc->sc_rrid = rid; 372 sc->sc_rtype = SYS_RES_MEMORY; 373 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, 374 &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), 375 RF_ACTIVE); 376 if (sc->sc_rres == NULL) 377 return (ENXIO); 378 } 379 380 /* 381 * Fill in the bus access structure and compare this device with 382 * a possible console device and/or a debug port. We set the flags 383 * in the softc so that the hardware dependent probe can adjust 384 * accordingly. In general, you don't want to permanently disrupt 385 * console I/O. 386 */ 387 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 388 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 389 sc->sc_bas.chan = chan; 390 sc->sc_bas.regshft = regshft; 391 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 392 393 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 394 if (chan == sysdev->bas.chan && 395 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 396 /* XXX check if ops matches class. */ 397 sc->sc_sysdev = sysdev; 398 sysdev->bas.rclk = sc->sc_bas.rclk; 399 } 400 } 401 402 error = UART_PROBE(sc); 403 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 404 return ((error) ? error : BUS_PROBE_DEFAULT); 405} 406 407int 408uart_bus_attach(device_t dev) 409{ 410 struct uart_softc *sc, *sc0; 411 const char *sep; 412 int error, filt; 413 414 /* 415 * The sc_class field defines the type of UART we're going to work 416 * with and thus the size of the softc. Replace the generic softc 417 * with one that matches the UART now that we're certain we handle 418 * the device. 419 */ 420 sc0 = device_get_softc(dev); 421 if (sc0->sc_class->size > sizeof(*sc)) { 422 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 423 bcopy(sc0, sc, sizeof(*sc)); 424 device_set_softc(dev, sc); 425 } else 426 sc = sc0; 427 428 /* 429 * Now that we know the softc for this device, connect the back 430 * pointer from the sysdev for this device, if any 431 */ 432 if (sc->sc_sysdev != NULL) 433 sc->sc_sysdev->sc = sc; 434 435 /* 436 * Protect ourselves against interrupts while we're not completely 437 * finished attaching and initializing. We don't expect interrupts 438 * until after UART_ATTACH(), though. 439 */ 440 sc->sc_leaving = 1; 441 442 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 443 if (sc->sc_hwmtx == NULL) 444 sc->sc_hwmtx = &sc->sc_hwmtx_s; 445 446 /* 447 * Re-allocate. We expect that the softc contains the information 448 * collected by uart_bus_probe() intact. 449 */ 450 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 451 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 452 if (sc->sc_rres == NULL) { 453 mtx_destroy(&sc->sc_hwmtx_s); 454 return (ENXIO); 455 } 456 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 457 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 458 459 /* 460 * Ensure there is room for at least three full FIFOs of data in the 461 * receive buffer (handles the case of low-level drivers with huge 462 * FIFOs), and also ensure that there is no less than the historical 463 * size of 384 bytes (handles the typical small-FIFO case). 464 */ 465 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); 466 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 467 M_UART, M_WAITOK); 468 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 469 M_UART, M_WAITOK); 470 471 error = UART_ATTACH(sc); 472 if (error) 473 goto fail; 474 475 if (sc->sc_hwiflow || sc->sc_hwoflow) { 476 sep = ""; 477 device_print_prettyname(dev); 478 if (sc->sc_hwiflow) { 479 printf("%sRTS iflow", sep); 480 sep = ", "; 481 } 482 if (sc->sc_hwoflow) { 483 printf("%sCTS oflow", sep); 484 sep = ", "; 485 } 486 printf("\n"); 487 } 488 489 if (sc->sc_sysdev != NULL) { 490 if (sc->sc_sysdev->baudrate == 0) { 491 if (UART_IOCTL(sc, UART_IOCTL_BAUD, 492 (intptr_t)&sc->sc_sysdev->baudrate) != 0) 493 sc->sc_sysdev->baudrate = -1; 494 } 495 switch (sc->sc_sysdev->type) { 496 case UART_DEV_CONSOLE: 497 device_printf(dev, "console"); 498 break; 499 case UART_DEV_DBGPORT: 500 device_printf(dev, "debug port"); 501 break; 502 case UART_DEV_KEYBOARD: 503 device_printf(dev, "keyboard"); 504 break; 505 default: 506 device_printf(dev, "unknown system device"); 507 break; 508 } 509 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 510 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 511 sc->sc_sysdev->stopbits); 512 } 513 514 sc->sc_leaving = 0; 515 sc->sc_testintr = 1; 516 filt = uart_intr(sc); 517 sc->sc_testintr = 0; 518 519 /* 520 * Don't use interrupts if we couldn't clear any pending interrupt 521 * conditions. We may have broken H/W and polling is probably the 522 * safest thing to do. 523 */ 524 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) { 525 sc->sc_irid = 0; 526 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, 527 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); 528 } 529 if (sc->sc_ires != NULL) { 530 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, 531 uart_intr, NULL, sc, &sc->sc_icookie); 532 sc->sc_fastintr = (error == 0) ? 1 : 0; 533 534 if (!sc->sc_fastintr) 535 error = bus_setup_intr(dev, sc->sc_ires, 536 INTR_TYPE_TTY | INTR_MPSAFE, NULL, 537 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 538 539 if (error) { 540 device_printf(dev, "could not activate interrupt\n"); 541 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 542 sc->sc_ires); 543 sc->sc_ires = NULL; 544 } 545 } 546 if (sc->sc_ires == NULL) { 547 /* No interrupt resource. Force polled mode. */ 548 sc->sc_polled = 1; 549 callout_init(&sc->sc_timer, 1); 550 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 551 (timeout_t *)uart_intr, sc); 552 } 553 554 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 555 sep = ""; 556 device_print_prettyname(dev); 557 if (sc->sc_fastintr) { 558 printf("%sfast interrupt", sep); 559 sep = ", "; 560 } 561 if (sc->sc_polled) { 562 printf("%spolled mode (%dHz)", sep, uart_poll_freq); 563 sep = ", "; 564 } 565 printf("\n"); 566 } 567 568 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) { 569 if ((error = sc->sc_sysdev->attach(sc)) != 0) 570 goto fail; 571 } else { 572 if ((error = uart_tty_attach(sc)) != 0) 573 goto fail; 574 sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 575 sc->sc_pps.driver_mtx = uart_tty_getlock(sc); 576 sc->sc_pps.driver_abi = PPS_ABI_VERSION; 577 pps_init_abi(&sc->sc_pps); 578 } 579 580 if (sc->sc_sysdev != NULL) 581 sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 582 583 return (0); 584 585 fail: 586 free(sc->sc_txbuf, M_UART); 587 free(sc->sc_rxbuf, M_UART); 588 589 if (sc->sc_ires != NULL) { 590 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 591 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 592 sc->sc_ires); 593 } 594 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 595 596 mtx_destroy(&sc->sc_hwmtx_s); 597 598 return (error); 599} 600 601int 602uart_bus_detach(device_t dev) 603{ 604 struct uart_softc *sc; 605 606 sc = device_get_softc(dev); 607 608 sc->sc_leaving = 1; 609 610 if (sc->sc_sysdev != NULL) 611 sc->sc_sysdev->hwmtx = NULL; 612 613 UART_DETACH(sc); 614 615 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 616 (*sc->sc_sysdev->detach)(sc); 617 else 618 uart_tty_detach(sc); 619 620 free(sc->sc_txbuf, M_UART); 621 free(sc->sc_rxbuf, M_UART); 622 623 if (sc->sc_ires != NULL) { 624 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 625 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 626 sc->sc_ires); 627 } 628 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 629 630 mtx_destroy(&sc->sc_hwmtx_s); 631 632 if (sc->sc_class->size > sizeof(*sc)) { 633 device_set_softc(dev, NULL); 634 free(sc, M_UART); 635 } else 636 device_set_softc(dev, NULL); 637 638 return (0); 639} 640 641int 642uart_bus_resume(device_t dev) 643{ 644 struct uart_softc *sc; 645 646 sc = device_get_softc(dev); 647 return (UART_ATTACH(sc)); 648} 649 650void 651uart_grab(struct uart_devinfo *di) 652{ 653 654 if (di->sc) 655 UART_GRAB(di->sc); 656} 657 658void 659uart_ungrab(struct uart_devinfo *di) 660{ 661 662 if (di->sc) 663 UART_UNGRAB(di->sc); 664} 665