uart_core.c revision 178766
1/*-
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/uart/uart_core.c 178766 2008-05-04 23:29:38Z peter $");
29
30#ifndef KLD_MODULE
31#include "opt_comconsole.h"
32#endif
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/conf.h>
38#include <sys/cons.h>
39#include <sys/fcntl.h>
40#include <sys/interrupt.h>
41#include <sys/kdb.h>
42#include <sys/kernel.h>
43#include <sys/malloc.h>
44#include <sys/queue.h>
45#include <sys/reboot.h>
46#include <machine/bus.h>
47#include <sys/rman.h>
48#include <sys/termios.h>
49#include <sys/tty.h>
50#include <machine/resource.h>
51#include <machine/stdarg.h>
52
53#include <dev/uart/uart.h>
54#include <dev/uart/uart_bus.h>
55#include <dev/uart/uart_cpu.h>
56
57#include "uart_if.h"
58
59devclass_t uart_devclass;
60char uart_driver_name[] = "uart";
61
62SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
63    SLIST_HEAD_INITIALIZER(uart_sysdevs);
64
65MALLOC_DEFINE(M_UART, "UART", "UART driver");
66
67void
68uart_add_sysdev(struct uart_devinfo *di)
69{
70	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
71}
72
73const char *
74uart_getname(struct uart_class *uc)
75{
76	return ((uc != NULL) ? uc->name : NULL);
77}
78
79struct uart_ops *
80uart_getops(struct uart_class *uc)
81{
82	return ((uc != NULL) ? uc->uc_ops : NULL);
83}
84
85int
86uart_getrange(struct uart_class *uc)
87{
88	return ((uc != NULL) ? uc->uc_range : 0);
89}
90
91/*
92 * Schedule a soft interrupt. We do this on the 0 to !0 transition
93 * of the TTY pending interrupt status.
94 */
95static void
96uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
97{
98	uint32_t new, old;
99
100	do {
101		old = sc->sc_ttypend;
102		new = old | ipend;
103	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
104
105	if ((old & SER_INT_MASK) == 0)
106		swi_sched(sc->sc_softih, 0);
107}
108
109/*
110 * A break condition has been detected. We treat the break condition as
111 * a special case that should not happen during normal operation. When
112 * the break condition is to be passed to higher levels in the form of
113 * a NUL character, we really want the break to be in the right place in
114 * the input stream. The overhead to achieve that is not in relation to
115 * the exceptional nature of the break condition, so we permit ourselves
116 * to be sloppy.
117 */
118static __inline int
119uart_intr_break(void *arg)
120{
121	struct uart_softc *sc = arg;
122
123#if defined(KDB) && defined(BREAK_TO_DEBUGGER)
124	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
125		kdb_enter(KDB_WHY_BREAK, "Line break on console");
126		return (0);
127	}
128#endif
129	if (sc->sc_opened)
130		uart_sched_softih(sc, SER_INT_BREAK);
131	return (0);
132}
133
134/*
135 * Handle a receiver overrun situation. We lost at least 1 byte in the
136 * input stream and it's our job to contain the situation. We grab as
137 * much of the data we can, but otherwise flush the receiver FIFO to
138 * create some breathing room. The net effect is that we avoid the
139 * overrun condition to happen for the next X characters, where X is
140 * related to the FIFO size at the cost of loosing data right away.
141 * So, instead of having multiple overrun interrupts in close proximity
142 * to each other and possibly pessimizing UART interrupt latency for
143 * other UARTs in a multiport configuration, we create a longer segment
144 * of missing characters by freeing up the FIFO.
145 * Each overrun condition is marked in the input buffer by a token. The
146 * token represents the loss of at least one, but possible more bytes in
147 * the input stream.
148 */
149static __inline int
150uart_intr_overrun(void *arg)
151{
152	struct uart_softc *sc = arg;
153
154	if (sc->sc_opened) {
155		UART_RECEIVE(sc);
156		if (uart_rx_put(sc, UART_STAT_OVERRUN))
157			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
158		uart_sched_softih(sc, SER_INT_RXREADY);
159	}
160	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
161	return (0);
162}
163
164/*
165 * Received data ready.
166 */
167static __inline int
168uart_intr_rxready(void *arg)
169{
170	struct uart_softc *sc = arg;
171	int rxp;
172
173	rxp = sc->sc_rxput;
174	UART_RECEIVE(sc);
175#if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER)
176	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
177		while (rxp != sc->sc_rxput) {
178			int kdb_brk;
179
180			if ((kdb_brk = kdb_alt_break(sc->sc_rxbuf[rxp++],
181			    &sc->sc_altbrk)) != 0) {
182				switch (kdb_brk) {
183				case KDB_REQ_DEBUGGER:
184					kdb_enter(KDB_WHY_BREAK,
185					    "Break sequence on console");
186					break;
187				case KDB_REQ_PANIC:
188					kdb_panic("Panic sequence on console");
189					break;
190				case KDB_REQ_REBOOT:
191					kdb_reboot();
192					break;
193				}
194			}
195			if (rxp == sc->sc_rxbufsz)
196				rxp = 0;
197		}
198	}
199#endif
200	if (sc->sc_opened)
201		uart_sched_softih(sc, SER_INT_RXREADY);
202	else
203		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
204	return (1);
205}
206
207/*
208 * Line or modem status change (OOB signalling).
209 * We pass the signals to the software interrupt handler for further
210 * processing. Note that we merge the delta bits, but set the state
211 * bits. This is to avoid loosing state transitions due to having more
212 * than 1 hardware interrupt between software interrupts.
213 */
214static __inline int
215uart_intr_sigchg(void *arg)
216{
217	struct uart_softc *sc = arg;
218	int new, old, sig;
219
220	sig = UART_GETSIG(sc);
221
222	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
223		if (sig & UART_SIG_DPPS) {
224			pps_capture(&sc->sc_pps);
225			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
226			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
227		}
228	}
229
230	/*
231	 * Keep track of signal changes, even when the device is not
232	 * opened. This allows us to inform upper layers about a
233	 * possible loss of DCD and thus the existence of a (possibly)
234	 * different connection when we have DCD back, during the time
235	 * that the device was closed.
236	 */
237	do {
238		old = sc->sc_ttypend;
239		new = old & ~SER_MASK_STATE;
240		new |= sig & SER_INT_SIGMASK;
241	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
242
243	if (sc->sc_opened)
244		uart_sched_softih(sc, SER_INT_SIGCHG);
245	return (1);
246}
247
248/*
249 * The transmitter can accept more data.
250 */
251static __inline int
252uart_intr_txidle(void *arg)
253{
254	struct uart_softc *sc = arg;
255
256	if (sc->sc_txbusy) {
257		sc->sc_txbusy = 0;
258		uart_sched_softih(sc, SER_INT_TXIDLE);
259	}
260	return (0);
261}
262
263static int
264uart_intr(void *arg)
265{
266	struct uart_softc *sc = arg;
267	int flag = 0, ipend;
268
269	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
270		flag = 1;
271		if (ipend & SER_INT_OVERRUN)
272			uart_intr_overrun(sc);
273		if (ipend & SER_INT_BREAK)
274			uart_intr_break(sc);
275		if (ipend & SER_INT_RXREADY)
276			uart_intr_rxready(sc);
277		if (ipend & SER_INT_SIGCHG)
278			uart_intr_sigchg(sc);
279		if (ipend & SER_INT_TXIDLE)
280			uart_intr_txidle(sc);
281	}
282	return((flag)?FILTER_HANDLED:FILTER_STRAY);
283}
284
285serdev_intr_t *
286uart_bus_ihand(device_t dev, int ipend)
287{
288
289	switch (ipend) {
290	case SER_INT_BREAK:
291		return (uart_intr_break);
292	case SER_INT_OVERRUN:
293		return (uart_intr_overrun);
294	case SER_INT_RXREADY:
295		return (uart_intr_rxready);
296	case SER_INT_SIGCHG:
297		return (uart_intr_sigchg);
298	case SER_INT_TXIDLE:
299		return (uart_intr_txidle);
300	}
301	return (NULL);
302}
303
304int
305uart_bus_ipend(device_t dev)
306{
307	struct uart_softc *sc;
308
309	sc = device_get_softc(dev);
310	return (UART_IPEND(sc));
311}
312
313int
314uart_bus_sysdev(device_t dev)
315{
316	struct uart_softc *sc;
317
318	sc = device_get_softc(dev);
319	return ((sc->sc_sysdev != NULL) ? 1 : 0);
320}
321
322int
323uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
324{
325	struct uart_softc *sc;
326	struct uart_devinfo *sysdev;
327	int error;
328
329	sc = device_get_softc(dev);
330
331	/*
332	 * All uart_class references are weak. Check that the needed
333	 * class has been compiled-in. Fail if not.
334	 */
335	if (sc->sc_class == NULL)
336		return (ENXIO);
337
338	/*
339	 * Initialize the instance. Note that the instance (=softc) does
340	 * not necessarily match the hardware specific softc. We can't do
341	 * anything about it now, because we may not attach to the device.
342	 * Hardware drivers cannot use any of the class specific fields
343	 * while probing.
344	 */
345	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
346	sc->sc_dev = dev;
347	if (device_get_desc(dev) == NULL)
348		device_set_desc(dev, uart_getname(sc->sc_class));
349
350	/*
351	 * Allocate the register resource. We assume that all UARTs have
352	 * a single register window in either I/O port space or memory
353	 * mapped I/O space. Any UART that needs multiple windows will
354	 * consequently not be supported by this driver as-is. We try I/O
355	 * port space first because that's the common case.
356	 */
357	sc->sc_rrid = rid;
358	sc->sc_rtype = SYS_RES_IOPORT;
359	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
360	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
361	if (sc->sc_rres == NULL) {
362		sc->sc_rrid = rid;
363		sc->sc_rtype = SYS_RES_MEMORY;
364		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
365		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
366		    RF_ACTIVE);
367		if (sc->sc_rres == NULL)
368			return (ENXIO);
369	}
370
371	/*
372	 * Fill in the bus access structure and compare this device with
373	 * a possible console device and/or a debug port. We set the flags
374	 * in the softc so that the hardware dependent probe can adjust
375	 * accordingly. In general, you don't want to permanently disrupt
376	 * console I/O.
377	 */
378	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
379	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
380	sc->sc_bas.chan = chan;
381	sc->sc_bas.regshft = regshft;
382	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
383
384	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
385		if (chan == sysdev->bas.chan &&
386		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
387			/* XXX check if ops matches class. */
388			sc->sc_sysdev = sysdev;
389			sysdev->bas.rclk = sc->sc_bas.rclk;
390		}
391	}
392
393	error = UART_PROBE(sc);
394	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
395	return ((error) ? error : BUS_PROBE_DEFAULT);
396}
397
398int
399uart_bus_attach(device_t dev)
400{
401	struct uart_softc *sc, *sc0;
402	const char *sep;
403	int error;
404
405	/*
406	 * The sc_class field defines the type of UART we're going to work
407	 * with and thus the size of the softc. Replace the generic softc
408	 * with one that matches the UART now that we're certain we handle
409	 * the device.
410	 */
411	sc0 = device_get_softc(dev);
412	if (sc0->sc_class->size > sizeof(*sc)) {
413		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
414		bcopy(sc0, sc, sizeof(*sc));
415		device_set_softc(dev, sc);
416	} else
417		sc = sc0;
418
419	/*
420	 * Protect ourselves against interrupts while we're not completely
421	 * finished attaching and initializing. We don't expect interrupts
422	 * until after UART_ATTACH() though.
423	 */
424	sc->sc_leaving = 1;
425
426	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
427	if (sc->sc_hwmtx == NULL)
428		sc->sc_hwmtx = &sc->sc_hwmtx_s;
429
430	/*
431	 * Re-allocate. We expect that the softc contains the information
432	 * collected by uart_bus_probe() intact.
433	 */
434	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
435	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
436	if (sc->sc_rres == NULL) {
437		mtx_destroy(&sc->sc_hwmtx_s);
438		return (ENXIO);
439	}
440	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
441	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
442
443	sc->sc_irid = 0;
444	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
445	    RF_ACTIVE | RF_SHAREABLE);
446	if (sc->sc_ires != NULL) {
447		error = bus_setup_intr(dev,
448		    sc->sc_ires, INTR_TYPE_TTY,
449		    uart_intr, NULL, sc, &sc->sc_icookie);
450		if (error)
451			error = bus_setup_intr(dev,
452			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
453			    NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
454		else
455			sc->sc_fastintr = 1;
456
457		if (error) {
458			device_printf(dev, "could not activate interrupt\n");
459			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
460			    sc->sc_ires);
461			sc->sc_ires = NULL;
462		}
463	}
464	if (sc->sc_ires == NULL) {
465		/* XXX no interrupt resource. Force polled mode. */
466		sc->sc_polled = 1;
467	}
468
469	sc->sc_rxbufsz = IBUFSIZ;
470	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
471	    M_UART, M_WAITOK);
472	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
473	    M_UART, M_WAITOK);
474
475	error = UART_ATTACH(sc);
476	if (error)
477		goto fail;
478
479	if (sc->sc_hwiflow || sc->sc_hwoflow) {
480		sep = "";
481		device_print_prettyname(dev);
482		if (sc->sc_hwiflow) {
483			printf("%sRTS iflow", sep);
484			sep = ", ";
485		}
486		if (sc->sc_hwoflow) {
487			printf("%sCTS oflow", sep);
488			sep = ", ";
489		}
490		printf("\n");
491	}
492
493	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
494		sep = "";
495		device_print_prettyname(dev);
496		if (sc->sc_fastintr) {
497			printf("%sfast interrupt", sep);
498			sep = ", ";
499		}
500		if (sc->sc_polled) {
501			printf("%spolled mode", sep);
502			sep = ", ";
503		}
504		printf("\n");
505	}
506
507	if (sc->sc_sysdev != NULL) {
508		if (sc->sc_sysdev->baudrate == 0) {
509			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
510			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
511				sc->sc_sysdev->baudrate = -1;
512		}
513		switch (sc->sc_sysdev->type) {
514		case UART_DEV_CONSOLE:
515			device_printf(dev, "console");
516			break;
517		case UART_DEV_DBGPORT:
518			device_printf(dev, "debug port");
519			break;
520		case UART_DEV_KEYBOARD:
521			device_printf(dev, "keyboard");
522			break;
523		default:
524			device_printf(dev, "unknown system device");
525			break;
526		}
527		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
528		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
529		    sc->sc_sysdev->stopbits);
530	}
531
532	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
533	pps_init(&sc->sc_pps);
534
535	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
536	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
537	if (error)
538		goto fail;
539
540	if (sc->sc_sysdev != NULL)
541		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
542
543	sc->sc_leaving = 0;
544	uart_intr(sc);
545	return (0);
546
547 fail:
548	free(sc->sc_txbuf, M_UART);
549	free(sc->sc_rxbuf, M_UART);
550
551	if (sc->sc_ires != NULL) {
552		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
553		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
554		    sc->sc_ires);
555	}
556	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
557
558	mtx_destroy(&sc->sc_hwmtx_s);
559
560	return (error);
561}
562
563int
564uart_bus_detach(device_t dev)
565{
566	struct uart_softc *sc;
567
568	sc = device_get_softc(dev);
569
570	sc->sc_leaving = 1;
571
572	if (sc->sc_sysdev != NULL)
573		sc->sc_sysdev->hwmtx = NULL;
574
575	UART_DETACH(sc);
576
577	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
578		(*sc->sc_sysdev->detach)(sc);
579	else
580		uart_tty_detach(sc);
581
582	free(sc->sc_txbuf, M_UART);
583	free(sc->sc_rxbuf, M_UART);
584
585	if (sc->sc_ires != NULL) {
586		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
587		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
588		    sc->sc_ires);
589	}
590	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
591
592	mtx_destroy(&sc->sc_hwmtx_s);
593
594	if (sc->sc_class->size > sizeof(*sc)) {
595		device_set_softc(dev, NULL);
596		free(sc, M_UART);
597	} else
598		device_set_softc(dev, NULL);
599
600	return (0);
601}
602