es137x.c revision 70291
12116Sjkh/* 22116Sjkh * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 32116Sjkh * boards based on the ES1370, ES1371 and ES1373 chips. 42116Sjkh * 52116Sjkh * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 62116Sjkh * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 72116Sjkh * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 82116Sjkh * 92116Sjkh * Redistribution and use in source and binary forms, with or without 102116Sjkh * modification, are permitted provided that the following conditions 118870Srgrimes * are met: 122116Sjkh * 132116Sjkh * 1. Redistributions of source code must retain the above copyright 142116Sjkh * notice, this list of conditions and the following disclaimer. 152116Sjkh * 162116Sjkh * 2. Redistributions in binary form must reproduce the above copyright 1750476Speter * notice, this list of conditions and the following disclaimer in 182116Sjkh * the documentation and/or other materials provided with the 192116Sjkh * distribution. 202116Sjkh * 212116Sjkh * 3. All advertising materials mentioning features or use of this 222116Sjkh * software must display the following acknowledgement: 238870Srgrimes * This product includes software developed by Joachim Kuebart. 242116Sjkh * 258870Srgrimes * 4. The name of the author may not be used to endorse or promote 262116Sjkh * products derived from this software without specific prior 272116Sjkh * written permission. 282116Sjkh * 292116Sjkh * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 302116Sjkh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 312116Sjkh * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 322116Sjkh * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 332116Sjkh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 342116Sjkh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 352116Sjkh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 362116Sjkh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 372116Sjkh * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 382116Sjkh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 392116Sjkh * OF THE POSSIBILITY OF SUCH DAMAGE. 402116Sjkh * 412116Sjkh * $FreeBSD: head/sys/dev/sound/pci/es137x.c 70291 2000-12-23 03:16:13Z cg $ 422116Sjkh */ 432116Sjkh 442116Sjkh/* 452116Sjkh * Part of this code was heavily inspired by the linux driver from 462116Sjkh * Thomas Sailer (sailer@ife.ee.ethz.ch) 472116Sjkh * Just about everything has been touched and reworked in some way but 482116Sjkh * the all the underlying sequences/timing/register values are from 492116Sjkh * Thomas' code. 502116Sjkh * 512116Sjkh*/ 522116Sjkh 532116Sjkh#include <dev/sound/pcm/sound.h> 542116Sjkh#include <dev/sound/pcm/ac97.h> 552116Sjkh#include <dev/sound/pci/es137x.h> 562116Sjkh 572116Sjkh#include <pci/pcireg.h> 582116Sjkh#include <pci/pcivar.h> 592116Sjkh 602116Sjkh#include <sys/sysctl.h> 612116Sjkh 622116Sjkh#include "mixer_if.h" 632116Sjkh 642116Sjkhstatic int debug = 0; 652116SjkhSYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 662116Sjkh 672116Sjkh#define MEM_MAP_REG 0x14 682116Sjkh 692116Sjkh/* PCI IDs of supported chips */ 702116Sjkh#define ES1370_PCI_ID 0x50001274 712116Sjkh#define ES1371_PCI_ID 0x13711274 722116Sjkh#define ES1371_PCI_ID2 0x13713274 732116Sjkh#define ES1371_PCI_ID3 0x58801274 742116Sjkh 752116Sjkh#define ES_BUFFSIZE 4096 762116Sjkh 772116Sjkh/* device private data */ 782116Sjkhstruct es_info; 792116Sjkh 802116Sjkhstruct es_chinfo { 812116Sjkh struct es_info *parent; 822116Sjkh pcm_channel *channel; 832116Sjkh snd_dbuf *buffer; 842116Sjkh int dir, num; 852116Sjkh u_int32_t fmt; 868870Srgrimes}; 872116Sjkh 882116Sjkhstruct es_info { 892116Sjkh bus_space_tag_t st; 902116Sjkh bus_space_handle_t sh; 912116Sjkh bus_dma_tag_t parent_dmat; 922116Sjkh 932116Sjkh struct resource *reg, *irq; 942116Sjkh int regtype, regid, irqid; 952116Sjkh void *ih; 962116Sjkh 972116Sjkh device_t dev; 982116Sjkh int num; 992116Sjkh /* Contents of board's registers */ 1002116Sjkh u_long ctrl; 1012116Sjkh u_long sctrl; 102 struct es_chinfo pch, rch; 103}; 104 105/* -------------------------------------------------------------------- */ 106 107/* prototypes */ 108static void es_intr(void *); 109 110static u_int es1371_wait_src_ready(struct es_info *); 111static void es1371_src_write(struct es_info *, u_short, unsigned short); 112static u_int es1371_adc_rate(struct es_info *, u_int, int); 113static u_int es1371_dac_rate(struct es_info *, u_int, int); 114static int es1371_init(struct es_info *es, int); 115static int es1370_init(struct es_info *); 116static int es1370_wrcodec(struct es_info *, u_char, u_char); 117 118static u_int32_t es_playfmt[] = { 119 AFMT_U8, 120 AFMT_STEREO | AFMT_U8, 121 AFMT_S16_LE, 122 AFMT_STEREO | AFMT_S16_LE, 123 0 124}; 125static pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 126 127static u_int32_t es_recfmt[] = { 128 AFMT_U8, 129 AFMT_STEREO | AFMT_U8, 130 AFMT_S16_LE, 131 AFMT_STEREO | AFMT_S16_LE, 132 0 133}; 134static pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 135 136static const struct { 137 unsigned volidx:4; 138 unsigned left:4; 139 unsigned right:4; 140 unsigned stereo:1; 141 unsigned recmask:13; 142 unsigned avail:1; 143} mixtable[SOUND_MIXER_NRDEVICES] = { 144 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 145 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 146 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 147 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 148 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 149 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 150 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 151 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 152 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 153 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 154}; 155 156/* -------------------------------------------------------------------- */ 157/* The es1370 mixer interface */ 158 159static int 160es1370_mixinit(snd_mixer *m) 161{ 162 int i; 163 u_int32_t v; 164 165 v = 0; 166 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 167 if (mixtable[i].avail) v |= (1 << i); 168 mix_setdevs(m, v); 169 v = 0; 170 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 171 if (mixtable[i].recmask) v |= (1 << i); 172 mix_setrecdevs(m, v); 173 return 0; 174} 175 176static int 177es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 178{ 179 int l, r, rl, rr; 180 181 if (!mixtable[dev].avail) return -1; 182 l = left; 183 r = mixtable[dev].stereo? right : l; 184 if (mixtable[dev].left == 0xf) { 185 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 186 } else { 187 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 188 } 189 if (mixtable[dev].stereo) { 190 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 191 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 192 } 193 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 194 return l | (r << 8); 195} 196 197static int 198es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 199{ 200 int i, j = 0; 201 202 if (src == 0) src = 1 << SOUND_MIXER_MIC; 203 src &= mix_getrecdevs(m); 204 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 205 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 206 207 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 208 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 209 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 210 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 211 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 212 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 213 return src; 214} 215 216static kobj_method_t es1370_mixer_methods[] = { 217 KOBJMETHOD(mixer_init, es1370_mixinit), 218 KOBJMETHOD(mixer_set, es1370_mixset), 219 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 220 { 0, 0 } 221}; 222MIXER_DECLARE(es1370_mixer); 223 224/* -------------------------------------------------------------------- */ 225 226static int 227es1370_wrcodec(struct es_info *es, u_char i, u_char data) 228{ 229 int wait = 100; /* 100 msec timeout */ 230 231 do { 232 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 233 STAT_CSTAT) == 0) { 234 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 235 ((u_short)i << CODEC_INDEX_SHIFT) | data); 236 return 0; 237 } 238 DELAY(1000); 239 } while (--wait); 240 printf("pcm: es1370_wrcodec timed out\n"); 241 return -1; 242} 243 244/* -------------------------------------------------------------------- */ 245 246/* channel interface */ 247static void * 248eschan_init(kobj_t obj, void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 249{ 250 struct es_info *es = devinfo; 251 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 252 253 ch->parent = es; 254 ch->channel = c; 255 ch->buffer = b; 256 ch->num = ch->parent->num++; 257 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ES_BUFFSIZE) == -1) return NULL; 258 return ch; 259} 260 261static int 262eschan_setdir(kobj_t obj, void *data, int dir) 263{ 264 struct es_chinfo *ch = data; 265 struct es_info *es = ch->parent; 266 267 if (dir == PCMDIR_PLAY) { 268 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 269 ES1370_REG_DAC2_FRAMEADR >> 8); 270 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 271 vtophys(sndbuf_getbuf(ch->buffer))); 272 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 273 (sndbuf_getsize(ch->buffer) >> 2) - 1); 274 } else { 275 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 276 ES1370_REG_ADC_FRAMEADR >> 8); 277 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 278 vtophys(sndbuf_getbuf(ch->buffer))); 279 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 280 (sndbuf_getsize(ch->buffer) >> 2) - 1); 281 } 282 ch->dir = dir; 283 return 0; 284} 285 286static int 287eschan_setformat(kobj_t obj, void *data, u_int32_t format) 288{ 289 struct es_chinfo *ch = data; 290 struct es_info *es = ch->parent; 291 292 if (ch->dir == PCMDIR_PLAY) { 293 es->sctrl &= ~SCTRL_P2FMT; 294 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 295 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 296 } else { 297 es->sctrl &= ~SCTRL_R1FMT; 298 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 299 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 300 } 301 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 302 ch->fmt = format; 303 return 0; 304} 305 306static int 307eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 308{ 309 struct es_chinfo *ch = data; 310 struct es_info *es = ch->parent; 311 312 es->ctrl &= ~CTRL_PCLKDIV; 313 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 314 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 315 /* rec/play speeds locked together - should indicate in flags */ 316 return speed; /* XXX calc real speed */ 317} 318 319static int 320eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 321{ 322 struct es_chinfo *ch = data; 323 struct es_info *es = ch->parent; 324 325 if (ch->dir == PCMDIR_PLAY) { 326 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 327 } else { 328 return es1371_adc_rate(es, speed, 1); /* record */ 329 } 330} 331 332static int 333eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 334{ 335 return blocksize; 336} 337 338static int 339eschan_trigger(kobj_t obj, void *data, int go) 340{ 341 struct es_chinfo *ch = data; 342 struct es_info *es = ch->parent; 343 unsigned ss, cnt; 344 345 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 346 return 0; 347 348 cnt = (sndbuf_runsz(ch->buffer) / sndbuf_getbps(ch->buffer)) - 1; 349 350 if (ch->dir == PCMDIR_PLAY) { 351 if (go == PCMTRIG_START) { 352 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 353 es->ctrl |= CTRL_DAC2_EN; 354 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 355 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 356 SCTRL_P2DACSEN); 357 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 358 bus_space_write_4(es->st, es->sh, 359 ES1370_REG_DAC2_SCOUNT, cnt); 360 /* start at beginning of buffer */ 361 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 362 ES1370_REG_DAC2_FRAMECNT >> 8); 363 bus_space_write_4(es->st, es->sh, 364 ES1370_REG_DAC2_FRAMECNT & 0xff, 365 (sndbuf_getsize(ch->buffer) >> 2) - 1); 366 } else es->ctrl &= ~CTRL_DAC2_EN; 367 } else { 368 if (go == PCMTRIG_START) { 369 es->ctrl |= CTRL_ADC_EN; 370 es->sctrl &= ~SCTRL_R1LOOPSEL; 371 es->sctrl |= SCTRL_R1INTEN; 372 bus_space_write_4(es->st, es->sh, 373 ES1370_REG_ADC_SCOUNT, cnt); 374 /* start at beginning of buffer */ 375 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 376 ES1370_REG_ADC_FRAMECNT >> 8); 377 bus_space_write_4(es->st, es->sh, 378 ES1370_REG_ADC_FRAMECNT & 0xff, 379 (sndbuf_getsize(ch->buffer) >> 2) - 1); 380 } else es->ctrl &= ~CTRL_ADC_EN; 381 } 382 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 383 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 384 return 0; 385} 386 387static int 388eschan_getptr(kobj_t obj, void *data) 389{ 390 struct es_chinfo *ch = data; 391 struct es_info *es = ch->parent; 392 u_int32_t reg, cnt; 393 394 if (ch->dir == PCMDIR_PLAY) 395 reg = ES1370_REG_DAC2_FRAMECNT; 396 else 397 reg = ES1370_REG_ADC_FRAMECNT; 398 399 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 400 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 401 /* cnt is longwords */ 402 return cnt << 2; 403} 404 405static pcmchan_caps * 406eschan_getcaps(kobj_t obj, void *data) 407{ 408 struct es_chinfo *ch = data; 409 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 410} 411 412static kobj_method_t eschan1370_methods[] = { 413 KOBJMETHOD(channel_init, eschan_init), 414 KOBJMETHOD(channel_setdir, eschan_setdir), 415 KOBJMETHOD(channel_setformat, eschan_setformat), 416 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 417 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 418 KOBJMETHOD(channel_trigger, eschan_trigger), 419 KOBJMETHOD(channel_getptr, eschan_getptr), 420 KOBJMETHOD(channel_getcaps, eschan_getcaps), 421 { 0, 0 } 422}; 423CHANNEL_DECLARE(eschan1370); 424 425static kobj_method_t eschan1371_methods[] = { 426 KOBJMETHOD(channel_init, eschan_init), 427 KOBJMETHOD(channel_setdir, eschan_setdir), 428 KOBJMETHOD(channel_setformat, eschan_setformat), 429 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 430 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 431 KOBJMETHOD(channel_trigger, eschan_trigger), 432 KOBJMETHOD(channel_getptr, eschan_getptr), 433 KOBJMETHOD(channel_getcaps, eschan_getcaps), 434 { 0, 0 } 435}; 436CHANNEL_DECLARE(eschan1371); 437 438/* -------------------------------------------------------------------- */ 439/* The interrupt handler */ 440static void 441es_intr(void *p) 442{ 443 struct es_info *es = p; 444 unsigned intsrc, sctrl; 445 446 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 447 if ((intsrc & STAT_INTR) == 0) return; 448 449 sctrl = es->sctrl; 450 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 451 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 452 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 453 454 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 455 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 456 457 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 458 if (intsrc & STAT_DAC1); 459 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 460} 461 462/* ES1370 specific */ 463static int 464es1370_init(struct es_info *es) 465{ 466 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 467 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 468 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 469 470 es->sctrl = 0; 471 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 472 473 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 474 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 475 * {LR,B}CLK2 and run off the LRCLK2 476 * PLL; program DAC_SYNC=0! */ 477 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 478 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 479 480 return 0; 481} 482 483/* ES1371 specific */ 484int 485es1371_init(struct es_info *es, int rev) 486{ 487 int idx; 488 489 if (debug > 0) printf("es_init\n"); 490 491 es->num = 0; 492 es->ctrl = 0; 493 es->sctrl = 0; 494 /* initialize the chips */ 495 if (rev == 7 || rev >= 9 || rev == 2) { 496#define ES1371_BINTSUMM_OFF 0x07 497 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 498 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 499 } else { /* pre ac97 2.1 card */ 500 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 501 if (debug > 0) printf("es_init pre ac97 2.1\n"); 502 } 503 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 504 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 505 /* AC'97 warm reset to start the bitclk */ 506 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 507 DELAY(2000); 508 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 509 /* Init the sample rate converter */ 510 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 511 for (idx = 0; idx < 0x80; idx++) 512 es1371_src_write(es, idx, 0); 513 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 514 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 515 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 516 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 517 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 518 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 519 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 520 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 521 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 522 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 523 es1371_adc_rate (es, 22050, 1); 524 es1371_dac_rate (es, 22050, 1); 525 es1371_dac_rate (es, 22050, 2); 526 /* WARNING: 527 * enabling the sample rate converter without properly programming 528 * its parameters causes the chip to lock up (the SRC busy bit will 529 * be stuck high, and I've found no way to rectify this other than 530 * power cycle) 531 */ 532 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 533 534 return (0); 535} 536 537/* -------------------------------------------------------------------- */ 538 539static int 540es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 541{ 542 int sl; 543 unsigned t, x; 544 struct es_info *es = (struct es_info*)s; 545 546 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 547 548 for (t = 0; t < 0x1000; t++) 549 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 550 break; 551 sl = spltty(); 552 /* save the current state for later */ 553 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 554 /* enable SRC state data in SRC mux */ 555 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 556 (es1371_wait_src_ready(s) & 557 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 558 /* wait for a SAFE time to write addr/data and then do it, dammit */ 559 for (t = 0; t < 0x1000; t++) 560 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 561 break; 562 563 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 564 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 565 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 566 567 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 568 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 569 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 570 /* restore SRC reg */ 571 es1371_wait_src_ready(s); 572 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 573 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 574 splx(sl); 575 576 return 0; 577} 578 579static int 580es1371_rdcd(kobj_t obj, void *s, int addr) 581{ 582 int sl; 583 unsigned t, x; 584 struct es_info *es = (struct es_info *)s; 585 586 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 587 588 for (t = 0; t < 0x1000; t++) 589 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 590 break; 591 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 592 593 sl = spltty(); 594 595 /* save the current state for later */ 596 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 597 /* enable SRC state data in SRC mux */ 598 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 599 (es1371_wait_src_ready(s) & 600 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 601 /* wait for a SAFE time to write addr/data and then do it, dammit */ 602 for (t = 0; t < 0x5000; t++) 603 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 604 break; 605 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 606 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 607 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 608 609 /* restore SRC reg */ 610 es1371_wait_src_ready(s); 611 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 612 613 splx(sl); 614 615 /* now wait for the stinkin' data (RDY) */ 616 for (t = 0; t < 0x1000; t++) 617 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 618 break; 619 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 620 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 621} 622 623static kobj_method_t es1371_ac97_methods[] = { 624 KOBJMETHOD(ac97_read, es1371_rdcd), 625 KOBJMETHOD(ac97_write, es1371_wrcd), 626 { 0, 0 } 627}; 628AC97_DECLARE(es1371_ac97); 629 630/* -------------------------------------------------------------------- */ 631 632static u_int 633es1371_src_read(struct es_info *es, u_short reg) 634{ 635 unsigned int r; 636 637 r = es1371_wait_src_ready(es) & 638 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 639 r |= ES1371_SRC_RAM_ADDRO(reg); 640 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 641 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 642} 643 644static void 645es1371_src_write(struct es_info *es, u_short reg, u_short data){ 646 u_int r; 647 648 r = es1371_wait_src_ready(es) & 649 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 650 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 651 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 652 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 653} 654 655static u_int 656es1371_adc_rate(struct es_info *es, u_int rate, int set) 657{ 658 u_int n, truncm, freq, result; 659 660 if (rate > 48000) rate = 48000; 661 if (rate < 4000) rate = 4000; 662 n = rate / 3000; 663 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 664 n--; 665 truncm = (21 * n - 1) | 1; 666 freq = ((48000UL << 15) / rate) * n; 667 result = (48000UL << 15) / (freq / n); 668 if (set) { 669 if (rate >= 24000) { 670 if (truncm > 239) truncm = 239; 671 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 672 (((239 - truncm) >> 1) << 9) | (n << 4)); 673 } else { 674 if (truncm > 119) truncm = 119; 675 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 676 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 677 } 678 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 679 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 680 0x00ff) | ((freq >> 5) & 0xfc00)); 681 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 682 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 683 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 684 } 685 return result; 686} 687 688static u_int 689es1371_dac_rate(struct es_info *es, u_int rate, int set) 690{ 691 u_int freq, r, result, dac, dis; 692 693 if (rate > 48000) rate = 48000; 694 if (rate < 4000) rate = 4000; 695 freq = (rate << 15) / 3000; 696 result = (freq * 3000) >> 15; 697 if (set) { 698 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 699 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 700 701 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 702 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 703 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 704 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 705 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 706 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 707 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 708 } 709 return result; 710} 711 712static u_int 713es1371_wait_src_ready(struct es_info *es) 714{ 715 u_int t, r; 716 717 for (t = 0; t < 500; t++) { 718 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 719 return r; 720 DELAY(1000); 721 } 722 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 723 return 0; 724} 725 726/* -------------------------------------------------------------------- */ 727 728/* 729 * Probe and attach the card 730 */ 731 732static int 733es_pci_probe(device_t dev) 734{ 735 if (pci_get_devid(dev) == ES1370_PCI_ID) { 736 device_set_desc(dev, "AudioPCI ES1370"); 737 return 0; 738 } else if (pci_get_devid(dev) == ES1371_PCI_ID || 739 pci_get_devid(dev) == ES1371_PCI_ID2 || 740 pci_get_devid(dev) == ES1371_PCI_ID3) { 741 device_set_desc(dev, "AudioPCI ES1371"); 742 return 0; 743 } 744 return ENXIO; 745} 746 747static int 748es_pci_attach(device_t dev) 749{ 750 u_int32_t data; 751 struct es_info *es = 0; 752 int mapped; 753 char status[SND_STATUSLEN]; 754 struct ac97_info *codec = 0; 755 kobj_class_t ct = NULL; 756 757 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 758 device_printf(dev, "cannot allocate softc\n"); 759 return ENXIO; 760 } 761 bzero(es, sizeof *es); 762 763 es->dev = dev; 764 mapped = 0; 765 data = pci_read_config(dev, PCIR_COMMAND, 2); 766 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 767 pci_write_config(dev, PCIR_COMMAND, data, 2); 768 data = pci_read_config(dev, PCIR_COMMAND, 2); 769 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 770 es->regid = MEM_MAP_REG; 771 es->regtype = SYS_RES_MEMORY; 772 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 773 0, ~0, 1, RF_ACTIVE); 774 if (es->reg) { 775 es->st = rman_get_bustag(es->reg); 776 es->sh = rman_get_bushandle(es->reg); 777 mapped++; 778 } 779 } 780 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 781 es->regid = PCIR_MAPS; 782 es->regtype = SYS_RES_IOPORT; 783 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 784 0, ~0, 1, RF_ACTIVE); 785 if (es->reg) { 786 es->st = rman_get_bustag(es->reg); 787 es->sh = rman_get_bushandle(es->reg); 788 mapped++; 789 } 790 } 791 if (mapped == 0) { 792 device_printf(dev, "unable to map register space\n"); 793 goto bad; 794 } 795 796 if (pci_get_devid(dev) == ES1371_PCI_ID || 797 pci_get_devid(dev) == ES1371_PCI_ID2 || 798 pci_get_devid(dev) == ES1371_PCI_ID3) { 799 if(-1 == es1371_init(es, pci_get_revid(dev))) { 800 device_printf(dev, "unable to initialize the card\n"); 801 goto bad; 802 } 803 codec = AC97_CREATE(dev, es, es1371_ac97); 804 if (codec == NULL) goto bad; 805 /* our init routine does everything for us */ 806 /* set to NULL; flag mixer_init not to run the ac97_init */ 807 /* ac97_mixer.init = NULL; */ 808 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad; 809 ct = &eschan1371_class; 810 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 811 if (-1 == es1370_init(es)) { 812 device_printf(dev, "unable to initialize the card\n"); 813 goto bad; 814 } 815 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad; 816 ct = &eschan1370_class; 817 } else goto bad; 818 819 es->irqid = 0; 820 es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid, 821 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 822 if (!es->irq 823 || bus_setup_intr(dev, es->irq, INTR_TYPE_TTY, es_intr, es, &es->ih)) { 824 device_printf(dev, "unable to map interrupt\n"); 825 goto bad; 826 } 827 828 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 829 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 830 /*highaddr*/BUS_SPACE_MAXADDR, 831 /*filter*/NULL, /*filterarg*/NULL, 832 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 833 /*flags*/0, &es->parent_dmat) != 0) { 834 device_printf(dev, "unable to create dma tag\n"); 835 goto bad; 836 } 837 838 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 839 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 840 rman_get_start(es->reg), rman_get_start(es->irq)); 841 842 if (pcm_register(dev, es, 1, 1)) goto bad; 843 pcm_addchan(dev, PCMDIR_REC, ct, es); 844 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 845 pcm_setstatus(dev, status); 846 847 return 0; 848 849 bad: 850 if (codec) ac97_destroy(codec); 851 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 852 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 853 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 854 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 855 if (es) free(es, M_DEVBUF); 856 return ENXIO; 857} 858 859static int 860es_pci_detach(device_t dev) 861{ 862 int r; 863 struct es_info *es; 864 865 r = pcm_unregister(dev); 866 if (r) 867 return r; 868 869 es = pcm_getdevinfo(dev); 870 bus_release_resource(dev, es->regtype, es->regid, es->reg); 871 bus_teardown_intr(dev, es->irq, es->ih); 872 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 873 bus_dma_tag_destroy(es->parent_dmat); 874 free(es, M_DEVBUF); 875 876 return 0; 877} 878 879static device_method_t es_methods[] = { 880 /* Device interface */ 881 DEVMETHOD(device_probe, es_pci_probe), 882 DEVMETHOD(device_attach, es_pci_attach), 883 DEVMETHOD(device_detach, es_pci_detach), 884 885 { 0, 0 } 886}; 887 888static driver_t es_driver = { 889 "pcm", 890 es_methods, 891 sizeof(snddev_info), 892}; 893 894static devclass_t pcm_devclass; 895 896DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 897MODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 898MODULE_VERSION(snd_es137x, 1); 899