es137x.c revision 62412
1/* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 62412 2000-07-02 14:17:41Z roberto $ 42 */ 43 44/* 45 * Part of this code was heavily inspired by the linux driver from 46 * Thomas Sailer (sailer@ife.ee.ethz.ch) 47 * Just about everything has been touched and reworked in some way but 48 * the all the underlying sequences/timing/register values are from 49 * Thomas' code. 50 * 51*/ 52 53#include <dev/sound/pcm/sound.h> 54#include <dev/sound/pcm/ac97.h> 55#include <dev/sound/pci/es137x.h> 56 57#include <pci/pcireg.h> 58#include <pci/pcivar.h> 59 60#include <sys/sysctl.h> 61 62static int debug = 0; 63SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 64 65#define MEM_MAP_REG 0x14 66 67/* PCI IDs of supported chips */ 68#define ES1370_PCI_ID 0x50001274 69#define ES1371_PCI_ID 0x13711274 70#define ES1371_PCI_ID2 0x13713274 71#define ES1371_PCI_ID3 0x58801274 72 73#define ES_BUFFSIZE 4096 74 75/* device private data */ 76struct es_info; 77 78struct es_chinfo { 79 struct es_info *parent; 80 pcm_channel *channel; 81 snd_dbuf *buffer; 82 int dir, num; 83 u_int32_t fmt; 84}; 85 86struct es_info { 87 bus_space_tag_t st; 88 bus_space_handle_t sh; 89 bus_dma_tag_t parent_dmat; 90 91 device_t dev; 92 int num; 93 /* Contents of board's registers */ 94 u_long ctrl; 95 u_long sctrl; 96 struct es_chinfo pch, rch; 97}; 98 99/* -------------------------------------------------------------------- */ 100 101/* prototypes */ 102static void es_intr(void *); 103 104static void es1371_wrcodec(void *, int, u_int32_t); 105static u_int32_t es1371_rdcodec(void *, int); 106static u_int es1371_wait_src_ready(struct es_info *); 107static void es1371_src_write(struct es_info *, u_short, unsigned short); 108static u_int es1371_adc_rate(struct es_info *, u_int, int); 109static u_int es1371_dac_rate(struct es_info *, u_int, int); 110static int es1371_init(struct es_info *es, int); 111static int es1370_init(struct es_info *); 112static int es1370_wrcodec(struct es_info *, u_char, u_char); 113 114/* channel interface */ 115static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 116static int eschan_setdir(void *data, int dir); 117static int eschan_setformat(void *data, u_int32_t format); 118static int eschan1370_setspeed(void *data, u_int32_t speed); 119static int eschan1371_setspeed(void *data, u_int32_t speed); 120static int eschan_setblocksize(void *data, u_int32_t blocksize); 121static int eschan_trigger(void *data, int go); 122static int eschan_getptr(void *data); 123static pcmchan_caps *eschan_getcaps(void *data); 124 125static pcmchan_caps es_playcaps = { 126 4000, 48000, 127 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 128 AFMT_STEREO | AFMT_S16_LE 129}; 130 131static pcmchan_caps es_reccaps = { 132 4000, 48000, 133 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 134 AFMT_STEREO | AFMT_S16_LE 135}; 136 137static pcm_channel es1370_chantemplate = { 138 eschan_init, 139 eschan_setdir, 140 eschan_setformat, 141 eschan1370_setspeed, 142 eschan_setblocksize, 143 eschan_trigger, 144 eschan_getptr, 145 eschan_getcaps, 146}; 147 148static pcm_channel es1371_chantemplate = { 149 eschan_init, 150 eschan_setdir, 151 eschan_setformat, 152 eschan1371_setspeed, 153 eschan_setblocksize, 154 eschan_trigger, 155 eschan_getptr, 156 eschan_getcaps, 157}; 158 159/* -------------------------------------------------------------------- */ 160 161/* The es1370 mixer interface */ 162 163static int es1370_mixinit(snd_mixer *m); 164static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 165static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 166 167static snd_mixer es1370_mixer = { 168 "AudioPCI 1370 mixer", 169 es1370_mixinit, 170 es1370_mixset, 171 es1370_mixsetrecsrc, 172}; 173 174static const struct { 175 unsigned volidx:4; 176 unsigned left:4; 177 unsigned right:4; 178 unsigned stereo:1; 179 unsigned recmask:13; 180 unsigned avail:1; 181} mixtable[SOUND_MIXER_NRDEVICES] = { 182 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 183 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 184 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 185 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 186 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 187 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 188 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 189 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 190 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 191 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 192}; 193 194static int 195es1370_mixinit(snd_mixer *m) 196{ 197 int i; 198 u_int32_t v; 199 200 v = 0; 201 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 202 if (mixtable[i].avail) v |= (1 << i); 203 mix_setdevs(m, v); 204 v = 0; 205 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 206 if (mixtable[i].recmask) v |= (1 << i); 207 mix_setrecdevs(m, v); 208 return 0; 209} 210 211static int 212es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 213{ 214 int l, r, rl, rr; 215 216 if (!mixtable[dev].avail) return -1; 217 l = left; 218 r = mixtable[dev].stereo? right : l; 219 if (mixtable[dev].left == 0xf) { 220 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 221 } else { 222 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 223 } 224 if (mixtable[dev].stereo) { 225 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 226 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 227 } 228 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 229 return l | (r << 8); 230} 231 232static int 233es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 234{ 235 int i, j = 0; 236 237 if (src == 0) src = 1 << SOUND_MIXER_MIC; 238 src &= mix_getrecdevs(m); 239 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 240 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 241 242 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 243 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 244 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 245 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 246 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 247 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 248 return src; 249} 250 251static int 252es1370_wrcodec(struct es_info *es, u_char i, u_char data) 253{ 254 int wait = 100; /* 100 msec timeout */ 255 256 do { 257 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 258 STAT_CSTAT) == 0) { 259 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 260 ((u_short)i << CODEC_INDEX_SHIFT) | data); 261 return 0; 262 } 263 DELAY(1000); 264 } while (--wait); 265 printf("pcm: es1370_wrcodec timed out\n"); 266 return -1; 267} 268 269/* -------------------------------------------------------------------- */ 270 271/* channel interface */ 272static void * 273eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 274{ 275 struct es_info *es = devinfo; 276 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 277 278 ch->parent = es; 279 ch->channel = c; 280 ch->buffer = b; 281 ch->buffer->bufsize = ES_BUFFSIZE; 282 ch->num = ch->parent->num++; 283 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 284 return ch; 285} 286 287static int 288eschan_setdir(void *data, int dir) 289{ 290 struct es_chinfo *ch = data; 291 struct es_info *es = ch->parent; 292 293 if (dir == PCMDIR_PLAY) { 294 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 295 ES1370_REG_DAC2_FRAMEADR >> 8); 296 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 297 vtophys(ch->buffer->buf)); 298 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 299 (ch->buffer->bufsize >> 2) - 1); 300 } else { 301 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 302 ES1370_REG_ADC_FRAMEADR >> 8); 303 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 304 vtophys(ch->buffer->buf)); 305 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 306 (ch->buffer->bufsize >> 2) - 1); 307 } 308 ch->dir = dir; 309 return 0; 310} 311 312static int 313eschan_setformat(void *data, u_int32_t format) 314{ 315 struct es_chinfo *ch = data; 316 struct es_info *es = ch->parent; 317 318 if (ch->dir == PCMDIR_PLAY) { 319 es->sctrl &= ~SCTRL_P2FMT; 320 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 321 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 322 } else { 323 es->sctrl &= ~SCTRL_R1FMT; 324 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 325 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 326 } 327 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 328 ch->fmt = format; 329 return 0; 330} 331 332static int 333eschan1370_setspeed(void *data, u_int32_t speed) 334{ 335 struct es_chinfo *ch = data; 336 struct es_info *es = ch->parent; 337 338 es->ctrl &= ~CTRL_PCLKDIV; 339 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 340 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 341 /* rec/play speeds locked together - should indicate in flags */ 342 return speed; /* XXX calc real speed */ 343} 344 345int 346eschan1371_setspeed(void *data, u_int32_t speed) 347{ 348 struct es_chinfo *ch = data; 349 struct es_info *es = ch->parent; 350 351 if (ch->dir == PCMDIR_PLAY) { 352 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 353 } else { 354 return es1371_adc_rate(es, speed, 1); /* record */ 355 } 356} 357 358static int 359eschan_setblocksize(void *data, u_int32_t blocksize) 360{ 361 return blocksize; 362} 363 364static int 365eschan_trigger(void *data, int go) 366{ 367 struct es_chinfo *ch = data; 368 struct es_info *es = ch->parent; 369 unsigned ss, cnt; 370 371 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 372 return 0; 373 374 ss = 1; 375 ss <<= (ch->fmt & AFMT_STEREO)? 1 : 0; 376 ss <<= (ch->fmt & AFMT_16BIT)? 1 : 0; 377 cnt = ch->buffer->dl / ss - 1; 378 379 if (ch->dir == PCMDIR_PLAY) { 380 if (go == PCMTRIG_START) { 381 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 382 es->ctrl |= CTRL_DAC2_EN; 383 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 384 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 385 SCTRL_P2DACSEN); 386 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 387 bus_space_write_4(es->st, es->sh, 388 ES1370_REG_DAC2_SCOUNT, cnt); 389 /* start at beginning of buffer */ 390 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 391 ES1370_REG_DAC2_FRAMECNT >> 8); 392 bus_space_write_4(es->st, es->sh, 393 ES1370_REG_DAC2_FRAMECNT & 0xff, 394 (ch->buffer->bufsize >> 2) - 1); 395 } else es->ctrl &= ~CTRL_DAC2_EN; 396 } else { 397 if (go == PCMTRIG_START) { 398 es->ctrl |= CTRL_ADC_EN; 399 es->sctrl &= ~SCTRL_R1LOOPSEL; 400 es->sctrl |= SCTRL_R1INTEN; 401 bus_space_write_4(es->st, es->sh, 402 ES1370_REG_ADC_SCOUNT, cnt); 403 /* start at beginning of buffer */ 404 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 405 ES1370_REG_ADC_FRAMECNT >> 8); 406 bus_space_write_4(es->st, es->sh, 407 ES1370_REG_ADC_FRAMECNT & 0xff, 408 (ch->buffer->bufsize >> 2) - 1); 409 } else es->ctrl &= ~CTRL_ADC_EN; 410 } 411 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 412 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 413 return 0; 414} 415 416static int 417eschan_getptr(void *data) 418{ 419 struct es_chinfo *ch = data; 420 struct es_info *es = ch->parent; 421 u_int32_t reg, cnt; 422 423 if (ch->dir == PCMDIR_PLAY) 424 reg = ES1370_REG_DAC2_FRAMECNT; 425 else 426 reg = ES1370_REG_ADC_FRAMECNT; 427 428 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 429 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 430 /* cnt is longwords */ 431 return cnt << 2; 432} 433 434static pcmchan_caps * 435eschan_getcaps(void *data) 436{ 437 struct es_chinfo *ch = data; 438 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 439} 440 441/* The interrupt handler */ 442static void 443es_intr(void *p) 444{ 445 struct es_info *es = p; 446 unsigned intsrc, sctrl; 447 448 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 449 if ((intsrc & STAT_INTR) == 0) return; 450 451 sctrl = es->sctrl; 452 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 453 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 454 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 455 456 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 457 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 458 459 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 460 if (intsrc & STAT_DAC1); 461 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 462} 463 464/* ES1370 specific */ 465static int 466es1370_init(struct es_info *es) 467{ 468 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 469 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 470 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 471 472 es->sctrl = 0; 473 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 474 475 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 476 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 477 * {LR,B}CLK2 and run off the LRCLK2 478 * PLL; program DAC_SYNC=0! */ 479 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 480 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 481 482 return 0; 483} 484 485/* ES1371 specific */ 486int 487es1371_init(struct es_info *es, int rev) 488{ 489 int idx; 490 491 if (debug > 0) printf("es_init\n"); 492 493 es->num = 0; 494 es->ctrl = 0; 495 es->sctrl = 0; 496 /* initialize the chips */ 497 if (rev == 7 || rev >= 9 || rev == 2) { 498#define ES1371_BINTSUMM_OFF 0x07 499 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 500 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 501 } else { /* pre ac97 2.1 card */ 502 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 503 if (debug > 0) printf("es_init pre ac97 2.1\n"); 504 } 505 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 506 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 507 /* AC'97 warm reset to start the bitclk */ 508 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 509 DELAY(2000); 510 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 511 /* Init the sample rate converter */ 512 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 513 for (idx = 0; idx < 0x80; idx++) 514 es1371_src_write(es, idx, 0); 515 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 516 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 517 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 518 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 519 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 520 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 521 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 522 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 523 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 524 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 525 es1371_adc_rate (es, 22050, 1); 526 es1371_dac_rate (es, 22050, 1); 527 es1371_dac_rate (es, 22050, 2); 528 /* WARNING: 529 * enabling the sample rate converter without properly programming 530 * its parameters causes the chip to lock up (the SRC busy bit will 531 * be stuck high, and I've found no way to rectify this other than 532 * power cycle) 533 */ 534 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 535 536 return (0); 537} 538 539static void 540es1371_wrcodec(void *s, int addr, u_int32_t data) 541{ 542 int sl; 543 unsigned t, x; 544 struct es_info *es = (struct es_info*)s; 545 546 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 547 548 for (t = 0; t < 0x1000; t++) 549 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 550 break; 551 sl = spltty(); 552 /* save the current state for later */ 553 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 554 /* enable SRC state data in SRC mux */ 555 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 556 (es1371_wait_src_ready(s) & 557 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 558 /* wait for a SAFE time to write addr/data and then do it, dammit */ 559 for (t = 0; t < 0x1000; t++) 560 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 561 break; 562 563 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 564 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 565 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 566 567 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 568 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 569 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 570 /* restore SRC reg */ 571 es1371_wait_src_ready(s); 572 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 573 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 574 splx(sl); 575} 576 577static u_int32_t 578es1371_rdcodec(void *s, int addr) 579{ 580 int sl; 581 unsigned t, x; 582 struct es_info *es = (struct es_info *)s; 583 584 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 585 586 for (t = 0; t < 0x1000; t++) 587 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 588 break; 589 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 590 591 sl = spltty(); 592 593 /* save the current state for later */ 594 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 595 /* enable SRC state data in SRC mux */ 596 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 597 (es1371_wait_src_ready(s) & 598 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 599 /* wait for a SAFE time to write addr/data and then do it, dammit */ 600 for (t = 0; t < 0x5000; t++) 601 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 602 break; 603 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 604 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 605 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 606 607 /* restore SRC reg */ 608 es1371_wait_src_ready(s); 609 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 610 611 splx(sl); 612 613 /* now wait for the stinkin' data (RDY) */ 614 for (t = 0; t < 0x1000; t++) 615 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 616 break; 617 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 618 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 619} 620 621static u_int 622es1371_src_read(struct es_info *es, u_short reg) 623{ 624 unsigned int r; 625 626 r = es1371_wait_src_ready(es) & 627 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 628 r |= ES1371_SRC_RAM_ADDRO(reg); 629 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 630 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 631} 632 633static void 634es1371_src_write(struct es_info *es, u_short reg, u_short data){ 635 u_int r; 636 637 r = es1371_wait_src_ready(es) & 638 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 639 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 640 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 641 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 642} 643 644static u_int 645es1371_adc_rate(struct es_info *es, u_int rate, int set) 646{ 647 u_int n, truncm, freq, result; 648 649 if (rate > 48000) rate = 48000; 650 if (rate < 4000) rate = 4000; 651 n = rate / 3000; 652 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 653 n--; 654 truncm = (21 * n - 1) | 1; 655 freq = ((48000UL << 15) / rate) * n; 656 result = (48000UL << 15) / (freq / n); 657 if (set) { 658 if (rate >= 24000) { 659 if (truncm > 239) truncm = 239; 660 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 661 (((239 - truncm) >> 1) << 9) | (n << 4)); 662 } else { 663 if (truncm > 119) truncm = 119; 664 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 665 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 666 } 667 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 668 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 669 0x00ff) | ((freq >> 5) & 0xfc00)); 670 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 671 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 672 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 673 } 674 return result; 675} 676 677static u_int 678es1371_dac_rate(struct es_info *es, u_int rate, int set) 679{ 680 u_int freq, r, result, dac, dis; 681 682 if (rate > 48000) rate = 48000; 683 if (rate < 4000) rate = 4000; 684 freq = (rate << 15) / 3000; 685 result = (freq * 3000) >> 15; 686 if (set) { 687 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 688 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 689 690 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 691 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 692 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 693 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 694 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 695 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 696 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 697 } 698 return result; 699} 700 701static u_int 702es1371_wait_src_ready(struct es_info *es) 703{ 704 u_int t, r; 705 706 for (t = 0; t < 500; t++) { 707 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 708 return r; 709 DELAY(1000); 710 } 711 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 712 return 0; 713} 714 715/* -------------------------------------------------------------------- */ 716 717/* 718 * Probe and attach the card 719 */ 720 721static int 722es_pci_probe(device_t dev) 723{ 724 if (pci_get_devid(dev) == ES1370_PCI_ID) { 725 device_set_desc(dev, "AudioPCI ES1370"); 726 return 0; 727 } else if (pci_get_devid(dev) == ES1371_PCI_ID || 728 pci_get_devid(dev) == ES1371_PCI_ID2 || 729 pci_get_devid(dev) == ES1371_PCI_ID3) { 730 device_set_desc(dev, "AudioPCI ES1371"); 731 return 0; 732 } 733 return ENXIO; 734} 735 736static int 737es_pci_attach(device_t dev) 738{ 739 snddev_info *d; 740 u_int32_t data; 741 struct es_info *es = 0; 742 int type = 0; 743 int regid; 744 struct resource *reg = 0; 745 int mapped; 746 int irqid; 747 struct resource *irq = 0; 748 void *ih = 0; 749 char status[SND_STATUSLEN]; 750 struct ac97_info *codec; 751 pcm_channel *ct = NULL; 752 753 d = device_get_softc(dev); 754 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 755 device_printf(dev, "cannot allocate softc\n"); 756 return ENXIO; 757 } 758 bzero(es, sizeof *es); 759 760 es->dev = dev; 761 mapped = 0; 762 data = pci_read_config(dev, PCIR_COMMAND, 2); 763 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 764 pci_write_config(dev, PCIR_COMMAND, data, 2); 765 data = pci_read_config(dev, PCIR_COMMAND, 2); 766 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 767 regid = MEM_MAP_REG; 768 type = SYS_RES_MEMORY; 769 reg = bus_alloc_resource(dev, type, ®id, 770 0, ~0, 1, RF_ACTIVE); 771 if (reg) { 772 es->st = rman_get_bustag(reg); 773 es->sh = rman_get_bushandle(reg); 774 mapped++; 775 } 776 } 777 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 778 regid = PCIR_MAPS; 779 type = SYS_RES_IOPORT; 780 reg = bus_alloc_resource(dev, type, ®id, 781 0, ~0, 1, RF_ACTIVE); 782 if (reg) { 783 es->st = rman_get_bustag(reg); 784 es->sh = rman_get_bushandle(reg); 785 mapped++; 786 } 787 } 788 if (mapped == 0) { 789 device_printf(dev, "unable to map register space\n"); 790 goto bad; 791 } 792 793 if (pci_get_devid(dev) == ES1371_PCI_ID || 794 pci_get_devid(dev) == ES1371_PCI_ID2 || 795 pci_get_devid(dev) == ES1371_PCI_ID3) { 796 if(-1 == es1371_init(es, pci_get_revid(dev))) { 797 device_printf(dev, "unable to initialize the card\n"); 798 goto bad; 799 } 800 codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec); 801 if (codec == NULL) goto bad; 802 /* our init routine does everything for us */ 803 /* set to NULL; flag mixer_init not to run the ac97_init */ 804 /* ac97_mixer.init = NULL; */ 805 if (mixer_init(d, &ac97_mixer, codec) == -1) goto bad; 806 ct = &es1371_chantemplate; 807 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 808 if (-1 == es1370_init(es)) { 809 device_printf(dev, "unable to initialize the card\n"); 810 goto bad; 811 } 812 mixer_init(d, &es1370_mixer, es); 813 ct = &es1370_chantemplate; 814 } else goto bad; 815 816 irqid = 0; 817 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 818 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 819 if (!irq 820 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 821 device_printf(dev, "unable to map interrupt\n"); 822 goto bad; 823 } 824 825 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 826 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 827 /*highaddr*/BUS_SPACE_MAXADDR, 828 /*filter*/NULL, /*filterarg*/NULL, 829 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 830 /*flags*/0, &es->parent_dmat) != 0) { 831 device_printf(dev, "unable to create dma tag\n"); 832 goto bad; 833 } 834 835 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 836 (type == SYS_RES_IOPORT)? "io" : "memory", 837 rman_get_start(reg), rman_get_start(irq)); 838 839 if (pcm_register(dev, es, 1, 1)) goto bad; 840 pcm_addchan(dev, PCMDIR_REC, ct, es); 841 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 842 pcm_setstatus(dev, status); 843 844 return 0; 845 846 bad: 847 if (es) free(es, M_DEVBUF); 848 if (reg) bus_release_resource(dev, type, regid, reg); 849 if (ih) bus_teardown_intr(dev, irq, ih); 850 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 851 return ENXIO; 852} 853 854static device_method_t es_methods[] = { 855 /* Device interface */ 856 DEVMETHOD(device_probe, es_pci_probe), 857 DEVMETHOD(device_attach, es_pci_attach), 858 859 { 0, 0 } 860}; 861 862static driver_t es_driver = { 863 "pcm", 864 es_methods, 865 sizeof(snddev_info), 866}; 867 868static devclass_t pcm_devclass; 869 870DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0); 871