es137x.c revision 70298
150724Scg/* 253413Sroger * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 353413Sroger * boards based on the ES1370, ES1371 and ES1373 chips. 450724Scg * 553413Sroger * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 650724Scg * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 750724Scg * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 850724Scg * 950724Scg * Redistribution and use in source and binary forms, with or without 1050724Scg * modification, are permitted provided that the following conditions 1150724Scg * are met: 1250724Scg * 1350724Scg * 1. Redistributions of source code must retain the above copyright 1450724Scg * notice, this list of conditions and the following disclaimer. 1550724Scg * 1650724Scg * 2. Redistributions in binary form must reproduce the above copyright 1750724Scg * notice, this list of conditions and the following disclaimer in 1850724Scg * the documentation and/or other materials provided with the 1950724Scg * distribution. 2050724Scg * 2150724Scg * 3. All advertising materials mentioning features or use of this 2250724Scg * software must display the following acknowledgement: 2350724Scg * This product includes software developed by Joachim Kuebart. 2450724Scg * 2550724Scg * 4. The name of the author may not be used to endorse or promote 2650724Scg * products derived from this software without specific prior 2750724Scg * written permission. 2850724Scg * 2950724Scg * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 3050724Scg * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 3150724Scg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 3250724Scg * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 3350724Scg * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 3450724Scg * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 3550724Scg * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3650724Scg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 3750724Scg * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3850724Scg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 3950724Scg * OF THE POSSIBILITY OF SUCH DAMAGE. 4050724Scg * 4150733Speter * $FreeBSD: head/sys/dev/sound/pci/es137x.c 70298 2000-12-23 05:19:32Z cg $ 4250724Scg */ 4350724Scg 4453413Sroger/* 4553413Sroger * Part of this code was heavily inspired by the linux driver from 4653413Sroger * Thomas Sailer (sailer@ife.ee.ethz.ch) 4754831Scg * Just about everything has been touched and reworked in some way but 4854831Scg * the all the underlying sequences/timing/register values are from 4953413Sroger * Thomas' code. 5053413Sroger * 5153413Sroger*/ 5253413Sroger 5353465Scg#include <dev/sound/pcm/sound.h> 5453465Scg#include <dev/sound/pcm/ac97.h> 5553465Scg#include <dev/sound/pci/es137x.h> 5650724Scg 5750724Scg#include <pci/pcireg.h> 5850724Scg#include <pci/pcivar.h> 5950724Scg 6053413Sroger#include <sys/sysctl.h> 6153413Sroger 6270134Scg#include "mixer_if.h" 6370134Scg 6453413Srogerstatic int debug = 0; 6553413SrogerSYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 6653413Sroger 6750724Scg#define MEM_MAP_REG 0x14 6850724Scg 6950724Scg/* PCI IDs of supported chips */ 7050724Scg#define ES1370_PCI_ID 0x50001274 7153413Sroger#define ES1371_PCI_ID 0x13711274 7256154Speter#define ES1371_PCI_ID2 0x13713274 7362412Sroberto#define ES1371_PCI_ID3 0x58801274 7450724Scg 7559019Scg#define ES_BUFFSIZE 4096 7659019Scg 7750724Scg/* device private data */ 7850724Scgstruct es_info; 7950724Scg 8055209Scgstruct es_chinfo { 8150724Scg struct es_info *parent; 8250724Scg pcm_channel *channel; 8350724Scg snd_dbuf *buffer; 8454831Scg int dir, num; 8550724Scg u_int32_t fmt; 8655209Scg}; 8750724Scg 8855209Scgstruct es_info { 8950724Scg bus_space_tag_t st; 9050724Scg bus_space_handle_t sh; 9150724Scg bus_dma_tag_t parent_dmat; 9250724Scg 9365644Scg struct resource *reg, *irq; 9465644Scg int regtype, regid, irqid; 9565644Scg void *ih; 9665644Scg 9759019Scg device_t dev; 9854831Scg int num; 9950724Scg /* Contents of board's registers */ 10050724Scg u_long ctrl; 10150724Scg u_long sctrl; 10250724Scg struct es_chinfo pch, rch; 10355209Scg}; 10450724Scg 10550724Scg/* -------------------------------------------------------------------- */ 10654831Scg 10753413Sroger/* prototypes */ 10854831Scgstatic void es_intr(void *); 10950724Scg 11055209Scgstatic u_int es1371_wait_src_ready(struct es_info *); 11155209Scgstatic void es1371_src_write(struct es_info *, u_short, unsigned short); 11255209Scgstatic u_int es1371_adc_rate(struct es_info *, u_int, int); 11355209Scgstatic u_int es1371_dac_rate(struct es_info *, u_int, int); 11455209Scgstatic int es1371_init(struct es_info *es, int); 11554831Scgstatic int es1370_init(struct es_info *); 11654831Scgstatic int es1370_wrcodec(struct es_info *, u_char, u_char); 11750724Scg 11864881Scgstatic u_int32_t es_playfmt[] = { 11964881Scg AFMT_U8, 12064881Scg AFMT_STEREO | AFMT_U8, 12164881Scg AFMT_S16_LE, 12264881Scg AFMT_STEREO | AFMT_S16_LE, 12364881Scg 0 12450724Scg}; 12564881Scgstatic pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 12650724Scg 12764881Scgstatic u_int32_t es_recfmt[] = { 12864881Scg AFMT_U8, 12964881Scg AFMT_STEREO | AFMT_U8, 13064881Scg AFMT_S16_LE, 13164881Scg AFMT_STEREO | AFMT_S16_LE, 13264881Scg 0 13350724Scg}; 13464881Scgstatic pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 13550724Scg 13650724Scgstatic const struct { 13750724Scg unsigned volidx:4; 13850724Scg unsigned left:4; 13950724Scg unsigned right:4; 14050724Scg unsigned stereo:1; 14150724Scg unsigned recmask:13; 14250724Scg unsigned avail:1; 14350724Scg} mixtable[SOUND_MIXER_NRDEVICES] = { 14450724Scg [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 14550724Scg [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 14650724Scg [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 14750724Scg [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 14850724Scg [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 14950724Scg [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 15050724Scg [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 15150724Scg [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 15250724Scg [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 15354831Scg [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 15454831Scg}; 15550724Scg 15670134Scg/* -------------------------------------------------------------------- */ 15770134Scg/* The es1370 mixer interface */ 15870134Scg 15950724Scgstatic int 16054831Scges1370_mixinit(snd_mixer *m) 16150724Scg{ 16250724Scg int i; 16350724Scg u_int32_t v; 16450724Scg 16550724Scg v = 0; 16650724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 16750724Scg if (mixtable[i].avail) v |= (1 << i); 16850724Scg mix_setdevs(m, v); 16950724Scg v = 0; 17050724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 17150724Scg if (mixtable[i].recmask) v |= (1 << i); 17250724Scg mix_setrecdevs(m, v); 17350724Scg return 0; 17450724Scg} 17550724Scg 17650724Scgstatic int 17754831Scges1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 17850724Scg{ 17950724Scg int l, r, rl, rr; 18050724Scg 18150724Scg if (!mixtable[dev].avail) return -1; 18250724Scg l = left; 18350724Scg r = mixtable[dev].stereo? right : l; 18450724Scg if (mixtable[dev].left == 0xf) { 18550724Scg rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 18650724Scg } else { 18750724Scg rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 18850724Scg } 18950724Scg if (mixtable[dev].stereo) { 19050724Scg rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 19154831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 19250724Scg } 19354831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 19450724Scg return l | (r << 8); 19550724Scg} 19650724Scg 19750724Scgstatic int 19854831Scges1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 19950724Scg{ 20050724Scg int i, j = 0; 20150724Scg 20250724Scg if (src == 0) src = 1 << SOUND_MIXER_MIC; 20350724Scg src &= mix_getrecdevs(m); 20450724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 20550724Scg if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 20650724Scg 20754831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 20854831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 20954831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 21054831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 21154831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 21254831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 21350724Scg return src; 21450724Scg} 21550724Scg 21670134Scgstatic kobj_method_t es1370_mixer_methods[] = { 21770134Scg KOBJMETHOD(mixer_init, es1370_mixinit), 21870134Scg KOBJMETHOD(mixer_set, es1370_mixset), 21970134Scg KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 22070134Scg { 0, 0 } 22170134Scg}; 22270134ScgMIXER_DECLARE(es1370_mixer); 22370134Scg 22470134Scg/* -------------------------------------------------------------------- */ 22570134Scg 22650724Scgstatic int 22754831Scges1370_wrcodec(struct es_info *es, u_char i, u_char data) 22850724Scg{ 22950724Scg int wait = 100; /* 100 msec timeout */ 23050724Scg 23150724Scg do { 23250724Scg if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 23350724Scg STAT_CSTAT) == 0) { 23450724Scg bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 23550724Scg ((u_short)i << CODEC_INDEX_SHIFT) | data); 23650724Scg return 0; 23750724Scg } 23850724Scg DELAY(1000); 23950724Scg } while (--wait); 24054831Scg printf("pcm: es1370_wrcodec timed out\n"); 24150724Scg return -1; 24250724Scg} 24350724Scg 24450724Scg/* -------------------------------------------------------------------- */ 24550724Scg 24650724Scg/* channel interface */ 24750724Scgstatic void * 24870134Scgeschan_init(kobj_t obj, void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 24950724Scg{ 25050724Scg struct es_info *es = devinfo; 25150724Scg struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 25250724Scg 25350724Scg ch->parent = es; 25450724Scg ch->channel = c; 25550724Scg ch->buffer = b; 25654831Scg ch->num = ch->parent->num++; 25770291Scg if (sndbuf_alloc(ch->buffer, es->parent_dmat, ES_BUFFSIZE) == -1) return NULL; 25850724Scg return ch; 25950724Scg} 26050724Scg 26150724Scgstatic int 26270134Scgeschan_setdir(kobj_t obj, void *data, int dir) 26350724Scg{ 26450724Scg struct es_chinfo *ch = data; 26550724Scg struct es_info *es = ch->parent; 26650724Scg 26750724Scg if (dir == PCMDIR_PLAY) { 26850724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 26950724Scg ES1370_REG_DAC2_FRAMEADR >> 8); 27050724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 27170291Scg vtophys(sndbuf_getbuf(ch->buffer))); 27250724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 27370291Scg (sndbuf_getsize(ch->buffer) >> 2) - 1); 27450724Scg } else { 27550724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 27650724Scg ES1370_REG_ADC_FRAMEADR >> 8); 27750724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 27870291Scg vtophys(sndbuf_getbuf(ch->buffer))); 27950724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 28070291Scg (sndbuf_getsize(ch->buffer) >> 2) - 1); 28150724Scg } 28250724Scg ch->dir = dir; 28350724Scg return 0; 28450724Scg} 28550724Scg 28650724Scgstatic int 28770134Scgeschan_setformat(kobj_t obj, void *data, u_int32_t format) 28850724Scg{ 28950724Scg struct es_chinfo *ch = data; 29050724Scg struct es_info *es = ch->parent; 29150724Scg 29250724Scg if (ch->dir == PCMDIR_PLAY) { 29350724Scg es->sctrl &= ~SCTRL_P2FMT; 29450724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 29550724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 29650724Scg } else { 29750724Scg es->sctrl &= ~SCTRL_R1FMT; 29850724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 29950724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 30050724Scg } 30150724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 30250724Scg ch->fmt = format; 30350724Scg return 0; 30450724Scg} 30550724Scg 30650724Scgstatic int 30770134Scgeschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 30850724Scg{ 30950724Scg struct es_chinfo *ch = data; 31050724Scg struct es_info *es = ch->parent; 31150724Scg 31250724Scg es->ctrl &= ~CTRL_PCLKDIV; 31350724Scg es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 31450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 31550724Scg /* rec/play speeds locked together - should indicate in flags */ 31650724Scg return speed; /* XXX calc real speed */ 31750724Scg} 31850724Scg 31970134Scgstatic int 32070134Scgeschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 32154831Scg{ 32254831Scg struct es_chinfo *ch = data; 32354831Scg struct es_info *es = ch->parent; 32454831Scg 32554831Scg if (ch->dir == PCMDIR_PLAY) { 32654831Scg return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 32754831Scg } else { 32854831Scg return es1371_adc_rate(es, speed, 1); /* record */ 32954831Scg } 33054831Scg} 33154831Scg 33250724Scgstatic int 33370134Scgeschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 33450724Scg{ 33550724Scg return blocksize; 33650724Scg} 33750724Scg 33850724Scgstatic int 33970134Scgeschan_trigger(kobj_t obj, void *data, int go) 34050724Scg{ 34150724Scg struct es_chinfo *ch = data; 34250724Scg struct es_info *es = ch->parent; 34370298Scg unsigned cnt; 34450724Scg 34560958Scg if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 34660958Scg return 0; 34760958Scg 34870291Scg cnt = (sndbuf_runsz(ch->buffer) / sndbuf_getbps(ch->buffer)) - 1; 34960958Scg 35050724Scg if (ch->dir == PCMDIR_PLAY) { 35150724Scg if (go == PCMTRIG_START) { 35250724Scg int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 35350724Scg es->ctrl |= CTRL_DAC2_EN; 35450724Scg es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 35550724Scg SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 35650724Scg SCTRL_P2DACSEN); 35750724Scg es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 35850724Scg bus_space_write_4(es->st, es->sh, 35950724Scg ES1370_REG_DAC2_SCOUNT, cnt); 36059323Scg /* start at beginning of buffer */ 36159323Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 36259323Scg ES1370_REG_DAC2_FRAMECNT >> 8); 36359323Scg bus_space_write_4(es->st, es->sh, 36459323Scg ES1370_REG_DAC2_FRAMECNT & 0xff, 36570291Scg (sndbuf_getsize(ch->buffer) >> 2) - 1); 36650724Scg } else es->ctrl &= ~CTRL_DAC2_EN; 36750724Scg } else { 36850724Scg if (go == PCMTRIG_START) { 36950724Scg es->ctrl |= CTRL_ADC_EN; 37050724Scg es->sctrl &= ~SCTRL_R1LOOPSEL; 37150724Scg es->sctrl |= SCTRL_R1INTEN; 37250724Scg bus_space_write_4(es->st, es->sh, 37350724Scg ES1370_REG_ADC_SCOUNT, cnt); 37459323Scg /* start at beginning of buffer */ 37559323Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 37659323Scg ES1370_REG_ADC_FRAMECNT >> 8); 37759323Scg bus_space_write_4(es->st, es->sh, 37859323Scg ES1370_REG_ADC_FRAMECNT & 0xff, 37970291Scg (sndbuf_getsize(ch->buffer) >> 2) - 1); 38050724Scg } else es->ctrl &= ~CTRL_ADC_EN; 38150724Scg } 38250724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 38350724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 38450724Scg return 0; 38550724Scg} 38650724Scg 38750724Scgstatic int 38870134Scgeschan_getptr(kobj_t obj, void *data) 38950724Scg{ 39050724Scg struct es_chinfo *ch = data; 39150724Scg struct es_info *es = ch->parent; 39259323Scg u_int32_t reg, cnt; 39359323Scg 39459323Scg if (ch->dir == PCMDIR_PLAY) 39559323Scg reg = ES1370_REG_DAC2_FRAMECNT; 39659323Scg else 39759323Scg reg = ES1370_REG_ADC_FRAMECNT; 39859323Scg 39959323Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 40059323Scg cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 40159323Scg /* cnt is longwords */ 40259323Scg return cnt << 2; 40350724Scg} 40450724Scg 40550724Scgstatic pcmchan_caps * 40670134Scgeschan_getcaps(kobj_t obj, void *data) 40750724Scg{ 40850724Scg struct es_chinfo *ch = data; 40950724Scg return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 41050724Scg} 41150724Scg 41270134Scgstatic kobj_method_t eschan1370_methods[] = { 41370134Scg KOBJMETHOD(channel_init, eschan_init), 41470134Scg KOBJMETHOD(channel_setdir, eschan_setdir), 41570134Scg KOBJMETHOD(channel_setformat, eschan_setformat), 41670134Scg KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 41770134Scg KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 41870134Scg KOBJMETHOD(channel_trigger, eschan_trigger), 41970134Scg KOBJMETHOD(channel_getptr, eschan_getptr), 42070134Scg KOBJMETHOD(channel_getcaps, eschan_getcaps), 42170134Scg { 0, 0 } 42270134Scg}; 42370134ScgCHANNEL_DECLARE(eschan1370); 42470134Scg 42570134Scgstatic kobj_method_t eschan1371_methods[] = { 42670134Scg KOBJMETHOD(channel_init, eschan_init), 42770134Scg KOBJMETHOD(channel_setdir, eschan_setdir), 42870134Scg KOBJMETHOD(channel_setformat, eschan_setformat), 42970134Scg KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 43070134Scg KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 43170134Scg KOBJMETHOD(channel_trigger, eschan_trigger), 43270134Scg KOBJMETHOD(channel_getptr, eschan_getptr), 43370134Scg KOBJMETHOD(channel_getcaps, eschan_getcaps), 43470134Scg { 0, 0 } 43570134Scg}; 43670134ScgCHANNEL_DECLARE(eschan1371); 43770134Scg 43870134Scg/* -------------------------------------------------------------------- */ 43950724Scg/* The interrupt handler */ 44050724Scgstatic void 44154831Scges_intr(void *p) 44250724Scg{ 44350724Scg struct es_info *es = p; 44450724Scg unsigned intsrc, sctrl; 44550724Scg 44650724Scg intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 44750724Scg if ((intsrc & STAT_INTR) == 0) return; 44850724Scg 44950724Scg sctrl = es->sctrl; 45050724Scg if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 45150724Scg if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 45250724Scg if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 45350724Scg 45450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 45550724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 45650724Scg 45754831Scg if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 45854831Scg if (intsrc & STAT_DAC1); 45950724Scg if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 46050724Scg} 46150724Scg 46254831Scg/* ES1370 specific */ 46354831Scgstatic int 46454831Scges1370_init(struct es_info *es) 46554831Scg{ 46654831Scg es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 46754831Scg (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 46854831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 46953413Sroger 47054831Scg es->sctrl = 0; 47154831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 47253413Sroger 47354831Scg es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 47454831Scg es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 47554831Scg * {LR,B}CLK2 and run off the LRCLK2 47654831Scg * PLL; program DAC_SYNC=0! */ 47754831Scg es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 47854831Scg es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 47953413Sroger 48054831Scg return 0; 48154831Scg} 48253413Sroger 48354831Scg/* ES1371 specific */ 48453413Srogerint 48555209Scges1371_init(struct es_info *es, int rev) 48653413Sroger{ 48753413Sroger int idx; 48853413Sroger 48954831Scg if (debug > 0) printf("es_init\n"); 49054831Scg 49154831Scg es->num = 0; 49253413Sroger es->ctrl = 0; 49353413Sroger es->sctrl = 0; 49453413Sroger /* initialize the chips */ 49562412Sroberto if (rev == 7 || rev >= 9 || rev == 2) { 49655209Scg#define ES1371_BINTSUMM_OFF 0x07 49755209Scg bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 49855209Scg if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 49955209Scg } else { /* pre ac97 2.1 card */ 50055209Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 50155209Scg if (debug > 0) printf("es_init pre ac97 2.1\n"); 50255209Scg } 50353413Sroger bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 50453413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 50553413Sroger /* AC'97 warm reset to start the bitclk */ 50653413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 50753413Sroger DELAY(2000); 50855204Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 50953413Sroger /* Init the sample rate converter */ 51053413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 51153413Sroger for (idx = 0; idx < 0x80; idx++) 51254831Scg es1371_src_write(es, idx, 0); 51353413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 51453413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 51553413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 51653413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 51753413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 51853413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 51953413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 52053413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 52153413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 52253413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 52353413Sroger es1371_adc_rate (es, 22050, 1); 52454831Scg es1371_dac_rate (es, 22050, 1); 52554831Scg es1371_dac_rate (es, 22050, 2); 52653413Sroger /* WARNING: 52753413Sroger * enabling the sample rate converter without properly programming 52853413Sroger * its parameters causes the chip to lock up (the SRC busy bit will 52953413Sroger * be stuck high, and I've found no way to rectify this other than 53053413Sroger * power cycle) 53153413Sroger */ 53253413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 53353413Sroger 53453413Sroger return (0); 53553413Sroger} 53653413Sroger 53770134Scg/* -------------------------------------------------------------------- */ 53870134Scg 53970134Scgstatic int 54070134Scges1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 54153413Sroger{ 54254831Scg int sl; 54354831Scg unsigned t, x; 54453413Sroger struct es_info *es = (struct es_info*)s; 54553413Sroger 54654831Scg if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 54753413Sroger 54853413Sroger for (t = 0; t < 0x1000; t++) 54954831Scg if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 55053413Sroger break; 55153413Sroger sl = spltty(); 55253413Sroger /* save the current state for later */ 55354831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 55453413Sroger /* enable SRC state data in SRC mux */ 55553413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 55654831Scg (es1371_wait_src_ready(s) & 55754831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 55853413Sroger /* wait for a SAFE time to write addr/data and then do it, dammit */ 55953413Sroger for (t = 0; t < 0x1000; t++) 56054831Scg if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 56154831Scg break; 56254831Scg 56354831Scg if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 56453413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 56553413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 56654831Scg 56753413Sroger bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 56853413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 56953413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 57053413Sroger /* restore SRC reg */ 57153413Sroger es1371_wait_src_ready(s); 57254831Scg if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 57354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 57453413Sroger splx(sl); 57570134Scg 57670134Scg return 0; 57753413Sroger} 57853413Sroger 57970134Scgstatic int 58070134Scges1371_rdcd(kobj_t obj, void *s, int addr) 58153413Sroger{ 58254831Scg int sl; 58354831Scg unsigned t, x; 58454831Scg struct es_info *es = (struct es_info *)s; 58553413Sroger 58654831Scg if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 58753413Sroger 58854831Scg for (t = 0; t < 0x1000; t++) 58954831Scg if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 59054831Scg break; 59154831Scg if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 59253413Sroger 59354831Scg sl = spltty(); 59453413Sroger 59554831Scg /* save the current state for later */ 59654831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 59754831Scg /* enable SRC state data in SRC mux */ 59854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 59954831Scg (es1371_wait_src_ready(s) & 60054831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 60154831Scg /* wait for a SAFE time to write addr/data and then do it, dammit */ 60254831Scg for (t = 0; t < 0x5000; t++) 60354831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 60454831Scg break; 60554831Scg if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 60654831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 60754831Scg ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 60853413Sroger 60954831Scg /* restore SRC reg */ 61054831Scg es1371_wait_src_ready(s); 61154831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 61253413Sroger 61354831Scg splx(sl); 61453413Sroger 61554831Scg /* now wait for the stinkin' data (RDY) */ 61654831Scg for (t = 0; t < 0x1000; t++) 61754831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 61854831Scg break; 61954831Scg if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 62054831Scg return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 62153413Sroger} 62253413Sroger 62370134Scgstatic kobj_method_t es1371_ac97_methods[] = { 62470134Scg KOBJMETHOD(ac97_read, es1371_rdcd), 62570134Scg KOBJMETHOD(ac97_write, es1371_wrcd), 62670134Scg { 0, 0 } 62770134Scg}; 62870134ScgAC97_DECLARE(es1371_ac97); 62970134Scg 63070134Scg/* -------------------------------------------------------------------- */ 63170134Scg 63253413Srogerstatic u_int 63355209Scges1371_src_read(struct es_info *es, u_short reg) 63454831Scg{ 63554831Scg unsigned int r; 63653413Sroger 63754831Scg r = es1371_wait_src_ready(es) & 63854831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 63954831Scg r |= ES1371_SRC_RAM_ADDRO(reg); 64054831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 64154831Scg return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 64253413Sroger} 64353413Sroger 64453413Srogerstatic void 64555209Scges1371_src_write(struct es_info *es, u_short reg, u_short data){ 64653413Sroger u_int r; 64753413Sroger 64853413Sroger r = es1371_wait_src_ready(es) & 64954831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 65053413Sroger r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 65153413Sroger /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 65254831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 65353413Sroger} 65453413Sroger 65554831Scgstatic u_int 65655209Scges1371_adc_rate(struct es_info *es, u_int rate, int set) 65754831Scg{ 65854831Scg u_int n, truncm, freq, result; 65954831Scg 66054831Scg if (rate > 48000) rate = 48000; 66154831Scg if (rate < 4000) rate = 4000; 66254831Scg n = rate / 3000; 66354831Scg if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 66454831Scg n--; 66554831Scg truncm = (21 * n - 1) | 1; 66654831Scg freq = ((48000UL << 15) / rate) * n; 66754831Scg result = (48000UL << 15) / (freq / n); 66854831Scg if (set) { 66954831Scg if (rate >= 24000) { 67054831Scg if (truncm > 239) truncm = 239; 67154831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 67254831Scg (((239 - truncm) >> 1) << 9) | (n << 4)); 67354831Scg } else { 67454831Scg if (truncm > 119) truncm = 119; 67554831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 67654831Scg 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 67754831Scg } 67854831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 67954831Scg (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 68054831Scg 0x00ff) | ((freq >> 5) & 0xfc00)); 68154831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 68254831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 68354831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 68453413Sroger } 68553413Sroger return result; 68653413Sroger} 68753413Sroger 68853413Srogerstatic u_int 68955209Scges1371_dac_rate(struct es_info *es, u_int rate, int set) 69054831Scg{ 69154831Scg u_int freq, r, result, dac, dis; 69253413Sroger 69354831Scg if (rate > 48000) rate = 48000; 69454831Scg if (rate < 4000) rate = 4000; 69554831Scg freq = (rate << 15) / 3000; 69654831Scg result = (freq * 3000) >> 15; 69754831Scg if (set) { 69854831Scg dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 69954831Scg dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 70054831Scg 70154831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 70254831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 70354831Scg es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 70454831Scg (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 70554831Scg es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 70654831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 70754831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 70854831Scg } 70954831Scg return result; 71053413Sroger} 71153413Sroger 71253413Srogerstatic u_int 71355209Scges1371_wait_src_ready(struct es_info *es) 71454831Scg{ 71554831Scg u_int t, r; 71653413Sroger 71754831Scg for (t = 0; t < 500; t++) { 71854831Scg if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 71954831Scg return r; 72054831Scg DELAY(1000); 72154831Scg } 72254831Scg printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 72354831Scg return 0; 72453413Sroger} 72553413Sroger 72650724Scg/* -------------------------------------------------------------------- */ 72750724Scg 72850724Scg/* 72950724Scg * Probe and attach the card 73050724Scg */ 73150724Scg 73250724Scgstatic int 73350724Scges_pci_probe(device_t dev) 73450724Scg{ 73550724Scg if (pci_get_devid(dev) == ES1370_PCI_ID) { 73650724Scg device_set_desc(dev, "AudioPCI ES1370"); 73750724Scg return 0; 73856154Speter } else if (pci_get_devid(dev) == ES1371_PCI_ID || 73962412Sroberto pci_get_devid(dev) == ES1371_PCI_ID2 || 74062412Sroberto pci_get_devid(dev) == ES1371_PCI_ID3) { 74153413Sroger device_set_desc(dev, "AudioPCI ES1371"); 74253413Sroger return 0; 74350724Scg } 74450724Scg return ENXIO; 74550724Scg} 74650724Scg 74750724Scgstatic int 74850724Scges_pci_attach(device_t dev) 74950724Scg{ 75050724Scg u_int32_t data; 75150724Scg struct es_info *es = 0; 75250724Scg int mapped; 75350724Scg char status[SND_STATUSLEN]; 75465644Scg struct ac97_info *codec = 0; 75570134Scg kobj_class_t ct = NULL; 75650724Scg 75750724Scg if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 75850724Scg device_printf(dev, "cannot allocate softc\n"); 75950724Scg return ENXIO; 76050724Scg } 76150724Scg bzero(es, sizeof *es); 76250724Scg 76359019Scg es->dev = dev; 76450724Scg mapped = 0; 76550724Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 76655426Scg data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 76755426Scg pci_write_config(dev, PCIR_COMMAND, data, 2); 76855426Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 76950724Scg if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 77065644Scg es->regid = MEM_MAP_REG; 77165644Scg es->regtype = SYS_RES_MEMORY; 77265644Scg es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 77350724Scg 0, ~0, 1, RF_ACTIVE); 77465644Scg if (es->reg) { 77565644Scg es->st = rman_get_bustag(es->reg); 77665644Scg es->sh = rman_get_bushandle(es->reg); 77750724Scg mapped++; 77850724Scg } 77950724Scg } 78050724Scg if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 78165644Scg es->regid = PCIR_MAPS; 78265644Scg es->regtype = SYS_RES_IOPORT; 78365644Scg es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 78450724Scg 0, ~0, 1, RF_ACTIVE); 78565644Scg if (es->reg) { 78665644Scg es->st = rman_get_bustag(es->reg); 78765644Scg es->sh = rman_get_bushandle(es->reg); 78850724Scg mapped++; 78950724Scg } 79050724Scg } 79150724Scg if (mapped == 0) { 79250724Scg device_printf(dev, "unable to map register space\n"); 79350724Scg goto bad; 79450724Scg } 79554831Scg 79656154Speter if (pci_get_devid(dev) == ES1371_PCI_ID || 79765340Scg pci_get_devid(dev) == ES1371_PCI_ID2 || 79862412Sroberto pci_get_devid(dev) == ES1371_PCI_ID3) { 79955209Scg if(-1 == es1371_init(es, pci_get_revid(dev))) { 80054831Scg device_printf(dev, "unable to initialize the card\n"); 80154831Scg goto bad; 80254831Scg } 80370134Scg codec = AC97_CREATE(dev, es, es1371_ac97); 80454831Scg if (codec == NULL) goto bad; 80554831Scg /* our init routine does everything for us */ 80654831Scg /* set to NULL; flag mixer_init not to run the ac97_init */ 80754831Scg /* ac97_mixer.init = NULL; */ 80870134Scg if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad; 80970134Scg ct = &eschan1371_class; 81054831Scg } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 81154831Scg if (-1 == es1370_init(es)) { 81254831Scg device_printf(dev, "unable to initialize the card\n"); 81354831Scg goto bad; 81454831Scg } 81570134Scg if (mixer_init(dev, &es1370_mixer_class, es)) goto bad; 81670134Scg ct = &eschan1370_class; 81754831Scg } else goto bad; 81850724Scg 81965644Scg es->irqid = 0; 82065644Scg es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid, 82152046Simp 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 82265644Scg if (!es->irq 82365644Scg || bus_setup_intr(dev, es->irq, INTR_TYPE_TTY, es_intr, es, &es->ih)) { 82450724Scg device_printf(dev, "unable to map interrupt\n"); 82550724Scg goto bad; 82650724Scg } 82750724Scg 82850724Scg if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 82950724Scg /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 83050724Scg /*highaddr*/BUS_SPACE_MAXADDR, 83150724Scg /*filter*/NULL, /*filterarg*/NULL, 83250724Scg /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 83350724Scg /*flags*/0, &es->parent_dmat) != 0) { 83450724Scg device_printf(dev, "unable to create dma tag\n"); 83550724Scg goto bad; 83650724Scg } 83750724Scg 83850724Scg snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 83965644Scg (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 84065644Scg rman_get_start(es->reg), rman_get_start(es->irq)); 84150724Scg 84250724Scg if (pcm_register(dev, es, 1, 1)) goto bad; 84354831Scg pcm_addchan(dev, PCMDIR_REC, ct, es); 84454831Scg pcm_addchan(dev, PCMDIR_PLAY, ct, es); 84550724Scg pcm_setstatus(dev, status); 84650724Scg 84750724Scg return 0; 84850724Scg 84950724Scg bad: 85065644Scg if (codec) ac97_destroy(codec); 85165644Scg if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 85265644Scg if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 85365644Scg if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 85465644Scg if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 85550724Scg if (es) free(es, M_DEVBUF); 85650724Scg return ENXIO; 85750724Scg} 85850724Scg 85965644Scgstatic int 86065644Scges_pci_detach(device_t dev) 86165644Scg{ 86265644Scg int r; 86365644Scg struct es_info *es; 86465644Scg 86565644Scg r = pcm_unregister(dev); 86665644Scg if (r) 86765644Scg return r; 86865644Scg 86965644Scg es = pcm_getdevinfo(dev); 87065644Scg bus_release_resource(dev, es->regtype, es->regid, es->reg); 87165644Scg bus_teardown_intr(dev, es->irq, es->ih); 87265644Scg bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 87365644Scg bus_dma_tag_destroy(es->parent_dmat); 87465644Scg free(es, M_DEVBUF); 87565644Scg 87665644Scg return 0; 87765644Scg} 87865644Scg 87950724Scgstatic device_method_t es_methods[] = { 88050724Scg /* Device interface */ 88150724Scg DEVMETHOD(device_probe, es_pci_probe), 88250724Scg DEVMETHOD(device_attach, es_pci_attach), 88365644Scg DEVMETHOD(device_detach, es_pci_detach), 88450724Scg 88550724Scg { 0, 0 } 88650724Scg}; 88750724Scg 88850724Scgstatic driver_t es_driver = { 88950724Scg "pcm", 89050724Scg es_methods, 89150724Scg sizeof(snddev_info), 89250724Scg}; 89350724Scg 89450724Scgstatic devclass_t pcm_devclass; 89550724Scg 89662483ScgDRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 89762483ScgMODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 89862483ScgMODULE_VERSION(snd_es137x, 1); 899