es137x.c revision 58905
150724Scg/* 253413Sroger * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 353413Sroger * boards based on the ES1370, ES1371 and ES1373 chips. 450724Scg * 553413Sroger * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 650724Scg * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 750724Scg * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 850724Scg * 950724Scg * Redistribution and use in source and binary forms, with or without 1050724Scg * modification, are permitted provided that the following conditions 1150724Scg * are met: 1250724Scg * 1350724Scg * 1. Redistributions of source code must retain the above copyright 1450724Scg * notice, this list of conditions and the following disclaimer. 1550724Scg * 1650724Scg * 2. Redistributions in binary form must reproduce the above copyright 1750724Scg * notice, this list of conditions and the following disclaimer in 1850724Scg * the documentation and/or other materials provided with the 1950724Scg * distribution. 2050724Scg * 2150724Scg * 3. All advertising materials mentioning features or use of this 2250724Scg * software must display the following acknowledgement: 2350724Scg * This product includes software developed by Joachim Kuebart. 2450724Scg * 2550724Scg * 4. The name of the author may not be used to endorse or promote 2650724Scg * products derived from this software without specific prior 2750724Scg * written permission. 2850724Scg * 2950724Scg * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 3050724Scg * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 3150724Scg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 3250724Scg * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 3350724Scg * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 3450724Scg * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 3550724Scg * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3650724Scg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 3750724Scg * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3850724Scg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 3950724Scg * OF THE POSSIBILITY OF SUCH DAMAGE. 4050724Scg * 4150733Speter * $FreeBSD: head/sys/dev/sound/pci/es137x.c 58905 2000-04-01 22:24:03Z cg $ 4250724Scg */ 4350724Scg 4453413Sroger/* 4553413Sroger * Part of this code was heavily inspired by the linux driver from 4653413Sroger * Thomas Sailer (sailer@ife.ee.ethz.ch) 4754831Scg * Just about everything has been touched and reworked in some way but 4854831Scg * the all the underlying sequences/timing/register values are from 4953413Sroger * Thomas' code. 5053413Sroger * 5153413Sroger*/ 5253413Sroger 5353465Scg#include <dev/sound/pcm/sound.h> 5453465Scg#include <dev/sound/pcm/ac97.h> 5553465Scg#include <dev/sound/pci/es137x.h> 5650724Scg 5750724Scg#include <pci/pcireg.h> 5850724Scg#include <pci/pcivar.h> 5950724Scg 6053413Sroger#include <sys/sysctl.h> 6153413Sroger 6253413Srogerstatic int debug = 0; 6353413SrogerSYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 6453413Sroger 6550724Scg#define MEM_MAP_REG 0x14 6650724Scg 6750724Scg/* PCI IDs of supported chips */ 6850724Scg#define ES1370_PCI_ID 0x50001274 6953413Sroger#define ES1371_PCI_ID 0x13711274 7056154Speter#define ES1371_PCI_ID2 0x13713274 7150724Scg 7250724Scg/* device private data */ 7350724Scgstruct es_info; 7450724Scg 7555209Scgstruct es_chinfo { 7650724Scg struct es_info *parent; 7750724Scg pcm_channel *channel; 7850724Scg snd_dbuf *buffer; 7954831Scg int dir, num; 8050724Scg u_int32_t fmt; 8155209Scg}; 8250724Scg 8355209Scgstruct es_info { 8450724Scg bus_space_tag_t st; 8550724Scg bus_space_handle_t sh; 8650724Scg bus_dma_tag_t parent_dmat; 8750724Scg 8854831Scg int num; 8950724Scg /* Contents of board's registers */ 9050724Scg u_long ctrl; 9150724Scg u_long sctrl; 9250724Scg struct es_chinfo pch, rch; 9355209Scg}; 9450724Scg 9550724Scg/* -------------------------------------------------------------------- */ 9654831Scg 9753413Sroger/* prototypes */ 9854831Scgstatic void es_intr(void *); 9950724Scg 10054831Scgstatic void es1371_wrcodec(void *, int, u_int32_t); 10154831Scgstatic u_int32_t es1371_rdcodec(void *, int); 10255209Scgstatic u_int es1371_wait_src_ready(struct es_info *); 10355209Scgstatic void es1371_src_write(struct es_info *, u_short, unsigned short); 10455209Scgstatic u_int es1371_adc_rate(struct es_info *, u_int, int); 10555209Scgstatic u_int es1371_dac_rate(struct es_info *, u_int, int); 10655209Scgstatic int es1371_init(struct es_info *es, int); 10754831Scgstatic int es1370_init(struct es_info *); 10854831Scgstatic int es1370_wrcodec(struct es_info *, u_char, u_char); 10950724Scg 11050724Scg/* channel interface */ 11150724Scgstatic void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 11254831Scgstatic int eschan_setdir(void *data, int dir); 11354831Scgstatic int eschan_setformat(void *data, u_int32_t format); 11454831Scgstatic int eschan1370_setspeed(void *data, u_int32_t speed); 11555209Scgstatic int eschan1371_setspeed(void *data, u_int32_t speed); 11654831Scgstatic int eschan_setblocksize(void *data, u_int32_t blocksize); 11754831Scgstatic int eschan_trigger(void *data, int go); 11854831Scgstatic int eschan_getptr(void *data); 11950724Scgstatic pcmchan_caps *eschan_getcaps(void *data); 12050724Scg 12150724Scgstatic pcmchan_caps es_playcaps = { 12250724Scg 4000, 48000, 12350724Scg AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 12450724Scg AFMT_STEREO | AFMT_S16_LE 12550724Scg}; 12650724Scg 12750724Scgstatic pcmchan_caps es_reccaps = { 12850724Scg 4000, 48000, 12950724Scg AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 13050724Scg AFMT_STEREO | AFMT_S16_LE 13150724Scg}; 13250724Scg 13354831Scgstatic pcm_channel es1370_chantemplate = { 13450724Scg eschan_init, 13550724Scg eschan_setdir, 13650724Scg eschan_setformat, 13754831Scg eschan1370_setspeed, 13850724Scg eschan_setblocksize, 13950724Scg eschan_trigger, 14050724Scg eschan_getptr, 14150724Scg eschan_getcaps, 14250724Scg}; 14350724Scg 14454831Scgstatic pcm_channel es1371_chantemplate = { 14554831Scg eschan_init, 14654831Scg eschan_setdir, 14754831Scg eschan_setformat, 14854831Scg eschan1371_setspeed, 14954831Scg eschan_setblocksize, 15054831Scg eschan_trigger, 15154831Scg eschan_getptr, 15254831Scg eschan_getcaps, 15354831Scg}; 15454831Scg 15550724Scg/* -------------------------------------------------------------------- */ 15650724Scg 15754831Scg/* The es1370 mixer interface */ 15850724Scg 15954831Scgstatic int es1370_mixinit(snd_mixer *m); 16054831Scgstatic int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 16154831Scgstatic int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 16250724Scg 16354831Scgstatic snd_mixer es1370_mixer = { 16454831Scg "AudioPCI 1370 mixer", 16554831Scg es1370_mixinit, 16654831Scg es1370_mixset, 16754831Scg es1370_mixsetrecsrc, 16850724Scg}; 16950724Scg 17050724Scgstatic const struct { 17150724Scg unsigned volidx:4; 17250724Scg unsigned left:4; 17350724Scg unsigned right:4; 17450724Scg unsigned stereo:1; 17550724Scg unsigned recmask:13; 17650724Scg unsigned avail:1; 17750724Scg} mixtable[SOUND_MIXER_NRDEVICES] = { 17850724Scg [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 17950724Scg [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 18050724Scg [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 18150724Scg [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 18250724Scg [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 18350724Scg [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 18450724Scg [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 18550724Scg [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 18650724Scg [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 18754831Scg [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 18854831Scg}; 18950724Scg 19050724Scgstatic int 19154831Scges1370_mixinit(snd_mixer *m) 19250724Scg{ 19350724Scg int i; 19450724Scg u_int32_t v; 19550724Scg 19650724Scg v = 0; 19750724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 19850724Scg if (mixtable[i].avail) v |= (1 << i); 19950724Scg mix_setdevs(m, v); 20050724Scg v = 0; 20150724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 20250724Scg if (mixtable[i].recmask) v |= (1 << i); 20350724Scg mix_setrecdevs(m, v); 20450724Scg return 0; 20550724Scg} 20650724Scg 20750724Scgstatic int 20854831Scges1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 20950724Scg{ 21050724Scg int l, r, rl, rr; 21150724Scg 21250724Scg if (!mixtable[dev].avail) return -1; 21350724Scg l = left; 21450724Scg r = mixtable[dev].stereo? right : l; 21550724Scg if (mixtable[dev].left == 0xf) { 21650724Scg rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 21750724Scg } else { 21850724Scg rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 21950724Scg } 22050724Scg if (mixtable[dev].stereo) { 22150724Scg rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 22254831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 22350724Scg } 22454831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 22550724Scg return l | (r << 8); 22650724Scg} 22750724Scg 22850724Scgstatic int 22954831Scges1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 23050724Scg{ 23150724Scg int i, j = 0; 23250724Scg 23350724Scg if (src == 0) src = 1 << SOUND_MIXER_MIC; 23450724Scg src &= mix_getrecdevs(m); 23550724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 23650724Scg if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 23750724Scg 23854831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 23954831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 24054831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 24154831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 24254831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 24354831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 24450724Scg return src; 24550724Scg} 24650724Scg 24750724Scgstatic int 24854831Scges1370_wrcodec(struct es_info *es, u_char i, u_char data) 24950724Scg{ 25050724Scg int wait = 100; /* 100 msec timeout */ 25150724Scg 25250724Scg do { 25350724Scg if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 25450724Scg STAT_CSTAT) == 0) { 25550724Scg bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 25650724Scg ((u_short)i << CODEC_INDEX_SHIFT) | data); 25750724Scg return 0; 25850724Scg } 25950724Scg DELAY(1000); 26050724Scg } while (--wait); 26154831Scg printf("pcm: es1370_wrcodec timed out\n"); 26250724Scg return -1; 26350724Scg} 26450724Scg 26550724Scg/* -------------------------------------------------------------------- */ 26650724Scg 26750724Scg/* channel interface */ 26850724Scgstatic void * 26950724Scgeschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 27050724Scg{ 27150724Scg struct es_info *es = devinfo; 27250724Scg struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 27350724Scg 27450724Scg ch->parent = es; 27550724Scg ch->channel = c; 27650724Scg ch->buffer = b; 27750724Scg ch->buffer->bufsize = ES_BUFFSIZE; 27854831Scg ch->num = ch->parent->num++; 27950724Scg if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 28050724Scg return ch; 28150724Scg} 28250724Scg 28350724Scgstatic int 28450724Scgeschan_setdir(void *data, int dir) 28550724Scg{ 28650724Scg struct es_chinfo *ch = data; 28750724Scg struct es_info *es = ch->parent; 28850724Scg 28950724Scg if (dir == PCMDIR_PLAY) { 29050724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 29150724Scg ES1370_REG_DAC2_FRAMEADR >> 8); 29250724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 29350724Scg vtophys(ch->buffer->buf)); 29450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 29550724Scg (ch->buffer->bufsize >> 2) - 1); 29650724Scg } else { 29750724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 29850724Scg ES1370_REG_ADC_FRAMEADR >> 8); 29950724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 30050724Scg vtophys(ch->buffer->buf)); 30150724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 30250724Scg (ch->buffer->bufsize >> 2) - 1); 30350724Scg } 30450724Scg ch->dir = dir; 30550724Scg return 0; 30650724Scg} 30750724Scg 30850724Scgstatic int 30950724Scgeschan_setformat(void *data, u_int32_t format) 31050724Scg{ 31150724Scg struct es_chinfo *ch = data; 31250724Scg struct es_info *es = ch->parent; 31350724Scg 31450724Scg if (ch->dir == PCMDIR_PLAY) { 31550724Scg es->sctrl &= ~SCTRL_P2FMT; 31650724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 31750724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 31850724Scg } else { 31950724Scg es->sctrl &= ~SCTRL_R1FMT; 32050724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 32150724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 32250724Scg } 32350724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 32450724Scg ch->fmt = format; 32550724Scg return 0; 32650724Scg} 32750724Scg 32850724Scgstatic int 32954831Scgeschan1370_setspeed(void *data, u_int32_t speed) 33050724Scg{ 33150724Scg struct es_chinfo *ch = data; 33250724Scg struct es_info *es = ch->parent; 33350724Scg 33450724Scg es->ctrl &= ~CTRL_PCLKDIV; 33550724Scg es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 33650724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 33750724Scg /* rec/play speeds locked together - should indicate in flags */ 33850724Scg return speed; /* XXX calc real speed */ 33950724Scg} 34050724Scg 34154831Scgint 34254831Scgeschan1371_setspeed(void *data, u_int32_t speed) 34354831Scg{ 34454831Scg struct es_chinfo *ch = data; 34554831Scg struct es_info *es = ch->parent; 34654831Scg 34754831Scg if (ch->dir == PCMDIR_PLAY) { 34854831Scg return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 34954831Scg } else { 35054831Scg return es1371_adc_rate(es, speed, 1); /* record */ 35154831Scg } 35254831Scg} 35354831Scg 35450724Scgstatic int 35550724Scgeschan_setblocksize(void *data, u_int32_t blocksize) 35650724Scg{ 35750724Scg return blocksize; 35850724Scg} 35950724Scg 36050724Scgstatic int 36150724Scgeschan_trigger(void *data, int go) 36250724Scg{ 36350724Scg struct es_chinfo *ch = data; 36450724Scg struct es_info *es = ch->parent; 36550724Scg unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 36650724Scg 36755204Scg if (go == PCMTRIG_EMLDMAWR) return 0; 36850724Scg if (ch->dir == PCMDIR_PLAY) { 36950724Scg if (go == PCMTRIG_START) { 37050724Scg int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 37150724Scg es->ctrl |= CTRL_DAC2_EN; 37250724Scg es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 37350724Scg SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 37450724Scg SCTRL_P2DACSEN); 37550724Scg es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 37650724Scg bus_space_write_4(es->st, es->sh, 37750724Scg ES1370_REG_DAC2_SCOUNT, cnt); 37850724Scg } else es->ctrl &= ~CTRL_DAC2_EN; 37950724Scg } else { 38050724Scg if (go == PCMTRIG_START) { 38150724Scg es->ctrl |= CTRL_ADC_EN; 38250724Scg es->sctrl &= ~SCTRL_R1LOOPSEL; 38350724Scg es->sctrl |= SCTRL_R1INTEN; 38450724Scg bus_space_write_4(es->st, es->sh, 38550724Scg ES1370_REG_ADC_SCOUNT, cnt); 38650724Scg } else es->ctrl &= ~CTRL_ADC_EN; 38750724Scg } 38850724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 38950724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 39050724Scg return 0; 39150724Scg} 39250724Scg 39350724Scgstatic int 39450724Scgeschan_getptr(void *data) 39550724Scg{ 39650724Scg struct es_chinfo *ch = data; 39750724Scg struct es_info *es = ch->parent; 39850724Scg if (ch->dir == PCMDIR_PLAY) { 39950724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 40050724Scg ES1370_REG_DAC2_FRAMECNT >> 8); 40150724Scg return (bus_space_read_4(es->st, es->sh, 40250724Scg ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 40350724Scg } else { 40450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 40550724Scg ES1370_REG_ADC_FRAMECNT >> 8); 40650724Scg return (bus_space_read_4(es->st, es->sh, 40750724Scg ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 40850724Scg } 40950724Scg} 41050724Scg 41150724Scgstatic pcmchan_caps * 41250724Scgeschan_getcaps(void *data) 41350724Scg{ 41450724Scg struct es_chinfo *ch = data; 41550724Scg return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 41650724Scg} 41750724Scg 41850724Scg/* The interrupt handler */ 41950724Scgstatic void 42054831Scges_intr(void *p) 42150724Scg{ 42250724Scg struct es_info *es = p; 42350724Scg unsigned intsrc, sctrl; 42450724Scg 42550724Scg intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 42650724Scg if ((intsrc & STAT_INTR) == 0) return; 42750724Scg 42850724Scg sctrl = es->sctrl; 42950724Scg if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 43050724Scg if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 43150724Scg if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 43250724Scg 43350724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 43450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 43550724Scg 43654831Scg if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 43754831Scg if (intsrc & STAT_DAC1); 43850724Scg if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 43950724Scg} 44050724Scg 44154831Scg/* ES1370 specific */ 44254831Scgstatic int 44354831Scges1370_init(struct es_info *es) 44454831Scg{ 44554831Scg es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 44654831Scg (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 44754831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 44853413Sroger 44954831Scg es->sctrl = 0; 45054831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 45153413Sroger 45254831Scg es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 45354831Scg es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 45454831Scg * {LR,B}CLK2 and run off the LRCLK2 45554831Scg * PLL; program DAC_SYNC=0! */ 45654831Scg es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 45754831Scg es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 45853413Sroger 45954831Scg return 0; 46054831Scg} 46153413Sroger 46254831Scg/* ES1371 specific */ 46353413Srogerint 46455209Scges1371_init(struct es_info *es, int rev) 46553413Sroger{ 46653413Sroger int idx; 46753413Sroger 46854831Scg if (debug > 0) printf("es_init\n"); 46954831Scg 47054831Scg es->num = 0; 47153413Sroger es->ctrl = 0; 47253413Sroger es->sctrl = 0; 47353413Sroger /* initialize the chips */ 47455209Scg if (rev == 7 || rev >= 9) { 47555209Scg#define ES1371_BINTSUMM_OFF 0x07 47655209Scg bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 47755209Scg if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 47855209Scg } else { /* pre ac97 2.1 card */ 47955209Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 48055209Scg if (debug > 0) printf("es_init pre ac97 2.1\n"); 48155209Scg } 48253413Sroger bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 48353413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 48453413Sroger /* AC'97 warm reset to start the bitclk */ 48553413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 48653413Sroger DELAY(2000); 48755204Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 48853413Sroger /* Init the sample rate converter */ 48953413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 49053413Sroger for (idx = 0; idx < 0x80; idx++) 49154831Scg es1371_src_write(es, idx, 0); 49253413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 49353413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 49453413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 49553413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 49653413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 49753413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 49853413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 49953413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 50053413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 50153413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 50253413Sroger es1371_adc_rate (es, 22050, 1); 50354831Scg es1371_dac_rate (es, 22050, 1); 50454831Scg es1371_dac_rate (es, 22050, 2); 50553413Sroger /* WARNING: 50653413Sroger * enabling the sample rate converter without properly programming 50753413Sroger * its parameters causes the chip to lock up (the SRC busy bit will 50853413Sroger * be stuck high, and I've found no way to rectify this other than 50953413Sroger * power cycle) 51053413Sroger */ 51153413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 51253413Sroger 51353413Sroger return (0); 51453413Sroger} 51553413Sroger 51654831Scgstatic void 51753413Srogeres1371_wrcodec(void *s, int addr, u_int32_t data) 51853413Sroger{ 51954831Scg int sl; 52054831Scg unsigned t, x; 52153413Sroger struct es_info *es = (struct es_info*)s; 52253413Sroger 52354831Scg if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 52453413Sroger 52553413Sroger for (t = 0; t < 0x1000; t++) 52654831Scg if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 52753413Sroger break; 52853413Sroger sl = spltty(); 52953413Sroger /* save the current state for later */ 53054831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 53153413Sroger /* enable SRC state data in SRC mux */ 53253413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 53354831Scg (es1371_wait_src_ready(s) & 53454831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 53553413Sroger /* wait for a SAFE time to write addr/data and then do it, dammit */ 53653413Sroger for (t = 0; t < 0x1000; t++) 53754831Scg if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 53854831Scg break; 53954831Scg 54054831Scg if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 54153413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 54253413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 54354831Scg 54453413Sroger bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 54553413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 54653413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 54753413Sroger /* restore SRC reg */ 54853413Sroger es1371_wait_src_ready(s); 54954831Scg if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 55054831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 55153413Sroger splx(sl); 55253413Sroger} 55353413Sroger 55454831Scgstatic u_int32_t 55554831Scges1371_rdcodec(void *s, int addr) 55653413Sroger{ 55754831Scg int sl; 55854831Scg unsigned t, x; 55954831Scg struct es_info *es = (struct es_info *)s; 56053413Sroger 56154831Scg if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 56253413Sroger 56354831Scg for (t = 0; t < 0x1000; t++) 56454831Scg if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 56554831Scg break; 56654831Scg if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 56753413Sroger 56854831Scg sl = spltty(); 56953413Sroger 57054831Scg /* save the current state for later */ 57154831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 57254831Scg /* enable SRC state data in SRC mux */ 57354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 57454831Scg (es1371_wait_src_ready(s) & 57554831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 57654831Scg /* wait for a SAFE time to write addr/data and then do it, dammit */ 57754831Scg for (t = 0; t < 0x5000; t++) 57854831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 57954831Scg break; 58054831Scg if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 58154831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 58254831Scg ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 58353413Sroger 58454831Scg /* restore SRC reg */ 58554831Scg es1371_wait_src_ready(s); 58654831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 58753413Sroger 58854831Scg splx(sl); 58953413Sroger 59054831Scg /* now wait for the stinkin' data (RDY) */ 59154831Scg for (t = 0; t < 0x1000; t++) 59254831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 59354831Scg break; 59454831Scg if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 59554831Scg return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 59653413Sroger} 59753413Sroger 59853413Srogerstatic u_int 59955209Scges1371_src_read(struct es_info *es, u_short reg) 60054831Scg{ 60154831Scg unsigned int r; 60253413Sroger 60354831Scg r = es1371_wait_src_ready(es) & 60454831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 60554831Scg r |= ES1371_SRC_RAM_ADDRO(reg); 60654831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 60754831Scg return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 60853413Sroger} 60953413Sroger 61053413Srogerstatic void 61155209Scges1371_src_write(struct es_info *es, u_short reg, u_short data){ 61253413Sroger u_int r; 61353413Sroger 61453413Sroger r = es1371_wait_src_ready(es) & 61554831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 61653413Sroger r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 61753413Sroger /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 61854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 61953413Sroger} 62053413Sroger 62154831Scgstatic u_int 62255209Scges1371_adc_rate(struct es_info *es, u_int rate, int set) 62354831Scg{ 62454831Scg u_int n, truncm, freq, result; 62554831Scg 62654831Scg if (rate > 48000) rate = 48000; 62754831Scg if (rate < 4000) rate = 4000; 62854831Scg n = rate / 3000; 62954831Scg if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 63054831Scg n--; 63154831Scg truncm = (21 * n - 1) | 1; 63254831Scg freq = ((48000UL << 15) / rate) * n; 63354831Scg result = (48000UL << 15) / (freq / n); 63454831Scg if (set) { 63554831Scg if (rate >= 24000) { 63654831Scg if (truncm > 239) truncm = 239; 63754831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 63854831Scg (((239 - truncm) >> 1) << 9) | (n << 4)); 63954831Scg } else { 64054831Scg if (truncm > 119) truncm = 119; 64154831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 64254831Scg 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 64354831Scg } 64454831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 64554831Scg (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 64654831Scg 0x00ff) | ((freq >> 5) & 0xfc00)); 64754831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 64854831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 64954831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 65053413Sroger } 65153413Sroger return result; 65253413Sroger} 65353413Sroger 65453413Srogerstatic u_int 65555209Scges1371_dac_rate(struct es_info *es, u_int rate, int set) 65654831Scg{ 65754831Scg u_int freq, r, result, dac, dis; 65853413Sroger 65954831Scg if (rate > 48000) rate = 48000; 66054831Scg if (rate < 4000) rate = 4000; 66154831Scg freq = (rate << 15) / 3000; 66254831Scg result = (freq * 3000) >> 15; 66354831Scg if (set) { 66454831Scg dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 66554831Scg dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 66654831Scg 66754831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 66854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 66954831Scg es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 67054831Scg (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 67154831Scg es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 67254831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 67354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 67454831Scg } 67554831Scg return result; 67653413Sroger} 67753413Sroger 67853413Srogerstatic u_int 67955209Scges1371_wait_src_ready(struct es_info *es) 68054831Scg{ 68154831Scg u_int t, r; 68253413Sroger 68354831Scg for (t = 0; t < 500; t++) { 68454831Scg if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 68554831Scg return r; 68654831Scg DELAY(1000); 68754831Scg } 68854831Scg printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 68954831Scg return 0; 69053413Sroger} 69153413Sroger 69250724Scg/* -------------------------------------------------------------------- */ 69350724Scg 69450724Scg/* 69550724Scg * Probe and attach the card 69650724Scg */ 69750724Scg 69850724Scgstatic int 69950724Scges_pci_probe(device_t dev) 70050724Scg{ 70150724Scg if (pci_get_devid(dev) == ES1370_PCI_ID) { 70250724Scg device_set_desc(dev, "AudioPCI ES1370"); 70350724Scg return 0; 70456154Speter } else if (pci_get_devid(dev) == ES1371_PCI_ID || 70556154Speter pci_get_devid(dev) == ES1371_PCI_ID2) { 70653413Sroger device_set_desc(dev, "AudioPCI ES1371"); 70753413Sroger return 0; 70850724Scg } 70950724Scg return ENXIO; 71050724Scg} 71150724Scg 71250724Scgstatic int 71350724Scges_pci_attach(device_t dev) 71450724Scg{ 71550724Scg snddev_info *d; 71650724Scg u_int32_t data; 71750724Scg struct es_info *es = 0; 71850724Scg int type = 0; 71950724Scg int regid; 72050724Scg struct resource *reg = 0; 72150724Scg int mapped; 72250724Scg int irqid; 72350724Scg struct resource *irq = 0; 72450724Scg void *ih = 0; 72550724Scg char status[SND_STATUSLEN]; 72653413Sroger struct ac97_info *codec; 72754831Scg pcm_channel *ct = NULL; 72850724Scg 72950724Scg d = device_get_softc(dev); 73050724Scg if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 73150724Scg device_printf(dev, "cannot allocate softc\n"); 73250724Scg return ENXIO; 73350724Scg } 73450724Scg bzero(es, sizeof *es); 73550724Scg 73650724Scg mapped = 0; 73750724Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 73855426Scg data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 73955426Scg pci_write_config(dev, PCIR_COMMAND, data, 2); 74055426Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 74150724Scg if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 74250724Scg regid = MEM_MAP_REG; 74350724Scg type = SYS_RES_MEMORY; 74450724Scg reg = bus_alloc_resource(dev, type, ®id, 74550724Scg 0, ~0, 1, RF_ACTIVE); 74650724Scg if (reg) { 74750724Scg es->st = rman_get_bustag(reg); 74850724Scg es->sh = rman_get_bushandle(reg); 74950724Scg mapped++; 75050724Scg } 75150724Scg } 75250724Scg if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 75350724Scg regid = PCI_MAP_REG_START; 75450724Scg type = SYS_RES_IOPORT; 75550724Scg reg = bus_alloc_resource(dev, type, ®id, 75650724Scg 0, ~0, 1, RF_ACTIVE); 75750724Scg if (reg) { 75850724Scg es->st = rman_get_bustag(reg); 75950724Scg es->sh = rman_get_bushandle(reg); 76050724Scg mapped++; 76150724Scg } 76250724Scg } 76350724Scg if (mapped == 0) { 76450724Scg device_printf(dev, "unable to map register space\n"); 76550724Scg goto bad; 76650724Scg } 76754831Scg 76856154Speter if (pci_get_devid(dev) == ES1371_PCI_ID || 76956154Speter pci_get_devid(dev) == ES1371_PCI_ID2) { 77055209Scg if(-1 == es1371_init(es, pci_get_revid(dev))) { 77154831Scg device_printf(dev, "unable to initialize the card\n"); 77254831Scg goto bad; 77354831Scg } 77458384Scg codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec); 77554831Scg if (codec == NULL) goto bad; 77654831Scg /* our init routine does everything for us */ 77754831Scg /* set to NULL; flag mixer_init not to run the ac97_init */ 77854831Scg /* ac97_mixer.init = NULL; */ 77958905Scg if (mixer_init(d, &ac97_mixer, codec) == -1) goto bad; 78054831Scg ct = &es1371_chantemplate; 78154831Scg } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 78254831Scg if (-1 == es1370_init(es)) { 78354831Scg device_printf(dev, "unable to initialize the card\n"); 78454831Scg goto bad; 78554831Scg } 78654831Scg mixer_init(d, &es1370_mixer, es); 78754831Scg ct = &es1370_chantemplate; 78854831Scg } else goto bad; 78950724Scg 79050724Scg irqid = 0; 79150724Scg irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 79252046Simp 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 79350724Scg if (!irq 79450724Scg || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 79550724Scg device_printf(dev, "unable to map interrupt\n"); 79650724Scg goto bad; 79750724Scg } 79850724Scg 79950724Scg if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 80050724Scg /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 80150724Scg /*highaddr*/BUS_SPACE_MAXADDR, 80250724Scg /*filter*/NULL, /*filterarg*/NULL, 80350724Scg /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 80450724Scg /*flags*/0, &es->parent_dmat) != 0) { 80550724Scg device_printf(dev, "unable to create dma tag\n"); 80650724Scg goto bad; 80750724Scg } 80850724Scg 80950724Scg snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 81050724Scg (type == SYS_RES_IOPORT)? "io" : "memory", 81150724Scg rman_get_start(reg), rman_get_start(irq)); 81250724Scg 81350724Scg if (pcm_register(dev, es, 1, 1)) goto bad; 81454831Scg pcm_addchan(dev, PCMDIR_REC, ct, es); 81554831Scg pcm_addchan(dev, PCMDIR_PLAY, ct, es); 81650724Scg pcm_setstatus(dev, status); 81750724Scg 81850724Scg return 0; 81950724Scg 82050724Scg bad: 82150724Scg if (es) free(es, M_DEVBUF); 82250724Scg if (reg) bus_release_resource(dev, type, regid, reg); 82350724Scg if (ih) bus_teardown_intr(dev, irq, ih); 82450724Scg if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 82550724Scg return ENXIO; 82650724Scg} 82750724Scg 82850724Scgstatic device_method_t es_methods[] = { 82950724Scg /* Device interface */ 83050724Scg DEVMETHOD(device_probe, es_pci_probe), 83150724Scg DEVMETHOD(device_attach, es_pci_attach), 83250724Scg 83350724Scg { 0, 0 } 83450724Scg}; 83550724Scg 83650724Scgstatic driver_t es_driver = { 83750724Scg "pcm", 83850724Scg es_methods, 83950724Scg sizeof(snddev_info), 84050724Scg}; 84150724Scg 84250724Scgstatic devclass_t pcm_devclass; 84350724Scg 84450724ScgDRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0); 845