es137x.c revision 58384
1/* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 58384 2000-03-20 15:30:50Z cg $ 42 */ 43 44/* 45 * Part of this code was heavily inspired by the linux driver from 46 * Thomas Sailer (sailer@ife.ee.ethz.ch) 47 * Just about everything has been touched and reworked in some way but 48 * the all the underlying sequences/timing/register values are from 49 * Thomas' code. 50 * 51*/ 52 53#include <dev/sound/pcm/sound.h> 54#include <dev/sound/pcm/ac97.h> 55#include <dev/sound/pci/es137x.h> 56 57#include <pci/pcireg.h> 58#include <pci/pcivar.h> 59 60#include <sys/sysctl.h> 61 62static int debug = 0; 63SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 64 65#define MEM_MAP_REG 0x14 66 67/* PCI IDs of supported chips */ 68#define ES1370_PCI_ID 0x50001274 69#define ES1371_PCI_ID 0x13711274 70#define ES1371_PCI_ID2 0x13713274 71 72/* device private data */ 73struct es_info; 74 75struct es_chinfo { 76 struct es_info *parent; 77 pcm_channel *channel; 78 snd_dbuf *buffer; 79 int dir, num; 80 u_int32_t fmt; 81}; 82 83struct es_info { 84 bus_space_tag_t st; 85 bus_space_handle_t sh; 86 bus_dma_tag_t parent_dmat; 87 88 int num; 89 /* Contents of board's registers */ 90 u_long ctrl; 91 u_long sctrl; 92 struct es_chinfo pch, rch; 93}; 94 95/* -------------------------------------------------------------------- */ 96 97/* prototypes */ 98static void es_intr(void *); 99 100static void es1371_wrcodec(void *, int, u_int32_t); 101static u_int32_t es1371_rdcodec(void *, int); 102static u_int es1371_wait_src_ready(struct es_info *); 103static void es1371_src_write(struct es_info *, u_short, unsigned short); 104static u_int es1371_adc_rate(struct es_info *, u_int, int); 105static u_int es1371_dac_rate(struct es_info *, u_int, int); 106static int es1371_init(struct es_info *es, int); 107static int es1370_init(struct es_info *); 108static int es1370_wrcodec(struct es_info *, u_char, u_char); 109 110/* channel interface */ 111static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 112static int eschan_setdir(void *data, int dir); 113static int eschan_setformat(void *data, u_int32_t format); 114static int eschan1370_setspeed(void *data, u_int32_t speed); 115static int eschan1371_setspeed(void *data, u_int32_t speed); 116static int eschan_setblocksize(void *data, u_int32_t blocksize); 117static int eschan_trigger(void *data, int go); 118static int eschan_getptr(void *data); 119static pcmchan_caps *eschan_getcaps(void *data); 120 121static pcmchan_caps es_playcaps = { 122 4000, 48000, 123 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 124 AFMT_STEREO | AFMT_S16_LE 125}; 126 127static pcmchan_caps es_reccaps = { 128 4000, 48000, 129 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 130 AFMT_STEREO | AFMT_S16_LE 131}; 132 133static pcm_channel es1370_chantemplate = { 134 eschan_init, 135 eschan_setdir, 136 eschan_setformat, 137 eschan1370_setspeed, 138 eschan_setblocksize, 139 eschan_trigger, 140 eschan_getptr, 141 eschan_getcaps, 142}; 143 144static pcm_channel es1371_chantemplate = { 145 eschan_init, 146 eschan_setdir, 147 eschan_setformat, 148 eschan1371_setspeed, 149 eschan_setblocksize, 150 eschan_trigger, 151 eschan_getptr, 152 eschan_getcaps, 153}; 154 155/* -------------------------------------------------------------------- */ 156 157/* The es1370 mixer interface */ 158 159static int es1370_mixinit(snd_mixer *m); 160static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 161static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 162 163static snd_mixer es1370_mixer = { 164 "AudioPCI 1370 mixer", 165 es1370_mixinit, 166 es1370_mixset, 167 es1370_mixsetrecsrc, 168}; 169 170static const struct { 171 unsigned volidx:4; 172 unsigned left:4; 173 unsigned right:4; 174 unsigned stereo:1; 175 unsigned recmask:13; 176 unsigned avail:1; 177} mixtable[SOUND_MIXER_NRDEVICES] = { 178 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 179 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 180 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 181 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 182 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 183 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 184 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 185 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 186 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 187 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 188}; 189 190static int 191es1370_mixinit(snd_mixer *m) 192{ 193 int i; 194 u_int32_t v; 195 196 v = 0; 197 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 198 if (mixtable[i].avail) v |= (1 << i); 199 mix_setdevs(m, v); 200 v = 0; 201 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 202 if (mixtable[i].recmask) v |= (1 << i); 203 mix_setrecdevs(m, v); 204 return 0; 205} 206 207static int 208es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 209{ 210 int l, r, rl, rr; 211 212 if (!mixtable[dev].avail) return -1; 213 l = left; 214 r = mixtable[dev].stereo? right : l; 215 if (mixtable[dev].left == 0xf) { 216 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 217 } else { 218 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 219 } 220 if (mixtable[dev].stereo) { 221 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 222 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 223 } 224 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 225 return l | (r << 8); 226} 227 228static int 229es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 230{ 231 int i, j = 0; 232 233 if (src == 0) src = 1 << SOUND_MIXER_MIC; 234 src &= mix_getrecdevs(m); 235 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 236 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 237 238 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 239 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 240 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 241 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 242 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 243 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 244 return src; 245} 246 247static int 248es1370_wrcodec(struct es_info *es, u_char i, u_char data) 249{ 250 int wait = 100; /* 100 msec timeout */ 251 252 do { 253 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 254 STAT_CSTAT) == 0) { 255 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 256 ((u_short)i << CODEC_INDEX_SHIFT) | data); 257 return 0; 258 } 259 DELAY(1000); 260 } while (--wait); 261 printf("pcm: es1370_wrcodec timed out\n"); 262 return -1; 263} 264 265/* -------------------------------------------------------------------- */ 266 267/* channel interface */ 268static void * 269eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 270{ 271 struct es_info *es = devinfo; 272 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 273 274 ch->parent = es; 275 ch->channel = c; 276 ch->buffer = b; 277 ch->buffer->bufsize = ES_BUFFSIZE; 278 ch->num = ch->parent->num++; 279 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 280 return ch; 281} 282 283static int 284eschan_setdir(void *data, int dir) 285{ 286 struct es_chinfo *ch = data; 287 struct es_info *es = ch->parent; 288 289 if (dir == PCMDIR_PLAY) { 290 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 291 ES1370_REG_DAC2_FRAMEADR >> 8); 292 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 293 vtophys(ch->buffer->buf)); 294 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 295 (ch->buffer->bufsize >> 2) - 1); 296 } else { 297 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 298 ES1370_REG_ADC_FRAMEADR >> 8); 299 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 300 vtophys(ch->buffer->buf)); 301 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 302 (ch->buffer->bufsize >> 2) - 1); 303 } 304 ch->dir = dir; 305 return 0; 306} 307 308static int 309eschan_setformat(void *data, u_int32_t format) 310{ 311 struct es_chinfo *ch = data; 312 struct es_info *es = ch->parent; 313 314 if (ch->dir == PCMDIR_PLAY) { 315 es->sctrl &= ~SCTRL_P2FMT; 316 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 317 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 318 } else { 319 es->sctrl &= ~SCTRL_R1FMT; 320 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 321 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 322 } 323 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 324 ch->fmt = format; 325 return 0; 326} 327 328static int 329eschan1370_setspeed(void *data, u_int32_t speed) 330{ 331 struct es_chinfo *ch = data; 332 struct es_info *es = ch->parent; 333 334 es->ctrl &= ~CTRL_PCLKDIV; 335 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 336 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 337 /* rec/play speeds locked together - should indicate in flags */ 338 return speed; /* XXX calc real speed */ 339} 340 341int 342eschan1371_setspeed(void *data, u_int32_t speed) 343{ 344 struct es_chinfo *ch = data; 345 struct es_info *es = ch->parent; 346 347 if (ch->dir == PCMDIR_PLAY) { 348 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 349 } else { 350 return es1371_adc_rate(es, speed, 1); /* record */ 351 } 352} 353 354static int 355eschan_setblocksize(void *data, u_int32_t blocksize) 356{ 357 return blocksize; 358} 359 360static int 361eschan_trigger(void *data, int go) 362{ 363 struct es_chinfo *ch = data; 364 struct es_info *es = ch->parent; 365 unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 366 367 if (go == PCMTRIG_EMLDMAWR) return 0; 368 if (ch->dir == PCMDIR_PLAY) { 369 if (go == PCMTRIG_START) { 370 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 371 es->ctrl |= CTRL_DAC2_EN; 372 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 373 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 374 SCTRL_P2DACSEN); 375 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 376 bus_space_write_4(es->st, es->sh, 377 ES1370_REG_DAC2_SCOUNT, cnt); 378 } else es->ctrl &= ~CTRL_DAC2_EN; 379 } else { 380 if (go == PCMTRIG_START) { 381 es->ctrl |= CTRL_ADC_EN; 382 es->sctrl &= ~SCTRL_R1LOOPSEL; 383 es->sctrl |= SCTRL_R1INTEN; 384 bus_space_write_4(es->st, es->sh, 385 ES1370_REG_ADC_SCOUNT, cnt); 386 } else es->ctrl &= ~CTRL_ADC_EN; 387 } 388 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 389 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 390 return 0; 391} 392 393static int 394eschan_getptr(void *data) 395{ 396 struct es_chinfo *ch = data; 397 struct es_info *es = ch->parent; 398 if (ch->dir == PCMDIR_PLAY) { 399 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 400 ES1370_REG_DAC2_FRAMECNT >> 8); 401 return (bus_space_read_4(es->st, es->sh, 402 ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 403 } else { 404 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 405 ES1370_REG_ADC_FRAMECNT >> 8); 406 return (bus_space_read_4(es->st, es->sh, 407 ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 408 } 409} 410 411static pcmchan_caps * 412eschan_getcaps(void *data) 413{ 414 struct es_chinfo *ch = data; 415 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 416} 417 418/* The interrupt handler */ 419static void 420es_intr(void *p) 421{ 422 struct es_info *es = p; 423 unsigned intsrc, sctrl; 424 425 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 426 if ((intsrc & STAT_INTR) == 0) return; 427 428 sctrl = es->sctrl; 429 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 430 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 431 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 432 433 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 434 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 435 436 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 437 if (intsrc & STAT_DAC1); 438 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 439} 440 441/* ES1370 specific */ 442static int 443es1370_init(struct es_info *es) 444{ 445 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 446 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 447 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 448 449 es->sctrl = 0; 450 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 451 452 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 453 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 454 * {LR,B}CLK2 and run off the LRCLK2 455 * PLL; program DAC_SYNC=0! */ 456 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 457 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 458 459 return 0; 460} 461 462/* ES1371 specific */ 463int 464es1371_init(struct es_info *es, int rev) 465{ 466 int idx; 467 468 if (debug > 0) printf("es_init\n"); 469 470 es->num = 0; 471 es->ctrl = 0; 472 es->sctrl = 0; 473 /* initialize the chips */ 474 if (rev == 7 || rev >= 9) { 475#define ES1371_BINTSUMM_OFF 0x07 476 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 477 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 478 } else { /* pre ac97 2.1 card */ 479 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 480 if (debug > 0) printf("es_init pre ac97 2.1\n"); 481 } 482 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 483 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 484 /* AC'97 warm reset to start the bitclk */ 485 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 486 DELAY(2000); 487 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 488 /* Init the sample rate converter */ 489 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 490 for (idx = 0; idx < 0x80; idx++) 491 es1371_src_write(es, idx, 0); 492 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 493 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 494 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 495 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 496 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 497 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 498 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 499 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 500 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 501 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 502 es1371_adc_rate (es, 22050, 1); 503 es1371_dac_rate (es, 22050, 1); 504 es1371_dac_rate (es, 22050, 2); 505 /* WARNING: 506 * enabling the sample rate converter without properly programming 507 * its parameters causes the chip to lock up (the SRC busy bit will 508 * be stuck high, and I've found no way to rectify this other than 509 * power cycle) 510 */ 511 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 512 513 return (0); 514} 515 516static void 517es1371_wrcodec(void *s, int addr, u_int32_t data) 518{ 519 int sl; 520 unsigned t, x; 521 struct es_info *es = (struct es_info*)s; 522 523 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 524 525 for (t = 0; t < 0x1000; t++) 526 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 527 break; 528 sl = spltty(); 529 /* save the current state for later */ 530 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 531 /* enable SRC state data in SRC mux */ 532 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 533 (es1371_wait_src_ready(s) & 534 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 535 /* wait for a SAFE time to write addr/data and then do it, dammit */ 536 for (t = 0; t < 0x1000; t++) 537 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 538 break; 539 540 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 541 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 542 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 543 544 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 545 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 546 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 547 /* restore SRC reg */ 548 es1371_wait_src_ready(s); 549 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 550 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 551 splx(sl); 552} 553 554static u_int32_t 555es1371_rdcodec(void *s, int addr) 556{ 557 int sl; 558 unsigned t, x; 559 struct es_info *es = (struct es_info *)s; 560 561 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 562 563 for (t = 0; t < 0x1000; t++) 564 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 565 break; 566 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 567 568 sl = spltty(); 569 570 /* save the current state for later */ 571 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 572 /* enable SRC state data in SRC mux */ 573 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 574 (es1371_wait_src_ready(s) & 575 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 576 /* wait for a SAFE time to write addr/data and then do it, dammit */ 577 for (t = 0; t < 0x5000; t++) 578 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 579 break; 580 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 581 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 582 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 583 584 /* restore SRC reg */ 585 es1371_wait_src_ready(s); 586 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 587 588 splx(sl); 589 590 /* now wait for the stinkin' data (RDY) */ 591 for (t = 0; t < 0x1000; t++) 592 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 593 break; 594 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 595 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 596} 597 598static u_int 599es1371_src_read(struct es_info *es, u_short reg) 600{ 601 unsigned int r; 602 603 r = es1371_wait_src_ready(es) & 604 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 605 r |= ES1371_SRC_RAM_ADDRO(reg); 606 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 607 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 608} 609 610static void 611es1371_src_write(struct es_info *es, u_short reg, u_short data){ 612 u_int r; 613 614 r = es1371_wait_src_ready(es) & 615 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 616 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 617 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 618 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 619} 620 621static u_int 622es1371_adc_rate(struct es_info *es, u_int rate, int set) 623{ 624 u_int n, truncm, freq, result; 625 626 if (rate > 48000) rate = 48000; 627 if (rate < 4000) rate = 4000; 628 n = rate / 3000; 629 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 630 n--; 631 truncm = (21 * n - 1) | 1; 632 freq = ((48000UL << 15) / rate) * n; 633 result = (48000UL << 15) / (freq / n); 634 if (set) { 635 if (rate >= 24000) { 636 if (truncm > 239) truncm = 239; 637 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 638 (((239 - truncm) >> 1) << 9) | (n << 4)); 639 } else { 640 if (truncm > 119) truncm = 119; 641 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 642 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 643 } 644 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 645 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 646 0x00ff) | ((freq >> 5) & 0xfc00)); 647 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 648 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 649 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 650 } 651 return result; 652} 653 654static u_int 655es1371_dac_rate(struct es_info *es, u_int rate, int set) 656{ 657 u_int freq, r, result, dac, dis; 658 659 if (rate > 48000) rate = 48000; 660 if (rate < 4000) rate = 4000; 661 freq = (rate << 15) / 3000; 662 result = (freq * 3000) >> 15; 663 if (set) { 664 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 665 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 666 667 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 668 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 669 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 670 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 671 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 672 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 673 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 674 } 675 return result; 676} 677 678static u_int 679es1371_wait_src_ready(struct es_info *es) 680{ 681 u_int t, r; 682 683 for (t = 0; t < 500; t++) { 684 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 685 return r; 686 DELAY(1000); 687 } 688 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 689 return 0; 690} 691 692/* -------------------------------------------------------------------- */ 693 694/* 695 * Probe and attach the card 696 */ 697 698static int 699es_pci_probe(device_t dev) 700{ 701 if (pci_get_devid(dev) == ES1370_PCI_ID) { 702 device_set_desc(dev, "AudioPCI ES1370"); 703 return 0; 704 } else if (pci_get_devid(dev) == ES1371_PCI_ID || 705 pci_get_devid(dev) == ES1371_PCI_ID2) { 706 device_set_desc(dev, "AudioPCI ES1371"); 707 return 0; 708 } 709 return ENXIO; 710} 711 712static int 713es_pci_attach(device_t dev) 714{ 715 snddev_info *d; 716 u_int32_t data; 717 struct es_info *es = 0; 718 int type = 0; 719 int regid; 720 struct resource *reg = 0; 721 int mapped; 722 int irqid; 723 struct resource *irq = 0; 724 void *ih = 0; 725 char status[SND_STATUSLEN]; 726 struct ac97_info *codec; 727 pcm_channel *ct = NULL; 728 729 d = device_get_softc(dev); 730 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 731 device_printf(dev, "cannot allocate softc\n"); 732 return ENXIO; 733 } 734 bzero(es, sizeof *es); 735 736 mapped = 0; 737 data = pci_read_config(dev, PCIR_COMMAND, 2); 738 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 739 pci_write_config(dev, PCIR_COMMAND, data, 2); 740 data = pci_read_config(dev, PCIR_COMMAND, 2); 741 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 742 regid = MEM_MAP_REG; 743 type = SYS_RES_MEMORY; 744 reg = bus_alloc_resource(dev, type, ®id, 745 0, ~0, 1, RF_ACTIVE); 746 if (reg) { 747 es->st = rman_get_bustag(reg); 748 es->sh = rman_get_bushandle(reg); 749 mapped++; 750 } 751 } 752 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 753 regid = PCI_MAP_REG_START; 754 type = SYS_RES_IOPORT; 755 reg = bus_alloc_resource(dev, type, ®id, 756 0, ~0, 1, RF_ACTIVE); 757 if (reg) { 758 es->st = rman_get_bustag(reg); 759 es->sh = rman_get_bushandle(reg); 760 mapped++; 761 } 762 } 763 if (mapped == 0) { 764 device_printf(dev, "unable to map register space\n"); 765 goto bad; 766 } 767 768 if (pci_get_devid(dev) == ES1371_PCI_ID || 769 pci_get_devid(dev) == ES1371_PCI_ID2) { 770 if(-1 == es1371_init(es, pci_get_revid(dev))) { 771 device_printf(dev, "unable to initialize the card\n"); 772 goto bad; 773 } 774 codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec); 775 if (codec == NULL) goto bad; 776 /* our init routine does everything for us */ 777 /* set to NULL; flag mixer_init not to run the ac97_init */ 778 /* ac97_mixer.init = NULL; */ 779 mixer_init(d, &ac97_mixer, codec); 780 ct = &es1371_chantemplate; 781 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 782 if (-1 == es1370_init(es)) { 783 device_printf(dev, "unable to initialize the card\n"); 784 goto bad; 785 } 786 mixer_init(d, &es1370_mixer, es); 787 ct = &es1370_chantemplate; 788 } else goto bad; 789 790 irqid = 0; 791 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 792 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 793 if (!irq 794 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 795 device_printf(dev, "unable to map interrupt\n"); 796 goto bad; 797 } 798 799 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 800 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 801 /*highaddr*/BUS_SPACE_MAXADDR, 802 /*filter*/NULL, /*filterarg*/NULL, 803 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 804 /*flags*/0, &es->parent_dmat) != 0) { 805 device_printf(dev, "unable to create dma tag\n"); 806 goto bad; 807 } 808 809 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 810 (type == SYS_RES_IOPORT)? "io" : "memory", 811 rman_get_start(reg), rman_get_start(irq)); 812 813 if (pcm_register(dev, es, 1, 1)) goto bad; 814 pcm_addchan(dev, PCMDIR_REC, ct, es); 815 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 816 pcm_setstatus(dev, status); 817 818 return 0; 819 820 bad: 821 if (es) free(es, M_DEVBUF); 822 if (reg) bus_release_resource(dev, type, regid, reg); 823 if (ih) bus_teardown_intr(dev, irq, ih); 824 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 825 return ENXIO; 826} 827 828static device_method_t es_methods[] = { 829 /* Device interface */ 830 DEVMETHOD(device_probe, es_pci_probe), 831 DEVMETHOD(device_attach, es_pci_attach), 832 833 { 0, 0 } 834}; 835 836static driver_t es_driver = { 837 "pcm", 838 es_methods, 839 sizeof(snddev_info), 840}; 841 842static devclass_t pcm_devclass; 843 844DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0); 845