smbconf.c revision 43975 
1/*-
2 * Copyright (c) 1998 Nicolas Souchu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 *	$Id: smbconf.c,v 1.4 1999/01/09 18:08:23 nsouch Exp $
27 *
28 */
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/kernel.h>
32#include <sys/malloc.h>
33#include <sys/module.h>
34#include <sys/bus.h>
35
36#include <dev/smbus/smbconf.h>
37#include <dev/smbus/smbus.h>
38#include "smbus_if.h"
39
40/*
41 * smbus_intr()
42 */
43void
44smbus_intr(device_t bus, u_char devaddr, char low, char high, int error)
45{
46	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
47
48	/* call owner's intr routine */
49	if (sc->owner)
50		SMBUS_INTR(sc->owner, devaddr, low, high, error);
51
52	return;
53}
54
55/*
56 * smbus_alloc_bus()
57 *
58 * Allocate a new bus connected to the given parent device
59 */
60device_t
61smbus_alloc_bus(device_t parent)
62{
63	device_t child;
64
65	/* add the bus to the parent */
66	child = device_add_child(parent, "smbus", -1, NULL);
67
68	return (child);
69}
70
71static int
72smbus_poll(struct smbus_softc *sc, int how)
73{
74	int error;
75
76	switch (how) {
77	case (SMB_WAIT | SMB_INTR):
78		error = tsleep(sc, SMBPRI|PCATCH, "smbreq", 0);
79		break;
80
81	case (SMB_WAIT | SMB_NOINTR):
82		error = tsleep(sc, SMBPRI, "smbreq", 0);
83		break;
84
85	default:
86		return (EWOULDBLOCK);
87		break;
88	}
89
90	return (error);
91}
92
93/*
94 * smbus_request_bus()
95 *
96 * Allocate the device to perform transfers.
97 *
98 * how	: SMB_WAIT or SMB_DONTWAIT
99 */
100int
101smbus_request_bus(device_t bus, device_t dev, int how)
102{
103	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
104	int s, error = 0;
105
106	/* first, ask the underlying layers if the request is ok */
107	error = SMBUS_CALLBACK(device_get_parent(bus), SMB_REQUEST_BUS,
108				(caddr_t)&how);
109
110	while (!error) {
111		s = splhigh();
112		if (sc->owner && sc->owner != dev) {
113			splx(s);
114
115			error = smbus_poll(sc, how);
116		} else {
117			sc->owner = dev;
118
119			splx(s);
120			return (0);
121		}
122
123		/* free any allocated resource */
124		if (error)
125			SMBUS_CALLBACK(device_get_parent(bus), SMB_RELEASE_BUS,
126					(caddr_t)&how);
127	}
128
129	return (error);
130}
131
132/*
133 * smbus_release_bus()
134 *
135 * Release the device allocated with smbus_request_dev()
136 */
137int
138smbus_release_bus(device_t bus, device_t dev)
139{
140	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
141	int s, error;
142
143	/* first, ask the underlying layers if the release is ok */
144	error = SMBUS_CALLBACK(device_get_parent(bus), SMB_RELEASE_BUS, NULL);
145
146	if (error)
147		return (error);
148
149	s = splhigh();
150	if (sc->owner != dev) {
151		splx(s);
152		return (EACCES);
153	}
154
155	sc->owner = 0;
156	splx(s);
157
158	/* wakeup waiting processes */
159	wakeup(sc);
160
161	return (0);
162}
163
164/*
165 * smbus_get_addr()
166 *
167 * Get the I2C 7 bits address of the device
168 */
169u_char
170smbus_get_addr(device_t dev)
171{
172	uintptr_t addr;
173	device_t parent = device_get_parent(dev);
174
175	BUS_READ_IVAR(parent, dev, SMBUS_IVAR_ADDR, &addr);
176
177	return ((u_char)addr);
178}
179