sfxge_port.c revision 279184
1227569Sphilip/*- 2227569Sphilip * Copyright (c) 2010-2011 Solarflare Communications, Inc. 3227569Sphilip * All rights reserved. 4227569Sphilip * 5227569Sphilip * This software was developed in part by Philip Paeps under contract for 6227569Sphilip * Solarflare Communications, Inc. 7227569Sphilip * 8227569Sphilip * Redistribution and use in source and binary forms, with or without 9227569Sphilip * modification, are permitted provided that the following conditions 10227569Sphilip * are met: 11227569Sphilip * 1. Redistributions of source code must retain the above copyright 12227569Sphilip * notice, this list of conditions and the following disclaimer. 13227569Sphilip * 2. Redistributions in binary form must reproduce the above copyright 14227569Sphilip * notice, this list of conditions and the following disclaimer in the 15227569Sphilip * documentation and/or other materials provided with the distribution. 16227569Sphilip * 17227569Sphilip * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18227569Sphilip * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19227569Sphilip * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20227569Sphilip * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21227569Sphilip * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22227569Sphilip * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23227569Sphilip * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24227569Sphilip * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25227569Sphilip * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26227569Sphilip * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27227569Sphilip * SUCH DAMAGE. 28227569Sphilip */ 29227569Sphilip 30227569Sphilip#include <sys/cdefs.h> 31227569Sphilip__FBSDID("$FreeBSD: head/sys/dev/sfxge/sfxge_port.c 279184 2015-02-22 19:25:57Z arybchik $"); 32227569Sphilip 33227569Sphilip#include <sys/types.h> 34227699Sphilip#include <sys/limits.h> 35227569Sphilip#include <net/ethernet.h> 36227569Sphilip#include <net/if_dl.h> 37227569Sphilip 38227569Sphilip#include "common/efx.h" 39227569Sphilip 40227569Sphilip#include "sfxge.h" 41227569Sphilip 42227569Sphilipstatic int 43227569Sphilipsfxge_mac_stat_update(struct sfxge_softc *sc) 44227569Sphilip{ 45227569Sphilip struct sfxge_port *port = &sc->port; 46227569Sphilip efsys_mem_t *esmp = &(port->mac_stats.dma_buf); 47227569Sphilip clock_t now; 48227569Sphilip unsigned int count; 49227569Sphilip int rc; 50227569Sphilip 51278248Sarybchik SFXGE_PORT_LOCK_ASSERT_OWNED(port); 52227569Sphilip 53227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) { 54227569Sphilip rc = 0; 55227569Sphilip goto out; 56227569Sphilip } 57227569Sphilip 58227569Sphilip now = ticks; 59227569Sphilip if (now - port->mac_stats.update_time < hz) { 60227569Sphilip rc = 0; 61227569Sphilip goto out; 62227569Sphilip } 63227569Sphilip 64227569Sphilip port->mac_stats.update_time = now; 65227569Sphilip 66227569Sphilip /* If we're unlucky enough to read statistics wduring the DMA, wait 67227569Sphilip * up to 10ms for it to finish (typically takes <500us) */ 68227569Sphilip for (count = 0; count < 100; ++count) { 69227569Sphilip EFSYS_PROBE1(wait, unsigned int, count); 70227569Sphilip 71227569Sphilip /* Synchronize the DMA memory for reading */ 72227569Sphilip bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 73227569Sphilip BUS_DMASYNC_POSTREAD); 74227569Sphilip 75227569Sphilip /* Try to update the cached counters */ 76227569Sphilip if ((rc = efx_mac_stats_update(sc->enp, esmp, 77272325Sgnn port->mac_stats.decode_buf, NULL)) != EAGAIN) 78227569Sphilip goto out; 79227569Sphilip 80227569Sphilip DELAY(100); 81227569Sphilip } 82227569Sphilip 83227569Sphilip rc = ETIMEDOUT; 84227569Sphilipout: 85272325Sgnn return (rc); 86227569Sphilip} 87227569Sphilip 88279184Sarybchikuint64_t 89279184Sarybchiksfxge_get_counter(struct ifnet *ifp, ift_counter c) 90279184Sarybchik{ 91279184Sarybchik struct sfxge_softc *sc = ifp->if_softc; 92279184Sarybchik uint64_t *mac_stats; 93279184Sarybchik uint64_t val; 94279184Sarybchik 95279184Sarybchik SFXGE_PORT_LOCK(&sc->port); 96279184Sarybchik 97279184Sarybchik /* Ignore error and use old values */ 98279184Sarybchik (void)sfxge_mac_stat_update(sc); 99279184Sarybchik 100279184Sarybchik mac_stats = (uint64_t *)sc->port.mac_stats.decode_buf; 101279184Sarybchik 102279184Sarybchik switch (c) { 103279184Sarybchik case IFCOUNTER_IPACKETS: 104279184Sarybchik val = mac_stats[EFX_MAC_RX_PKTS]; 105279184Sarybchik break; 106279184Sarybchik case IFCOUNTER_IERRORS: 107279184Sarybchik val = mac_stats[EFX_MAC_RX_ERRORS]; 108279184Sarybchik break; 109279184Sarybchik case IFCOUNTER_OPACKETS: 110279184Sarybchik val = mac_stats[EFX_MAC_TX_PKTS]; 111279184Sarybchik break; 112279184Sarybchik case IFCOUNTER_OERRORS: 113279184Sarybchik val = mac_stats[EFX_MAC_TX_ERRORS]; 114279184Sarybchik break; 115279184Sarybchik case IFCOUNTER_COLLISIONS: 116279184Sarybchik val = mac_stats[EFX_MAC_TX_SGL_COL_PKTS] + 117279184Sarybchik mac_stats[EFX_MAC_TX_MULT_COL_PKTS] + 118279184Sarybchik mac_stats[EFX_MAC_TX_EX_COL_PKTS] + 119279184Sarybchik mac_stats[EFX_MAC_TX_LATE_COL_PKTS]; 120279184Sarybchik break; 121279184Sarybchik case IFCOUNTER_IBYTES: 122279184Sarybchik val = mac_stats[EFX_MAC_RX_OCTETS]; 123279184Sarybchik break; 124279184Sarybchik case IFCOUNTER_OBYTES: 125279184Sarybchik val = mac_stats[EFX_MAC_TX_OCTETS]; 126279184Sarybchik break; 127279184Sarybchik case IFCOUNTER_OMCASTS: 128279184Sarybchik val = mac_stats[EFX_MAC_TX_MULTICST_PKTS] + 129279184Sarybchik mac_stats[EFX_MAC_TX_BRDCST_PKTS]; 130279184Sarybchik break; 131279184Sarybchik case IFCOUNTER_OQDROPS: 132279184Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 133279184Sarybchik return (sfxge_tx_get_drops(sc)); 134279184Sarybchik case IFCOUNTER_IMCASTS: 135279184Sarybchik /* if_imcasts is maintained in net/if_ethersubr.c */ 136279184Sarybchik case IFCOUNTER_IQDROPS: 137279184Sarybchik /* if_iqdrops is maintained in net/if_ethersubr.c */ 138279184Sarybchik case IFCOUNTER_NOPROTO: 139279184Sarybchik /* if_noproto is maintained in net/if_ethersubr.c */ 140279184Sarybchik default: 141279184Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 142279184Sarybchik return (if_get_counter_default(ifp, c)); 143279184Sarybchik } 144279184Sarybchik 145279184Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 146279184Sarybchik 147279184Sarybchik return (val); 148279184Sarybchik} 149279184Sarybchik 150227569Sphilipstatic int 151227569Sphilipsfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS) 152227569Sphilip{ 153227569Sphilip struct sfxge_softc *sc = arg1; 154227569Sphilip unsigned int id = arg2; 155227569Sphilip int rc; 156278838Sarybchik uint64_t val; 157227569Sphilip 158278248Sarybchik SFXGE_PORT_LOCK(&sc->port); 159278838Sarybchik if ((rc = sfxge_mac_stat_update(sc)) == 0) 160278838Sarybchik val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id]; 161278838Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 162227569Sphilip 163278838Sarybchik if (rc == 0) 164278838Sarybchik rc = SYSCTL_OUT(req, &val, sizeof(val)); 165278248Sarybchik return (rc); 166227569Sphilip} 167227569Sphilip 168227569Sphilipstatic void 169227569Sphilipsfxge_mac_stat_init(struct sfxge_softc *sc) 170227569Sphilip{ 171227569Sphilip struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 172227569Sphilip struct sysctl_oid_list *stat_list; 173227569Sphilip unsigned int id; 174227569Sphilip const char *name; 175227569Sphilip 176227569Sphilip stat_list = SYSCTL_CHILDREN(sc->stats_node); 177227569Sphilip 178227569Sphilip /* Initialise the named stats */ 179227569Sphilip for (id = 0; id < EFX_MAC_NSTATS; id++) { 180227569Sphilip name = efx_mac_stat_name(sc->enp, id); 181227569Sphilip SYSCTL_ADD_PROC( 182227569Sphilip ctx, stat_list, 183227569Sphilip OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD, 184227569Sphilip sc, id, sfxge_mac_stat_handler, "Q", 185227569Sphilip ""); 186227569Sphilip } 187227569Sphilip} 188227569Sphilip 189227569Sphilip#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 190227569Sphilip 191227569Sphilipstatic unsigned int 192227569Sphilipsfxge_port_wanted_fc(struct sfxge_softc *sc) 193227569Sphilip{ 194227569Sphilip struct ifmedia_entry *ifm = sc->media.ifm_cur; 195227569Sphilip 196227569Sphilip if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO)) 197272325Sgnn return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE); 198272325Sgnn return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) | 199272325Sgnn ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0)); 200227569Sphilip} 201227569Sphilip 202227569Sphilipstatic unsigned int 203227569Sphilipsfxge_port_link_fc_ifm(struct sfxge_softc *sc) 204227569Sphilip{ 205227569Sphilip unsigned int wanted_fc, link_fc; 206227569Sphilip 207227569Sphilip efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 208227569Sphilip return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) | 209227569Sphilip ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0); 210227569Sphilip} 211227569Sphilip 212227569Sphilip#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 213227569Sphilip 214227569Sphilipstatic unsigned int 215227569Sphilipsfxge_port_wanted_fc(struct sfxge_softc *sc) 216227569Sphilip{ 217272325Sgnn return (sc->port.wanted_fc); 218227569Sphilip} 219227569Sphilip 220227569Sphilipstatic unsigned int 221227569Sphilipsfxge_port_link_fc_ifm(struct sfxge_softc *sc) 222227569Sphilip{ 223272325Sgnn return (0); 224227569Sphilip} 225227569Sphilip 226227569Sphilipstatic int 227227569Sphilipsfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS) 228227569Sphilip{ 229227569Sphilip struct sfxge_softc *sc; 230227569Sphilip struct sfxge_port *port; 231227569Sphilip unsigned int fcntl; 232227569Sphilip int error; 233227569Sphilip 234227569Sphilip sc = arg1; 235227569Sphilip port = &sc->port; 236227569Sphilip 237272325Sgnn if (req->newptr != NULL) { 238227569Sphilip if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0) 239278838Sarybchik return (error); 240227569Sphilip 241278838Sarybchik SFXGE_PORT_LOCK(port); 242227569Sphilip 243278838Sarybchik if (port->wanted_fc != fcntl) { 244278838Sarybchik if (port->init_state == SFXGE_PORT_STARTED) 245278838Sarybchik error = efx_mac_fcntl_set(sc->enp, 246278838Sarybchik port->wanted_fc, 247278838Sarybchik B_TRUE); 248278838Sarybchik if (error == 0) 249278838Sarybchik port->wanted_fc = fcntl; 250278838Sarybchik } 251227569Sphilip 252278838Sarybchik SFXGE_PORT_UNLOCK(port); 253278838Sarybchik } else { 254278838Sarybchik SFXGE_PORT_LOCK(port); 255278838Sarybchik fcntl = port->wanted_fc; 256278838Sarybchik SFXGE_PORT_UNLOCK(port); 257227569Sphilip 258278838Sarybchik error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl)); 259227569Sphilip } 260227569Sphilip 261227569Sphilip return (error); 262227569Sphilip} 263227569Sphilip 264227569Sphilipstatic int 265227569Sphilipsfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS) 266227569Sphilip{ 267227569Sphilip struct sfxge_softc *sc; 268227569Sphilip struct sfxge_port *port; 269227569Sphilip unsigned int wanted_fc, link_fc; 270227569Sphilip 271227569Sphilip sc = arg1; 272227569Sphilip port = &sc->port; 273227569Sphilip 274278221Sarybchik SFXGE_PORT_LOCK(port); 275227569Sphilip if (port->init_state == SFXGE_PORT_STARTED && SFXGE_LINK_UP(sc)) 276227569Sphilip efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 277227569Sphilip else 278227569Sphilip link_fc = 0; 279278221Sarybchik SFXGE_PORT_UNLOCK(port); 280227569Sphilip 281278838Sarybchik return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc))); 282227569Sphilip} 283227569Sphilip 284227569Sphilip#endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */ 285227569Sphilip 286272452Sgnnstatic const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = { 287227699Sphilip [EFX_LINK_10HDX] = IF_Mbps(10), 288227699Sphilip [EFX_LINK_10FDX] = IF_Mbps(10), 289227699Sphilip [EFX_LINK_100HDX] = IF_Mbps(100), 290227699Sphilip [EFX_LINK_100FDX] = IF_Mbps(100), 291227699Sphilip [EFX_LINK_1000HDX] = IF_Gbps(1), 292227699Sphilip [EFX_LINK_1000FDX] = IF_Gbps(1), 293272452Sgnn [EFX_LINK_10000FDX] = IF_Gbps(10), 294227569Sphilip}; 295227569Sphilip 296227569Sphilipvoid 297227569Sphilipsfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode) 298227569Sphilip{ 299227569Sphilip struct sfxge_port *port; 300227569Sphilip int link_state; 301272325Sgnn 302227569Sphilip port = &sc->port; 303227569Sphilip 304227569Sphilip if (port->link_mode == mode) 305227569Sphilip return; 306227569Sphilip 307227569Sphilip port->link_mode = mode; 308227569Sphilip 309227569Sphilip /* Push link state update to the OS */ 310227569Sphilip link_state = (port->link_mode != EFX_LINK_DOWN ? 311227569Sphilip LINK_STATE_UP : LINK_STATE_DOWN); 312227699Sphilip sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode]; 313227569Sphilip if_link_state_change(sc->ifnet, link_state); 314227569Sphilip} 315227569Sphilip 316227569Sphilipstatic void 317227569Sphilipsfxge_mac_poll_work(void *arg, int npending) 318227569Sphilip{ 319227569Sphilip struct sfxge_softc *sc; 320227569Sphilip efx_nic_t *enp; 321227569Sphilip struct sfxge_port *port; 322227569Sphilip efx_link_mode_t mode; 323227569Sphilip 324227569Sphilip sc = (struct sfxge_softc *)arg; 325227569Sphilip enp = sc->enp; 326227569Sphilip port = &sc->port; 327227569Sphilip 328278221Sarybchik SFXGE_PORT_LOCK(port); 329227569Sphilip 330227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) 331227569Sphilip goto done; 332227569Sphilip 333227569Sphilip /* This may sleep waiting for MCDI completion */ 334227569Sphilip (void)efx_port_poll(enp, &mode); 335227569Sphilip sfxge_mac_link_update(sc, mode); 336227569Sphilip 337227569Sphilipdone: 338278221Sarybchik SFXGE_PORT_UNLOCK(port); 339227569Sphilip} 340227569Sphilip 341227569Sphilipstatic int 342227569Sphilipsfxge_mac_filter_set_locked(struct sfxge_softc *sc) 343227569Sphilip{ 344227569Sphilip unsigned int bucket[EFX_MAC_HASH_BITS]; 345227569Sphilip struct ifnet *ifp = sc->ifnet; 346227569Sphilip struct ifmultiaddr *ifma; 347227569Sphilip struct sockaddr_dl *sa; 348227569Sphilip efx_nic_t *enp = sc->enp; 349227569Sphilip unsigned int index; 350227569Sphilip int rc; 351227569Sphilip 352227569Sphilip /* Set promisc-unicast and broadcast filter bits */ 353227569Sphilip if ((rc = efx_mac_filter_set(enp, !!(ifp->if_flags & IFF_PROMISC), 354227569Sphilip B_TRUE)) != 0) 355272325Sgnn return (rc); 356227569Sphilip 357227569Sphilip /* Set multicast hash filter */ 358227569Sphilip if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { 359227569Sphilip for (index = 0; index < EFX_MAC_HASH_BITS; index++) 360227569Sphilip bucket[index] = 1; 361227569Sphilip } else { 362227569Sphilip /* Broadcast frames also go through the multicast 363227569Sphilip * filter, and the broadcast address hashes to 364227569Sphilip * 0xff. */ 365227569Sphilip bucket[0xff] = 1; 366227569Sphilip 367229613Sjhb if_maddr_rlock(ifp); 368227569Sphilip TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 369227569Sphilip if (ifma->ifma_addr->sa_family == AF_LINK) { 370227569Sphilip sa = (struct sockaddr_dl *)ifma->ifma_addr; 371227569Sphilip index = ether_crc32_le(LLADDR(sa), 6) & 0xff; 372227569Sphilip bucket[index] = 1; 373227569Sphilip } 374227569Sphilip } 375229613Sjhb if_maddr_runlock(ifp); 376227569Sphilip } 377272325Sgnn return (efx_mac_hash_set(enp, bucket)); 378227569Sphilip} 379227569Sphilip 380227569Sphilipint 381227569Sphilipsfxge_mac_filter_set(struct sfxge_softc *sc) 382227569Sphilip{ 383227569Sphilip struct sfxge_port *port = &sc->port; 384227569Sphilip int rc; 385227569Sphilip 386278221Sarybchik SFXGE_PORT_LOCK(port); 387264772Sgnn /* 388264772Sgnn * The function may be called without softc_lock held in the 389264772Sgnn * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler 390264772Sgnn * checks IFF_DRV_RUNNING flag which implies port started, but 391264772Sgnn * it is not guaranteed to remain. softc_lock shared lock can't 392264772Sgnn * be held in the case of these ioctls processing, since it 393264772Sgnn * results in failure where kernel complains that non-sleepable 394264772Sgnn * lock is held in sleeping thread. Both problems are repeatable 395264772Sgnn * on LAG with LACP proto bring up. 396264772Sgnn */ 397264772Sgnn if (port->init_state == SFXGE_PORT_STARTED) 398264772Sgnn rc = sfxge_mac_filter_set_locked(sc); 399264772Sgnn else 400264772Sgnn rc = 0; 401278221Sarybchik SFXGE_PORT_UNLOCK(port); 402272325Sgnn return (rc); 403227569Sphilip} 404227569Sphilip 405227569Sphilipvoid 406227569Sphilipsfxge_port_stop(struct sfxge_softc *sc) 407227569Sphilip{ 408227569Sphilip struct sfxge_port *port; 409227569Sphilip efx_nic_t *enp; 410227569Sphilip 411227569Sphilip port = &sc->port; 412227569Sphilip enp = sc->enp; 413227569Sphilip 414278221Sarybchik SFXGE_PORT_LOCK(port); 415227569Sphilip 416227569Sphilip KASSERT(port->init_state == SFXGE_PORT_STARTED, 417227569Sphilip ("port not started")); 418227569Sphilip 419227569Sphilip port->init_state = SFXGE_PORT_INITIALIZED; 420227569Sphilip 421227569Sphilip port->mac_stats.update_time = 0; 422227569Sphilip 423227569Sphilip /* This may call MCDI */ 424227569Sphilip (void)efx_mac_drain(enp, B_TRUE); 425227569Sphilip 426227569Sphilip (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE); 427227569Sphilip 428227569Sphilip port->link_mode = EFX_LINK_UNKNOWN; 429227569Sphilip 430227569Sphilip /* Destroy the common code port object. */ 431227569Sphilip efx_port_fini(sc->enp); 432227569Sphilip 433278221Sarybchik SFXGE_PORT_UNLOCK(port); 434227569Sphilip} 435227569Sphilip 436227569Sphilipint 437227569Sphilipsfxge_port_start(struct sfxge_softc *sc) 438227569Sphilip{ 439227569Sphilip uint8_t mac_addr[ETHER_ADDR_LEN]; 440227569Sphilip struct ifnet *ifp = sc->ifnet; 441227569Sphilip struct sfxge_port *port; 442227569Sphilip efx_nic_t *enp; 443227569Sphilip size_t pdu; 444227569Sphilip int rc; 445227569Sphilip 446227569Sphilip port = &sc->port; 447227569Sphilip enp = sc->enp; 448227569Sphilip 449278221Sarybchik SFXGE_PORT_LOCK(port); 450227569Sphilip 451227569Sphilip KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 452227569Sphilip ("port not initialized")); 453227569Sphilip 454227569Sphilip /* Initialize the port object in the common code. */ 455227569Sphilip if ((rc = efx_port_init(sc->enp)) != 0) 456227569Sphilip goto fail; 457227569Sphilip 458227569Sphilip /* Set the SDU */ 459227569Sphilip pdu = EFX_MAC_PDU(ifp->if_mtu); 460227569Sphilip if ((rc = efx_mac_pdu_set(enp, pdu)) != 0) 461227569Sphilip goto fail2; 462227569Sphilip 463227569Sphilip if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE)) 464227569Sphilip != 0) 465227569Sphilip goto fail2; 466227569Sphilip 467227569Sphilip /* Set the unicast address */ 468229613Sjhb if_addr_rlock(ifp); 469227569Sphilip bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr), 470227569Sphilip mac_addr, sizeof(mac_addr)); 471229613Sjhb if_addr_runlock(ifp); 472227569Sphilip if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0) 473227569Sphilip goto fail; 474227569Sphilip 475227569Sphilip sfxge_mac_filter_set_locked(sc); 476227569Sphilip 477227569Sphilip /* Update MAC stats by DMA every second */ 478227569Sphilip if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 479272325Sgnn 1000, B_FALSE)) != 0) 480227569Sphilip goto fail2; 481227569Sphilip 482227569Sphilip if ((rc = efx_mac_drain(enp, B_FALSE)) != 0) 483227569Sphilip goto fail3; 484227569Sphilip 485227569Sphilip if ((rc = efx_phy_adv_cap_set(sc->enp, sc->media.ifm_cur->ifm_data)) 486227569Sphilip != 0) 487227569Sphilip goto fail4; 488227569Sphilip 489227569Sphilip port->init_state = SFXGE_PORT_STARTED; 490227569Sphilip 491227569Sphilip /* Single poll in case there were missing initial events */ 492278221Sarybchik SFXGE_PORT_UNLOCK(port); 493227569Sphilip sfxge_mac_poll_work(sc, 0); 494227569Sphilip 495227569Sphilip return (0); 496227569Sphilip 497227569Sphilipfail4: 498227569Sphilip (void)efx_mac_drain(enp, B_TRUE); 499227569Sphilipfail3: 500227569Sphilip (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 501272325Sgnn 0, B_FALSE); 502227569Sphilipfail2: 503227569Sphilip efx_port_fini(sc->enp); 504227569Sphilipfail: 505278221Sarybchik SFXGE_PORT_UNLOCK(port); 506227569Sphilip 507227569Sphilip return (rc); 508227569Sphilip} 509227569Sphilip 510227569Sphilipstatic int 511227569Sphilipsfxge_phy_stat_update(struct sfxge_softc *sc) 512227569Sphilip{ 513227569Sphilip struct sfxge_port *port = &sc->port; 514227569Sphilip efsys_mem_t *esmp = &port->phy_stats.dma_buf; 515227569Sphilip clock_t now; 516227569Sphilip unsigned int count; 517227569Sphilip int rc; 518227569Sphilip 519278248Sarybchik SFXGE_PORT_LOCK_ASSERT_OWNED(port); 520227569Sphilip 521227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) { 522227569Sphilip rc = 0; 523227569Sphilip goto out; 524227569Sphilip } 525227569Sphilip 526227569Sphilip now = ticks; 527227569Sphilip if (now - port->phy_stats.update_time < hz) { 528227569Sphilip rc = 0; 529227569Sphilip goto out; 530227569Sphilip } 531227569Sphilip 532227569Sphilip port->phy_stats.update_time = now; 533227569Sphilip 534227569Sphilip /* If we're unlucky enough to read statistics wduring the DMA, wait 535227569Sphilip * up to 10ms for it to finish (typically takes <500us) */ 536227569Sphilip for (count = 0; count < 100; ++count) { 537227569Sphilip EFSYS_PROBE1(wait, unsigned int, count); 538227569Sphilip 539227569Sphilip /* Synchronize the DMA memory for reading */ 540227569Sphilip bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 541227569Sphilip BUS_DMASYNC_POSTREAD); 542227569Sphilip 543227569Sphilip /* Try to update the cached counters */ 544227569Sphilip if ((rc = efx_phy_stats_update(sc->enp, esmp, 545227569Sphilip port->phy_stats.decode_buf)) != EAGAIN) 546227569Sphilip goto out; 547227569Sphilip 548227569Sphilip DELAY(100); 549227569Sphilip } 550227569Sphilip 551227569Sphilip rc = ETIMEDOUT; 552227569Sphilipout: 553272325Sgnn return (rc); 554227569Sphilip} 555227569Sphilip 556227569Sphilipstatic int 557227569Sphilipsfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS) 558227569Sphilip{ 559227569Sphilip struct sfxge_softc *sc = arg1; 560227569Sphilip unsigned int id = arg2; 561227569Sphilip int rc; 562278838Sarybchik uint32_t val; 563227569Sphilip 564278248Sarybchik SFXGE_PORT_LOCK(&sc->port); 565278838Sarybchik if ((rc = sfxge_phy_stat_update(sc)) == 0) 566278838Sarybchik val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id]; 567278838Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 568227569Sphilip 569278838Sarybchik if (rc == 0) 570278838Sarybchik rc = SYSCTL_OUT(req, &val, sizeof(val)); 571278248Sarybchik return (rc); 572227569Sphilip} 573227569Sphilip 574227569Sphilipstatic void 575227569Sphilipsfxge_phy_stat_init(struct sfxge_softc *sc) 576227569Sphilip{ 577227569Sphilip struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 578227569Sphilip struct sysctl_oid_list *stat_list; 579227569Sphilip unsigned int id; 580227569Sphilip const char *name; 581227569Sphilip uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask; 582227569Sphilip 583227569Sphilip stat_list = SYSCTL_CHILDREN(sc->stats_node); 584227569Sphilip 585227569Sphilip /* Initialise the named stats */ 586227569Sphilip for (id = 0; id < EFX_PHY_NSTATS; id++) { 587227569Sphilip if (!(stat_mask & ((uint64_t)1 << id))) 588227569Sphilip continue; 589227569Sphilip name = efx_phy_stat_name(sc->enp, id); 590227569Sphilip SYSCTL_ADD_PROC( 591227569Sphilip ctx, stat_list, 592227569Sphilip OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD, 593227569Sphilip sc, id, sfxge_phy_stat_handler, 594227569Sphilip id == EFX_PHY_STAT_OUI ? "IX" : "IU", 595227569Sphilip ""); 596227569Sphilip } 597227569Sphilip} 598227569Sphilip 599227569Sphilipvoid 600227569Sphilipsfxge_port_fini(struct sfxge_softc *sc) 601227569Sphilip{ 602227569Sphilip struct sfxge_port *port; 603227569Sphilip efsys_mem_t *esmp; 604227569Sphilip 605227569Sphilip port = &sc->port; 606227569Sphilip esmp = &port->mac_stats.dma_buf; 607227569Sphilip 608227569Sphilip KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 609227569Sphilip ("Port not initialized")); 610227569Sphilip 611227569Sphilip port->init_state = SFXGE_PORT_UNINITIALIZED; 612227569Sphilip 613227569Sphilip port->link_mode = EFX_LINK_UNKNOWN; 614227569Sphilip 615227569Sphilip /* Finish with PHY DMA memory */ 616227569Sphilip sfxge_dma_free(&port->phy_stats.dma_buf); 617227569Sphilip free(port->phy_stats.decode_buf, M_SFXGE); 618227569Sphilip 619227569Sphilip sfxge_dma_free(esmp); 620227569Sphilip free(port->mac_stats.decode_buf, M_SFXGE); 621227569Sphilip 622278221Sarybchik SFXGE_PORT_LOCK_DESTROY(port); 623227569Sphilip 624227569Sphilip port->sc = NULL; 625227569Sphilip} 626227569Sphilip 627227569Sphilipint 628227569Sphilipsfxge_port_init(struct sfxge_softc *sc) 629227569Sphilip{ 630227569Sphilip struct sfxge_port *port; 631227569Sphilip struct sysctl_ctx_list *sysctl_ctx; 632227569Sphilip struct sysctl_oid *sysctl_tree; 633227569Sphilip efsys_mem_t *mac_stats_buf, *phy_stats_buf; 634227569Sphilip int rc; 635227569Sphilip 636227569Sphilip port = &sc->port; 637227569Sphilip mac_stats_buf = &port->mac_stats.dma_buf; 638227569Sphilip phy_stats_buf = &port->phy_stats.dma_buf; 639227569Sphilip 640227569Sphilip KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED, 641227569Sphilip ("Port already initialized")); 642227569Sphilip 643227569Sphilip port->sc = sc; 644227569Sphilip 645278250Sarybchik SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev)); 646227569Sphilip 647227569Sphilip port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t), 648227569Sphilip M_SFXGE, M_WAITOK | M_ZERO); 649227569Sphilip if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0) 650227569Sphilip goto fail; 651227569Sphilip sfxge_phy_stat_init(sc); 652227569Sphilip 653227569Sphilip sysctl_ctx = device_get_sysctl_ctx(sc->dev); 654227569Sphilip sysctl_tree = device_get_sysctl_tree(sc->dev); 655227569Sphilip 656227569Sphilip#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 657227569Sphilip /* If flow control cannot be configured or reported through 658227569Sphilip * ifmedia, provide sysctls for it. */ 659227569Sphilip port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 660227569Sphilip SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 661227569Sphilip "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0, 662227569Sphilip sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode"); 663227569Sphilip SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 664227569Sphilip "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0, 665227569Sphilip sfxge_port_link_fc_handler, "IU", "link flow control mode"); 666227569Sphilip#endif 667227569Sphilip 668227569Sphilip port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t), 669227569Sphilip M_SFXGE, M_WAITOK | M_ZERO); 670227569Sphilip if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0) 671227569Sphilip goto fail2; 672227569Sphilip sfxge_mac_stat_init(sc); 673227569Sphilip 674227569Sphilip port->init_state = SFXGE_PORT_INITIALIZED; 675227569Sphilip 676227569Sphilip return (0); 677227569Sphilip 678227569Sphilipfail2: 679227569Sphilip free(port->mac_stats.decode_buf, M_SFXGE); 680227569Sphilip sfxge_dma_free(phy_stats_buf); 681227569Sphilipfail: 682227569Sphilip free(port->phy_stats.decode_buf, M_SFXGE); 683278221Sarybchik SFXGE_PORT_LOCK_DESTROY(port); 684227569Sphilip port->sc = NULL; 685272325Sgnn return (rc); 686227569Sphilip} 687227569Sphilip 688227569Sphilipstatic int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { 689227569Sphilip [EFX_PHY_MEDIA_CX4] = { 690227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4, 691227569Sphilip }, 692227569Sphilip [EFX_PHY_MEDIA_KX4] = { 693227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4, 694227569Sphilip }, 695227569Sphilip [EFX_PHY_MEDIA_XFP] = { 696227569Sphilip /* Don't know the module type, but assume SR for now. */ 697227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 698227569Sphilip }, 699227569Sphilip [EFX_PHY_MEDIA_SFP_PLUS] = { 700227569Sphilip /* Don't know the module type, but assume SX/SR for now. */ 701227569Sphilip [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX, 702227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 703227569Sphilip }, 704227569Sphilip [EFX_PHY_MEDIA_BASE_T] = { 705227569Sphilip [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T, 706227569Sphilip [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T, 707227569Sphilip [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX, 708227569Sphilip [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX, 709227569Sphilip [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T, 710227569Sphilip [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T, 711227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T, 712227569Sphilip }, 713227569Sphilip}; 714227569Sphilip 715227569Sphilipstatic void 716227569Sphilipsfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 717227569Sphilip{ 718227569Sphilip struct sfxge_softc *sc; 719227569Sphilip efx_phy_media_type_t medium_type; 720227569Sphilip efx_link_mode_t mode; 721227569Sphilip 722227569Sphilip sc = ifp->if_softc; 723278221Sarybchik SFXGE_ADAPTER_LOCK(sc); 724227569Sphilip 725227569Sphilip ifmr->ifm_status = IFM_AVALID; 726227569Sphilip ifmr->ifm_active = IFM_ETHER; 727227569Sphilip 728227569Sphilip if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) { 729227569Sphilip ifmr->ifm_status |= IFM_ACTIVE; 730227569Sphilip 731227569Sphilip efx_phy_media_type_get(sc->enp, &medium_type); 732227569Sphilip mode = sc->port.link_mode; 733227569Sphilip ifmr->ifm_active |= sfxge_link_mode[medium_type][mode]; 734227569Sphilip ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc); 735227569Sphilip } 736227569Sphilip 737278221Sarybchik SFXGE_ADAPTER_UNLOCK(sc); 738227569Sphilip} 739227569Sphilip 740227569Sphilipstatic int 741227569Sphilipsfxge_media_change(struct ifnet *ifp) 742227569Sphilip{ 743227569Sphilip struct sfxge_softc *sc; 744227569Sphilip struct ifmedia_entry *ifm; 745227569Sphilip int rc; 746227569Sphilip 747227569Sphilip sc = ifp->if_softc; 748227569Sphilip ifm = sc->media.ifm_cur; 749227569Sphilip 750278221Sarybchik SFXGE_ADAPTER_LOCK(sc); 751227569Sphilip 752227569Sphilip if (!SFXGE_RUNNING(sc)) { 753227569Sphilip rc = 0; 754227569Sphilip goto out; 755227569Sphilip } 756227569Sphilip 757227569Sphilip rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE); 758227569Sphilip if (rc != 0) 759227569Sphilip goto out; 760227569Sphilip 761227569Sphilip rc = efx_phy_adv_cap_set(sc->enp, ifm->ifm_data); 762227569Sphilipout: 763278221Sarybchik SFXGE_ADAPTER_UNLOCK(sc); 764227569Sphilip 765272325Sgnn return (rc); 766227569Sphilip} 767227569Sphilip 768227569Sphilipint sfxge_port_ifmedia_init(struct sfxge_softc *sc) 769227569Sphilip{ 770227569Sphilip efx_phy_media_type_t medium_type; 771227569Sphilip uint32_t cap_mask, mode_cap_mask; 772227569Sphilip efx_link_mode_t mode; 773227569Sphilip int mode_ifm, best_mode_ifm = 0; 774227569Sphilip int rc; 775227569Sphilip 776227569Sphilip /* We need port state to initialise the ifmedia list. */ 777227569Sphilip if ((rc = efx_nic_init(sc->enp)) != 0) 778227569Sphilip goto out; 779227569Sphilip if ((rc = efx_port_init(sc->enp)) != 0) 780227569Sphilip goto out2; 781227569Sphilip 782227569Sphilip /* 783227569Sphilip * Register ifconfig callbacks for querying and setting the 784227569Sphilip * link mode and link status. 785227569Sphilip */ 786227569Sphilip ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change, 787227569Sphilip sfxge_media_status); 788227569Sphilip 789227569Sphilip /* 790227569Sphilip * Map firmware medium type and capabilities to ifmedia types. 791227569Sphilip * ifmedia does not distinguish between forcing the link mode 792227569Sphilip * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T 793227569Sphilip * require AN even if only one link mode is enabled, and for 794227569Sphilip * 100BASE-TX it is useful even if the link mode is forced. 795227569Sphilip * Therefore we never disable auto-negotiation. 796227569Sphilip * 797227569Sphilip * Also enable and advertise flow control by default. 798227569Sphilip */ 799227569Sphilip 800227569Sphilip efx_phy_media_type_get(sc->enp, &medium_type); 801227569Sphilip efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); 802227569Sphilip 803227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10HDX == EFX_PHY_CAP_10HDX + 1); 804227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10FDX == EFX_PHY_CAP_10FDX + 1); 805227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_100HDX == EFX_PHY_CAP_100HDX + 1); 806227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_100FDX == EFX_PHY_CAP_100FDX + 1); 807227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_1000HDX == EFX_PHY_CAP_1000HDX + 1); 808227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_1000FDX == EFX_PHY_CAP_1000FDX + 1); 809227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10000FDX == EFX_PHY_CAP_10000FDX + 1); 810227569Sphilip 811227569Sphilip for (mode = EFX_LINK_10HDX; mode <= EFX_LINK_10000FDX; mode++) { 812227569Sphilip mode_cap_mask = 1 << (mode - 1); 813227569Sphilip mode_ifm = sfxge_link_mode[medium_type][mode]; 814227569Sphilip 815227569Sphilip if ((cap_mask & mode_cap_mask) && mode_ifm) { 816227569Sphilip mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN); 817227569Sphilip 818227569Sphilip#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 819227569Sphilip /* No flow-control */ 820227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 821227569Sphilip 822227569Sphilip /* Respond-only. If using AN, we implicitly 823227569Sphilip * offer symmetric as well, but that doesn't 824227569Sphilip * mean we *have* to generate pause frames. 825227569Sphilip */ 826227569Sphilip mode_cap_mask |= cap_mask & ((1 << EFX_PHY_CAP_PAUSE) | 827227569Sphilip (1 << EFX_PHY_CAP_ASYM)); 828227569Sphilip mode_ifm |= IFM_ETH_RXPAUSE; 829227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 830227569Sphilip 831227569Sphilip /* Symmetric */ 832227569Sphilip mode_cap_mask &= ~(1 << EFX_PHY_CAP_ASYM); 833227569Sphilip mode_ifm |= IFM_ETH_TXPAUSE; 834227569Sphilip#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 835227569Sphilip mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); 836227569Sphilip#endif 837227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 838227569Sphilip 839227569Sphilip /* Link modes are numbered in order of speed, 840227569Sphilip * so assume the last one available is the best. 841227569Sphilip */ 842227569Sphilip best_mode_ifm = mode_ifm; 843227569Sphilip } 844227569Sphilip } 845227569Sphilip 846227569Sphilip if (cap_mask & (1 << EFX_PHY_CAP_AN)) { 847227569Sphilip /* Add autoselect mode. */ 848227569Sphilip mode_ifm = IFM_ETHER | IFM_AUTO; 849227569Sphilip ifmedia_add(&sc->media, mode_ifm, 850227569Sphilip cap_mask & ~(1 << EFX_PHY_CAP_ASYM), NULL); 851227569Sphilip best_mode_ifm = mode_ifm; 852227569Sphilip } 853227569Sphilip 854272325Sgnn if (best_mode_ifm != 0) 855227569Sphilip ifmedia_set(&sc->media, best_mode_ifm); 856227569Sphilip 857227569Sphilip /* Now discard port state until interface is started. */ 858227569Sphilip efx_port_fini(sc->enp); 859227569Sphilipout2: 860227569Sphilip efx_nic_fini(sc->enp); 861227569Sphilipout: 862272325Sgnn return (rc); 863227569Sphilip} 864