sfxge_port.c revision 278248
1227569Sphilip/*- 2227569Sphilip * Copyright (c) 2010-2011 Solarflare Communications, Inc. 3227569Sphilip * All rights reserved. 4227569Sphilip * 5227569Sphilip * This software was developed in part by Philip Paeps under contract for 6227569Sphilip * Solarflare Communications, Inc. 7227569Sphilip * 8227569Sphilip * Redistribution and use in source and binary forms, with or without 9227569Sphilip * modification, are permitted provided that the following conditions 10227569Sphilip * are met: 11227569Sphilip * 1. Redistributions of source code must retain the above copyright 12227569Sphilip * notice, this list of conditions and the following disclaimer. 13227569Sphilip * 2. Redistributions in binary form must reproduce the above copyright 14227569Sphilip * notice, this list of conditions and the following disclaimer in the 15227569Sphilip * documentation and/or other materials provided with the distribution. 16227569Sphilip * 17227569Sphilip * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18227569Sphilip * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19227569Sphilip * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20227569Sphilip * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21227569Sphilip * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22227569Sphilip * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23227569Sphilip * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24227569Sphilip * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25227569Sphilip * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26227569Sphilip * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27227569Sphilip * SUCH DAMAGE. 28227569Sphilip */ 29227569Sphilip 30227569Sphilip#include <sys/cdefs.h> 31227569Sphilip__FBSDID("$FreeBSD: head/sys/dev/sfxge/sfxge_port.c 278248 2015-02-05 11:37:07Z arybchik $"); 32227569Sphilip 33227569Sphilip#include <sys/types.h> 34227699Sphilip#include <sys/limits.h> 35227569Sphilip#include <net/ethernet.h> 36227569Sphilip#include <net/if_dl.h> 37227569Sphilip 38227569Sphilip#include "common/efx.h" 39227569Sphilip 40227569Sphilip#include "sfxge.h" 41227569Sphilip 42227569Sphilipstatic int 43227569Sphilipsfxge_mac_stat_update(struct sfxge_softc *sc) 44227569Sphilip{ 45227569Sphilip struct sfxge_port *port = &sc->port; 46227569Sphilip efsys_mem_t *esmp = &(port->mac_stats.dma_buf); 47227569Sphilip clock_t now; 48227569Sphilip unsigned int count; 49227569Sphilip int rc; 50227569Sphilip 51278248Sarybchik SFXGE_PORT_LOCK_ASSERT_OWNED(port); 52227569Sphilip 53227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) { 54227569Sphilip rc = 0; 55227569Sphilip goto out; 56227569Sphilip } 57227569Sphilip 58227569Sphilip now = ticks; 59227569Sphilip if (now - port->mac_stats.update_time < hz) { 60227569Sphilip rc = 0; 61227569Sphilip goto out; 62227569Sphilip } 63227569Sphilip 64227569Sphilip port->mac_stats.update_time = now; 65227569Sphilip 66227569Sphilip /* If we're unlucky enough to read statistics wduring the DMA, wait 67227569Sphilip * up to 10ms for it to finish (typically takes <500us) */ 68227569Sphilip for (count = 0; count < 100; ++count) { 69227569Sphilip EFSYS_PROBE1(wait, unsigned int, count); 70227569Sphilip 71227569Sphilip /* Synchronize the DMA memory for reading */ 72227569Sphilip bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 73227569Sphilip BUS_DMASYNC_POSTREAD); 74227569Sphilip 75227569Sphilip /* Try to update the cached counters */ 76227569Sphilip if ((rc = efx_mac_stats_update(sc->enp, esmp, 77272325Sgnn port->mac_stats.decode_buf, NULL)) != EAGAIN) 78227569Sphilip goto out; 79227569Sphilip 80227569Sphilip DELAY(100); 81227569Sphilip } 82227569Sphilip 83227569Sphilip rc = ETIMEDOUT; 84227569Sphilipout: 85272325Sgnn return (rc); 86227569Sphilip} 87227569Sphilip 88227569Sphilipstatic int 89227569Sphilipsfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS) 90227569Sphilip{ 91227569Sphilip struct sfxge_softc *sc = arg1; 92227569Sphilip unsigned int id = arg2; 93227569Sphilip int rc; 94227569Sphilip 95278248Sarybchik SFXGE_PORT_LOCK(&sc->port); 96227569Sphilip if ((rc = sfxge_mac_stat_update(sc)) != 0) 97278248Sarybchik goto out; 98227569Sphilip 99278248Sarybchik rc = SYSCTL_OUT(req, 100278248Sarybchik (uint64_t *)sc->port.mac_stats.decode_buf + id, 101278248Sarybchik sizeof(uint64_t)); 102278248Sarybchikout: 103278248Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 104278248Sarybchik return (rc); 105227569Sphilip} 106227569Sphilip 107227569Sphilipstatic void 108227569Sphilipsfxge_mac_stat_init(struct sfxge_softc *sc) 109227569Sphilip{ 110227569Sphilip struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 111227569Sphilip struct sysctl_oid_list *stat_list; 112227569Sphilip unsigned int id; 113227569Sphilip const char *name; 114227569Sphilip 115227569Sphilip stat_list = SYSCTL_CHILDREN(sc->stats_node); 116227569Sphilip 117227569Sphilip /* Initialise the named stats */ 118227569Sphilip for (id = 0; id < EFX_MAC_NSTATS; id++) { 119227569Sphilip name = efx_mac_stat_name(sc->enp, id); 120227569Sphilip SYSCTL_ADD_PROC( 121227569Sphilip ctx, stat_list, 122227569Sphilip OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD, 123227569Sphilip sc, id, sfxge_mac_stat_handler, "Q", 124227569Sphilip ""); 125227569Sphilip } 126227569Sphilip} 127227569Sphilip 128227569Sphilip#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 129227569Sphilip 130227569Sphilipstatic unsigned int 131227569Sphilipsfxge_port_wanted_fc(struct sfxge_softc *sc) 132227569Sphilip{ 133227569Sphilip struct ifmedia_entry *ifm = sc->media.ifm_cur; 134227569Sphilip 135227569Sphilip if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO)) 136272325Sgnn return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE); 137272325Sgnn return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) | 138272325Sgnn ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0)); 139227569Sphilip} 140227569Sphilip 141227569Sphilipstatic unsigned int 142227569Sphilipsfxge_port_link_fc_ifm(struct sfxge_softc *sc) 143227569Sphilip{ 144227569Sphilip unsigned int wanted_fc, link_fc; 145227569Sphilip 146227569Sphilip efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 147227569Sphilip return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) | 148227569Sphilip ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0); 149227569Sphilip} 150227569Sphilip 151227569Sphilip#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 152227569Sphilip 153227569Sphilipstatic unsigned int 154227569Sphilipsfxge_port_wanted_fc(struct sfxge_softc *sc) 155227569Sphilip{ 156272325Sgnn return (sc->port.wanted_fc); 157227569Sphilip} 158227569Sphilip 159227569Sphilipstatic unsigned int 160227569Sphilipsfxge_port_link_fc_ifm(struct sfxge_softc *sc) 161227569Sphilip{ 162272325Sgnn return (0); 163227569Sphilip} 164227569Sphilip 165227569Sphilipstatic int 166227569Sphilipsfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS) 167227569Sphilip{ 168227569Sphilip struct sfxge_softc *sc; 169227569Sphilip struct sfxge_port *port; 170227569Sphilip unsigned int fcntl; 171227569Sphilip int error; 172227569Sphilip 173227569Sphilip sc = arg1; 174227569Sphilip port = &sc->port; 175227569Sphilip 176278221Sarybchik SFXGE_PORT_LOCK(port); 177227569Sphilip 178272325Sgnn if (req->newptr != NULL) { 179227569Sphilip if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0) 180227569Sphilip goto out; 181227569Sphilip 182227569Sphilip if (port->wanted_fc == fcntl) 183227569Sphilip goto out; 184227569Sphilip 185227569Sphilip port->wanted_fc = fcntl; 186227569Sphilip 187227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) 188227569Sphilip goto out; 189227569Sphilip 190227569Sphilip error = efx_mac_fcntl_set(sc->enp, port->wanted_fc, B_TRUE); 191227569Sphilip } else { 192227569Sphilip error = SYSCTL_OUT(req, &port->wanted_fc, 193227569Sphilip sizeof(port->wanted_fc)); 194227569Sphilip } 195227569Sphilip 196227569Sphilipout: 197278221Sarybchik SFXGE_PORT_UNLOCK(port); 198227569Sphilip 199227569Sphilip return (error); 200227569Sphilip} 201227569Sphilip 202227569Sphilipstatic int 203227569Sphilipsfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS) 204227569Sphilip{ 205227569Sphilip struct sfxge_softc *sc; 206227569Sphilip struct sfxge_port *port; 207227569Sphilip unsigned int wanted_fc, link_fc; 208227569Sphilip int error; 209227569Sphilip 210227569Sphilip sc = arg1; 211227569Sphilip port = &sc->port; 212227569Sphilip 213278221Sarybchik SFXGE_PORT_LOCK(port); 214227569Sphilip if (port->init_state == SFXGE_PORT_STARTED && SFXGE_LINK_UP(sc)) 215227569Sphilip efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 216227569Sphilip else 217227569Sphilip link_fc = 0; 218227569Sphilip error = SYSCTL_OUT(req, &link_fc, sizeof(link_fc)); 219278221Sarybchik SFXGE_PORT_UNLOCK(port); 220227569Sphilip 221227569Sphilip return (error); 222227569Sphilip} 223227569Sphilip 224227569Sphilip#endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */ 225227569Sphilip 226272452Sgnnstatic const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = { 227227699Sphilip [EFX_LINK_10HDX] = IF_Mbps(10), 228227699Sphilip [EFX_LINK_10FDX] = IF_Mbps(10), 229227699Sphilip [EFX_LINK_100HDX] = IF_Mbps(100), 230227699Sphilip [EFX_LINK_100FDX] = IF_Mbps(100), 231227699Sphilip [EFX_LINK_1000HDX] = IF_Gbps(1), 232227699Sphilip [EFX_LINK_1000FDX] = IF_Gbps(1), 233272452Sgnn [EFX_LINK_10000FDX] = IF_Gbps(10), 234227569Sphilip}; 235227569Sphilip 236227569Sphilipvoid 237227569Sphilipsfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode) 238227569Sphilip{ 239227569Sphilip struct sfxge_port *port; 240227569Sphilip int link_state; 241272325Sgnn 242227569Sphilip port = &sc->port; 243227569Sphilip 244227569Sphilip if (port->link_mode == mode) 245227569Sphilip return; 246227569Sphilip 247227569Sphilip port->link_mode = mode; 248227569Sphilip 249227569Sphilip /* Push link state update to the OS */ 250227569Sphilip link_state = (port->link_mode != EFX_LINK_DOWN ? 251227569Sphilip LINK_STATE_UP : LINK_STATE_DOWN); 252227699Sphilip sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode]; 253227569Sphilip if_link_state_change(sc->ifnet, link_state); 254227569Sphilip} 255227569Sphilip 256227569Sphilipstatic void 257227569Sphilipsfxge_mac_poll_work(void *arg, int npending) 258227569Sphilip{ 259227569Sphilip struct sfxge_softc *sc; 260227569Sphilip efx_nic_t *enp; 261227569Sphilip struct sfxge_port *port; 262227569Sphilip efx_link_mode_t mode; 263227569Sphilip 264227569Sphilip sc = (struct sfxge_softc *)arg; 265227569Sphilip enp = sc->enp; 266227569Sphilip port = &sc->port; 267227569Sphilip 268278221Sarybchik SFXGE_PORT_LOCK(port); 269227569Sphilip 270227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) 271227569Sphilip goto done; 272227569Sphilip 273227569Sphilip /* This may sleep waiting for MCDI completion */ 274227569Sphilip (void)efx_port_poll(enp, &mode); 275227569Sphilip sfxge_mac_link_update(sc, mode); 276227569Sphilip 277227569Sphilipdone: 278278221Sarybchik SFXGE_PORT_UNLOCK(port); 279227569Sphilip} 280227569Sphilip 281227569Sphilipstatic int 282227569Sphilipsfxge_mac_filter_set_locked(struct sfxge_softc *sc) 283227569Sphilip{ 284227569Sphilip unsigned int bucket[EFX_MAC_HASH_BITS]; 285227569Sphilip struct ifnet *ifp = sc->ifnet; 286227569Sphilip struct ifmultiaddr *ifma; 287227569Sphilip struct sockaddr_dl *sa; 288227569Sphilip efx_nic_t *enp = sc->enp; 289227569Sphilip unsigned int index; 290227569Sphilip int rc; 291227569Sphilip 292227569Sphilip /* Set promisc-unicast and broadcast filter bits */ 293227569Sphilip if ((rc = efx_mac_filter_set(enp, !!(ifp->if_flags & IFF_PROMISC), 294227569Sphilip B_TRUE)) != 0) 295272325Sgnn return (rc); 296227569Sphilip 297227569Sphilip /* Set multicast hash filter */ 298227569Sphilip if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { 299227569Sphilip for (index = 0; index < EFX_MAC_HASH_BITS; index++) 300227569Sphilip bucket[index] = 1; 301227569Sphilip } else { 302227569Sphilip /* Broadcast frames also go through the multicast 303227569Sphilip * filter, and the broadcast address hashes to 304227569Sphilip * 0xff. */ 305227569Sphilip bucket[0xff] = 1; 306227569Sphilip 307229613Sjhb if_maddr_rlock(ifp); 308227569Sphilip TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 309227569Sphilip if (ifma->ifma_addr->sa_family == AF_LINK) { 310227569Sphilip sa = (struct sockaddr_dl *)ifma->ifma_addr; 311227569Sphilip index = ether_crc32_le(LLADDR(sa), 6) & 0xff; 312227569Sphilip bucket[index] = 1; 313227569Sphilip } 314227569Sphilip } 315229613Sjhb if_maddr_runlock(ifp); 316227569Sphilip } 317272325Sgnn return (efx_mac_hash_set(enp, bucket)); 318227569Sphilip} 319227569Sphilip 320227569Sphilipint 321227569Sphilipsfxge_mac_filter_set(struct sfxge_softc *sc) 322227569Sphilip{ 323227569Sphilip struct sfxge_port *port = &sc->port; 324227569Sphilip int rc; 325227569Sphilip 326278221Sarybchik SFXGE_PORT_LOCK(port); 327264772Sgnn /* 328264772Sgnn * The function may be called without softc_lock held in the 329264772Sgnn * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler 330264772Sgnn * checks IFF_DRV_RUNNING flag which implies port started, but 331264772Sgnn * it is not guaranteed to remain. softc_lock shared lock can't 332264772Sgnn * be held in the case of these ioctls processing, since it 333264772Sgnn * results in failure where kernel complains that non-sleepable 334264772Sgnn * lock is held in sleeping thread. Both problems are repeatable 335264772Sgnn * on LAG with LACP proto bring up. 336264772Sgnn */ 337264772Sgnn if (port->init_state == SFXGE_PORT_STARTED) 338264772Sgnn rc = sfxge_mac_filter_set_locked(sc); 339264772Sgnn else 340264772Sgnn rc = 0; 341278221Sarybchik SFXGE_PORT_UNLOCK(port); 342272325Sgnn return (rc); 343227569Sphilip} 344227569Sphilip 345227569Sphilipvoid 346227569Sphilipsfxge_port_stop(struct sfxge_softc *sc) 347227569Sphilip{ 348227569Sphilip struct sfxge_port *port; 349227569Sphilip efx_nic_t *enp; 350227569Sphilip 351227569Sphilip port = &sc->port; 352227569Sphilip enp = sc->enp; 353227569Sphilip 354278221Sarybchik SFXGE_PORT_LOCK(port); 355227569Sphilip 356227569Sphilip KASSERT(port->init_state == SFXGE_PORT_STARTED, 357227569Sphilip ("port not started")); 358227569Sphilip 359227569Sphilip port->init_state = SFXGE_PORT_INITIALIZED; 360227569Sphilip 361227569Sphilip port->mac_stats.update_time = 0; 362227569Sphilip 363227569Sphilip /* This may call MCDI */ 364227569Sphilip (void)efx_mac_drain(enp, B_TRUE); 365227569Sphilip 366227569Sphilip (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE); 367227569Sphilip 368227569Sphilip port->link_mode = EFX_LINK_UNKNOWN; 369227569Sphilip 370227569Sphilip /* Destroy the common code port object. */ 371227569Sphilip efx_port_fini(sc->enp); 372227569Sphilip 373278221Sarybchik SFXGE_PORT_UNLOCK(port); 374227569Sphilip} 375227569Sphilip 376227569Sphilipint 377227569Sphilipsfxge_port_start(struct sfxge_softc *sc) 378227569Sphilip{ 379227569Sphilip uint8_t mac_addr[ETHER_ADDR_LEN]; 380227569Sphilip struct ifnet *ifp = sc->ifnet; 381227569Sphilip struct sfxge_port *port; 382227569Sphilip efx_nic_t *enp; 383227569Sphilip size_t pdu; 384227569Sphilip int rc; 385227569Sphilip 386227569Sphilip port = &sc->port; 387227569Sphilip enp = sc->enp; 388227569Sphilip 389278221Sarybchik SFXGE_PORT_LOCK(port); 390227569Sphilip 391227569Sphilip KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 392227569Sphilip ("port not initialized")); 393227569Sphilip 394227569Sphilip /* Initialize the port object in the common code. */ 395227569Sphilip if ((rc = efx_port_init(sc->enp)) != 0) 396227569Sphilip goto fail; 397227569Sphilip 398227569Sphilip /* Set the SDU */ 399227569Sphilip pdu = EFX_MAC_PDU(ifp->if_mtu); 400227569Sphilip if ((rc = efx_mac_pdu_set(enp, pdu)) != 0) 401227569Sphilip goto fail2; 402227569Sphilip 403227569Sphilip if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE)) 404227569Sphilip != 0) 405227569Sphilip goto fail2; 406227569Sphilip 407227569Sphilip /* Set the unicast address */ 408229613Sjhb if_addr_rlock(ifp); 409227569Sphilip bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr), 410227569Sphilip mac_addr, sizeof(mac_addr)); 411229613Sjhb if_addr_runlock(ifp); 412227569Sphilip if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0) 413227569Sphilip goto fail; 414227569Sphilip 415227569Sphilip sfxge_mac_filter_set_locked(sc); 416227569Sphilip 417227569Sphilip /* Update MAC stats by DMA every second */ 418227569Sphilip if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 419272325Sgnn 1000, B_FALSE)) != 0) 420227569Sphilip goto fail2; 421227569Sphilip 422227569Sphilip if ((rc = efx_mac_drain(enp, B_FALSE)) != 0) 423227569Sphilip goto fail3; 424227569Sphilip 425227569Sphilip if ((rc = efx_phy_adv_cap_set(sc->enp, sc->media.ifm_cur->ifm_data)) 426227569Sphilip != 0) 427227569Sphilip goto fail4; 428227569Sphilip 429227569Sphilip port->init_state = SFXGE_PORT_STARTED; 430227569Sphilip 431227569Sphilip /* Single poll in case there were missing initial events */ 432278221Sarybchik SFXGE_PORT_UNLOCK(port); 433227569Sphilip sfxge_mac_poll_work(sc, 0); 434227569Sphilip 435227569Sphilip return (0); 436227569Sphilip 437227569Sphilipfail4: 438227569Sphilip (void)efx_mac_drain(enp, B_TRUE); 439227569Sphilipfail3: 440227569Sphilip (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 441272325Sgnn 0, B_FALSE); 442227569Sphilipfail2: 443227569Sphilip efx_port_fini(sc->enp); 444227569Sphilipfail: 445278221Sarybchik SFXGE_PORT_UNLOCK(port); 446227569Sphilip 447227569Sphilip return (rc); 448227569Sphilip} 449227569Sphilip 450227569Sphilipstatic int 451227569Sphilipsfxge_phy_stat_update(struct sfxge_softc *sc) 452227569Sphilip{ 453227569Sphilip struct sfxge_port *port = &sc->port; 454227569Sphilip efsys_mem_t *esmp = &port->phy_stats.dma_buf; 455227569Sphilip clock_t now; 456227569Sphilip unsigned int count; 457227569Sphilip int rc; 458227569Sphilip 459278248Sarybchik SFXGE_PORT_LOCK_ASSERT_OWNED(port); 460227569Sphilip 461227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) { 462227569Sphilip rc = 0; 463227569Sphilip goto out; 464227569Sphilip } 465227569Sphilip 466227569Sphilip now = ticks; 467227569Sphilip if (now - port->phy_stats.update_time < hz) { 468227569Sphilip rc = 0; 469227569Sphilip goto out; 470227569Sphilip } 471227569Sphilip 472227569Sphilip port->phy_stats.update_time = now; 473227569Sphilip 474227569Sphilip /* If we're unlucky enough to read statistics wduring the DMA, wait 475227569Sphilip * up to 10ms for it to finish (typically takes <500us) */ 476227569Sphilip for (count = 0; count < 100; ++count) { 477227569Sphilip EFSYS_PROBE1(wait, unsigned int, count); 478227569Sphilip 479227569Sphilip /* Synchronize the DMA memory for reading */ 480227569Sphilip bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 481227569Sphilip BUS_DMASYNC_POSTREAD); 482227569Sphilip 483227569Sphilip /* Try to update the cached counters */ 484227569Sphilip if ((rc = efx_phy_stats_update(sc->enp, esmp, 485227569Sphilip port->phy_stats.decode_buf)) != EAGAIN) 486227569Sphilip goto out; 487227569Sphilip 488227569Sphilip DELAY(100); 489227569Sphilip } 490227569Sphilip 491227569Sphilip rc = ETIMEDOUT; 492227569Sphilipout: 493272325Sgnn return (rc); 494227569Sphilip} 495227569Sphilip 496227569Sphilipstatic int 497227569Sphilipsfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS) 498227569Sphilip{ 499227569Sphilip struct sfxge_softc *sc = arg1; 500227569Sphilip unsigned int id = arg2; 501227569Sphilip int rc; 502227569Sphilip 503278248Sarybchik SFXGE_PORT_LOCK(&sc->port); 504227569Sphilip if ((rc = sfxge_phy_stat_update(sc)) != 0) 505278248Sarybchik goto out; 506227569Sphilip 507278248Sarybchik rc = SYSCTL_OUT(req, 508278248Sarybchik (uint32_t *)sc->port.phy_stats.decode_buf + id, 509278248Sarybchik sizeof(uint32_t)); 510278248Sarybchikout: 511278248Sarybchik SFXGE_PORT_UNLOCK(&sc->port); 512278248Sarybchik return (rc); 513227569Sphilip} 514227569Sphilip 515227569Sphilipstatic void 516227569Sphilipsfxge_phy_stat_init(struct sfxge_softc *sc) 517227569Sphilip{ 518227569Sphilip struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 519227569Sphilip struct sysctl_oid_list *stat_list; 520227569Sphilip unsigned int id; 521227569Sphilip const char *name; 522227569Sphilip uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask; 523227569Sphilip 524227569Sphilip stat_list = SYSCTL_CHILDREN(sc->stats_node); 525227569Sphilip 526227569Sphilip /* Initialise the named stats */ 527227569Sphilip for (id = 0; id < EFX_PHY_NSTATS; id++) { 528227569Sphilip if (!(stat_mask & ((uint64_t)1 << id))) 529227569Sphilip continue; 530227569Sphilip name = efx_phy_stat_name(sc->enp, id); 531227569Sphilip SYSCTL_ADD_PROC( 532227569Sphilip ctx, stat_list, 533227569Sphilip OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD, 534227569Sphilip sc, id, sfxge_phy_stat_handler, 535227569Sphilip id == EFX_PHY_STAT_OUI ? "IX" : "IU", 536227569Sphilip ""); 537227569Sphilip } 538227569Sphilip} 539227569Sphilip 540227569Sphilipvoid 541227569Sphilipsfxge_port_fini(struct sfxge_softc *sc) 542227569Sphilip{ 543227569Sphilip struct sfxge_port *port; 544227569Sphilip efsys_mem_t *esmp; 545227569Sphilip 546227569Sphilip port = &sc->port; 547227569Sphilip esmp = &port->mac_stats.dma_buf; 548227569Sphilip 549227569Sphilip KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 550227569Sphilip ("Port not initialized")); 551227569Sphilip 552227569Sphilip port->init_state = SFXGE_PORT_UNINITIALIZED; 553227569Sphilip 554227569Sphilip port->link_mode = EFX_LINK_UNKNOWN; 555227569Sphilip 556227569Sphilip /* Finish with PHY DMA memory */ 557227569Sphilip sfxge_dma_free(&port->phy_stats.dma_buf); 558227569Sphilip free(port->phy_stats.decode_buf, M_SFXGE); 559227569Sphilip 560227569Sphilip sfxge_dma_free(esmp); 561227569Sphilip free(port->mac_stats.decode_buf, M_SFXGE); 562227569Sphilip 563278221Sarybchik SFXGE_PORT_LOCK_DESTROY(port); 564227569Sphilip 565227569Sphilip port->sc = NULL; 566227569Sphilip} 567227569Sphilip 568227569Sphilipint 569227569Sphilipsfxge_port_init(struct sfxge_softc *sc) 570227569Sphilip{ 571227569Sphilip struct sfxge_port *port; 572227569Sphilip struct sysctl_ctx_list *sysctl_ctx; 573227569Sphilip struct sysctl_oid *sysctl_tree; 574227569Sphilip efsys_mem_t *mac_stats_buf, *phy_stats_buf; 575227569Sphilip int rc; 576227569Sphilip 577227569Sphilip port = &sc->port; 578227569Sphilip mac_stats_buf = &port->mac_stats.dma_buf; 579227569Sphilip phy_stats_buf = &port->phy_stats.dma_buf; 580227569Sphilip 581227569Sphilip KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED, 582227569Sphilip ("Port already initialized")); 583227569Sphilip 584227569Sphilip port->sc = sc; 585227569Sphilip 586278221Sarybchik SFXGE_PORT_LOCK_INIT(port, "sfxge_port"); 587227569Sphilip 588227569Sphilip port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t), 589227569Sphilip M_SFXGE, M_WAITOK | M_ZERO); 590227569Sphilip if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0) 591227569Sphilip goto fail; 592227569Sphilip sfxge_phy_stat_init(sc); 593227569Sphilip 594227569Sphilip sysctl_ctx = device_get_sysctl_ctx(sc->dev); 595227569Sphilip sysctl_tree = device_get_sysctl_tree(sc->dev); 596227569Sphilip 597227569Sphilip#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 598227569Sphilip /* If flow control cannot be configured or reported through 599227569Sphilip * ifmedia, provide sysctls for it. */ 600227569Sphilip port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 601227569Sphilip SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 602227569Sphilip "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0, 603227569Sphilip sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode"); 604227569Sphilip SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 605227569Sphilip "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0, 606227569Sphilip sfxge_port_link_fc_handler, "IU", "link flow control mode"); 607227569Sphilip#endif 608227569Sphilip 609227569Sphilip port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t), 610227569Sphilip M_SFXGE, M_WAITOK | M_ZERO); 611227569Sphilip if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0) 612227569Sphilip goto fail2; 613227569Sphilip sfxge_mac_stat_init(sc); 614227569Sphilip 615227569Sphilip port->init_state = SFXGE_PORT_INITIALIZED; 616227569Sphilip 617227569Sphilip return (0); 618227569Sphilip 619227569Sphilipfail2: 620227569Sphilip free(port->mac_stats.decode_buf, M_SFXGE); 621227569Sphilip sfxge_dma_free(phy_stats_buf); 622227569Sphilipfail: 623227569Sphilip free(port->phy_stats.decode_buf, M_SFXGE); 624278221Sarybchik SFXGE_PORT_LOCK_DESTROY(port); 625227569Sphilip port->sc = NULL; 626272325Sgnn return (rc); 627227569Sphilip} 628227569Sphilip 629227569Sphilipstatic int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { 630227569Sphilip [EFX_PHY_MEDIA_CX4] = { 631227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4, 632227569Sphilip }, 633227569Sphilip [EFX_PHY_MEDIA_KX4] = { 634227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4, 635227569Sphilip }, 636227569Sphilip [EFX_PHY_MEDIA_XFP] = { 637227569Sphilip /* Don't know the module type, but assume SR for now. */ 638227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 639227569Sphilip }, 640227569Sphilip [EFX_PHY_MEDIA_SFP_PLUS] = { 641227569Sphilip /* Don't know the module type, but assume SX/SR for now. */ 642227569Sphilip [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX, 643227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 644227569Sphilip }, 645227569Sphilip [EFX_PHY_MEDIA_BASE_T] = { 646227569Sphilip [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T, 647227569Sphilip [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T, 648227569Sphilip [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX, 649227569Sphilip [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX, 650227569Sphilip [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T, 651227569Sphilip [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T, 652227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T, 653227569Sphilip }, 654227569Sphilip}; 655227569Sphilip 656227569Sphilipstatic void 657227569Sphilipsfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 658227569Sphilip{ 659227569Sphilip struct sfxge_softc *sc; 660227569Sphilip efx_phy_media_type_t medium_type; 661227569Sphilip efx_link_mode_t mode; 662227569Sphilip 663227569Sphilip sc = ifp->if_softc; 664278221Sarybchik SFXGE_ADAPTER_LOCK(sc); 665227569Sphilip 666227569Sphilip ifmr->ifm_status = IFM_AVALID; 667227569Sphilip ifmr->ifm_active = IFM_ETHER; 668227569Sphilip 669227569Sphilip if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) { 670227569Sphilip ifmr->ifm_status |= IFM_ACTIVE; 671227569Sphilip 672227569Sphilip efx_phy_media_type_get(sc->enp, &medium_type); 673227569Sphilip mode = sc->port.link_mode; 674227569Sphilip ifmr->ifm_active |= sfxge_link_mode[medium_type][mode]; 675227569Sphilip ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc); 676227569Sphilip } 677227569Sphilip 678278221Sarybchik SFXGE_ADAPTER_UNLOCK(sc); 679227569Sphilip} 680227569Sphilip 681227569Sphilipstatic int 682227569Sphilipsfxge_media_change(struct ifnet *ifp) 683227569Sphilip{ 684227569Sphilip struct sfxge_softc *sc; 685227569Sphilip struct ifmedia_entry *ifm; 686227569Sphilip int rc; 687227569Sphilip 688227569Sphilip sc = ifp->if_softc; 689227569Sphilip ifm = sc->media.ifm_cur; 690227569Sphilip 691278221Sarybchik SFXGE_ADAPTER_LOCK(sc); 692227569Sphilip 693227569Sphilip if (!SFXGE_RUNNING(sc)) { 694227569Sphilip rc = 0; 695227569Sphilip goto out; 696227569Sphilip } 697227569Sphilip 698227569Sphilip rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE); 699227569Sphilip if (rc != 0) 700227569Sphilip goto out; 701227569Sphilip 702227569Sphilip rc = efx_phy_adv_cap_set(sc->enp, ifm->ifm_data); 703227569Sphilipout: 704278221Sarybchik SFXGE_ADAPTER_UNLOCK(sc); 705227569Sphilip 706272325Sgnn return (rc); 707227569Sphilip} 708227569Sphilip 709227569Sphilipint sfxge_port_ifmedia_init(struct sfxge_softc *sc) 710227569Sphilip{ 711227569Sphilip efx_phy_media_type_t medium_type; 712227569Sphilip uint32_t cap_mask, mode_cap_mask; 713227569Sphilip efx_link_mode_t mode; 714227569Sphilip int mode_ifm, best_mode_ifm = 0; 715227569Sphilip int rc; 716227569Sphilip 717227569Sphilip /* We need port state to initialise the ifmedia list. */ 718227569Sphilip if ((rc = efx_nic_init(sc->enp)) != 0) 719227569Sphilip goto out; 720227569Sphilip if ((rc = efx_port_init(sc->enp)) != 0) 721227569Sphilip goto out2; 722227569Sphilip 723227569Sphilip /* 724227569Sphilip * Register ifconfig callbacks for querying and setting the 725227569Sphilip * link mode and link status. 726227569Sphilip */ 727227569Sphilip ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change, 728227569Sphilip sfxge_media_status); 729227569Sphilip 730227569Sphilip /* 731227569Sphilip * Map firmware medium type and capabilities to ifmedia types. 732227569Sphilip * ifmedia does not distinguish between forcing the link mode 733227569Sphilip * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T 734227569Sphilip * require AN even if only one link mode is enabled, and for 735227569Sphilip * 100BASE-TX it is useful even if the link mode is forced. 736227569Sphilip * Therefore we never disable auto-negotiation. 737227569Sphilip * 738227569Sphilip * Also enable and advertise flow control by default. 739227569Sphilip */ 740227569Sphilip 741227569Sphilip efx_phy_media_type_get(sc->enp, &medium_type); 742227569Sphilip efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); 743227569Sphilip 744227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10HDX == EFX_PHY_CAP_10HDX + 1); 745227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10FDX == EFX_PHY_CAP_10FDX + 1); 746227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_100HDX == EFX_PHY_CAP_100HDX + 1); 747227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_100FDX == EFX_PHY_CAP_100FDX + 1); 748227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_1000HDX == EFX_PHY_CAP_1000HDX + 1); 749227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_1000FDX == EFX_PHY_CAP_1000FDX + 1); 750227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10000FDX == EFX_PHY_CAP_10000FDX + 1); 751227569Sphilip 752227569Sphilip for (mode = EFX_LINK_10HDX; mode <= EFX_LINK_10000FDX; mode++) { 753227569Sphilip mode_cap_mask = 1 << (mode - 1); 754227569Sphilip mode_ifm = sfxge_link_mode[medium_type][mode]; 755227569Sphilip 756227569Sphilip if ((cap_mask & mode_cap_mask) && mode_ifm) { 757227569Sphilip mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN); 758227569Sphilip 759227569Sphilip#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 760227569Sphilip /* No flow-control */ 761227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 762227569Sphilip 763227569Sphilip /* Respond-only. If using AN, we implicitly 764227569Sphilip * offer symmetric as well, but that doesn't 765227569Sphilip * mean we *have* to generate pause frames. 766227569Sphilip */ 767227569Sphilip mode_cap_mask |= cap_mask & ((1 << EFX_PHY_CAP_PAUSE) | 768227569Sphilip (1 << EFX_PHY_CAP_ASYM)); 769227569Sphilip mode_ifm |= IFM_ETH_RXPAUSE; 770227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 771227569Sphilip 772227569Sphilip /* Symmetric */ 773227569Sphilip mode_cap_mask &= ~(1 << EFX_PHY_CAP_ASYM); 774227569Sphilip mode_ifm |= IFM_ETH_TXPAUSE; 775227569Sphilip#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 776227569Sphilip mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); 777227569Sphilip#endif 778227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 779227569Sphilip 780227569Sphilip /* Link modes are numbered in order of speed, 781227569Sphilip * so assume the last one available is the best. 782227569Sphilip */ 783227569Sphilip best_mode_ifm = mode_ifm; 784227569Sphilip } 785227569Sphilip } 786227569Sphilip 787227569Sphilip if (cap_mask & (1 << EFX_PHY_CAP_AN)) { 788227569Sphilip /* Add autoselect mode. */ 789227569Sphilip mode_ifm = IFM_ETHER | IFM_AUTO; 790227569Sphilip ifmedia_add(&sc->media, mode_ifm, 791227569Sphilip cap_mask & ~(1 << EFX_PHY_CAP_ASYM), NULL); 792227569Sphilip best_mode_ifm = mode_ifm; 793227569Sphilip } 794227569Sphilip 795272325Sgnn if (best_mode_ifm != 0) 796227569Sphilip ifmedia_set(&sc->media, best_mode_ifm); 797227569Sphilip 798227569Sphilip /* Now discard port state until interface is started. */ 799227569Sphilip efx_port_fini(sc->enp); 800227569Sphilipout2: 801227569Sphilip efx_nic_fini(sc->enp); 802227569Sphilipout: 803272325Sgnn return (rc); 804227569Sphilip} 805