sfxge_port.c revision 264772
1227569Sphilip/*- 2227569Sphilip * Copyright (c) 2010-2011 Solarflare Communications, Inc. 3227569Sphilip * All rights reserved. 4227569Sphilip * 5227569Sphilip * This software was developed in part by Philip Paeps under contract for 6227569Sphilip * Solarflare Communications, Inc. 7227569Sphilip * 8227569Sphilip * Redistribution and use in source and binary forms, with or without 9227569Sphilip * modification, are permitted provided that the following conditions 10227569Sphilip * are met: 11227569Sphilip * 1. Redistributions of source code must retain the above copyright 12227569Sphilip * notice, this list of conditions and the following disclaimer. 13227569Sphilip * 2. Redistributions in binary form must reproduce the above copyright 14227569Sphilip * notice, this list of conditions and the following disclaimer in the 15227569Sphilip * documentation and/or other materials provided with the distribution. 16227569Sphilip * 17227569Sphilip * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18227569Sphilip * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19227569Sphilip * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20227569Sphilip * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21227569Sphilip * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22227569Sphilip * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23227569Sphilip * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24227569Sphilip * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25227569Sphilip * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26227569Sphilip * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27227569Sphilip * SUCH DAMAGE. 28227569Sphilip */ 29227569Sphilip 30227569Sphilip#include <sys/cdefs.h> 31227569Sphilip__FBSDID("$FreeBSD: head/sys/dev/sfxge/sfxge_port.c 264772 2014-04-22 20:19:09Z gnn $"); 32227569Sphilip 33227569Sphilip#include <sys/types.h> 34227699Sphilip#include <sys/limits.h> 35227569Sphilip#include <net/ethernet.h> 36227569Sphilip#include <net/if_dl.h> 37227569Sphilip 38227569Sphilip#include "common/efx.h" 39227569Sphilip 40227569Sphilip#include "sfxge.h" 41227569Sphilip 42227569Sphilipstatic int 43227569Sphilipsfxge_mac_stat_update(struct sfxge_softc *sc) 44227569Sphilip{ 45227569Sphilip struct sfxge_port *port = &sc->port; 46227569Sphilip efsys_mem_t *esmp = &(port->mac_stats.dma_buf); 47227569Sphilip clock_t now; 48227569Sphilip unsigned int count; 49227569Sphilip int rc; 50227569Sphilip 51227569Sphilip mtx_lock(&port->lock); 52227569Sphilip 53227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) { 54227569Sphilip rc = 0; 55227569Sphilip goto out; 56227569Sphilip } 57227569Sphilip 58227569Sphilip now = ticks; 59227569Sphilip if (now - port->mac_stats.update_time < hz) { 60227569Sphilip rc = 0; 61227569Sphilip goto out; 62227569Sphilip } 63227569Sphilip 64227569Sphilip port->mac_stats.update_time = now; 65227569Sphilip 66227569Sphilip /* If we're unlucky enough to read statistics wduring the DMA, wait 67227569Sphilip * up to 10ms for it to finish (typically takes <500us) */ 68227569Sphilip for (count = 0; count < 100; ++count) { 69227569Sphilip EFSYS_PROBE1(wait, unsigned int, count); 70227569Sphilip 71227569Sphilip /* Synchronize the DMA memory for reading */ 72227569Sphilip bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 73227569Sphilip BUS_DMASYNC_POSTREAD); 74227569Sphilip 75227569Sphilip /* Try to update the cached counters */ 76227569Sphilip if ((rc = efx_mac_stats_update(sc->enp, esmp, 77227569Sphilip port->mac_stats.decode_buf, NULL)) != EAGAIN) 78227569Sphilip goto out; 79227569Sphilip 80227569Sphilip DELAY(100); 81227569Sphilip } 82227569Sphilip 83227569Sphilip rc = ETIMEDOUT; 84227569Sphilipout: 85227569Sphilip mtx_unlock(&port->lock); 86227569Sphilip return rc; 87227569Sphilip} 88227569Sphilip 89227569Sphilipstatic int 90227569Sphilipsfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS) 91227569Sphilip{ 92227569Sphilip struct sfxge_softc *sc = arg1; 93227569Sphilip unsigned int id = arg2; 94227569Sphilip int rc; 95227569Sphilip 96227569Sphilip if ((rc = sfxge_mac_stat_update(sc)) != 0) 97227569Sphilip return rc; 98227569Sphilip 99227569Sphilip return SYSCTL_OUT(req, 100227569Sphilip (uint64_t *)sc->port.mac_stats.decode_buf + id, 101227569Sphilip sizeof(uint64_t)); 102227569Sphilip} 103227569Sphilip 104227569Sphilipstatic void 105227569Sphilipsfxge_mac_stat_init(struct sfxge_softc *sc) 106227569Sphilip{ 107227569Sphilip struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 108227569Sphilip struct sysctl_oid_list *stat_list; 109227569Sphilip unsigned int id; 110227569Sphilip const char *name; 111227569Sphilip 112227569Sphilip stat_list = SYSCTL_CHILDREN(sc->stats_node); 113227569Sphilip 114227569Sphilip /* Initialise the named stats */ 115227569Sphilip for (id = 0; id < EFX_MAC_NSTATS; id++) { 116227569Sphilip name = efx_mac_stat_name(sc->enp, id); 117227569Sphilip SYSCTL_ADD_PROC( 118227569Sphilip ctx, stat_list, 119227569Sphilip OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD, 120227569Sphilip sc, id, sfxge_mac_stat_handler, "Q", 121227569Sphilip ""); 122227569Sphilip } 123227569Sphilip} 124227569Sphilip 125227569Sphilip#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 126227569Sphilip 127227569Sphilipstatic unsigned int 128227569Sphilipsfxge_port_wanted_fc(struct sfxge_softc *sc) 129227569Sphilip{ 130227569Sphilip struct ifmedia_entry *ifm = sc->media.ifm_cur; 131227569Sphilip 132227569Sphilip if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO)) 133227569Sphilip return EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 134227569Sphilip return ((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) | 135227569Sphilip ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0); 136227569Sphilip} 137227569Sphilip 138227569Sphilipstatic unsigned int 139227569Sphilipsfxge_port_link_fc_ifm(struct sfxge_softc *sc) 140227569Sphilip{ 141227569Sphilip unsigned int wanted_fc, link_fc; 142227569Sphilip 143227569Sphilip efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 144227569Sphilip return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) | 145227569Sphilip ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0); 146227569Sphilip} 147227569Sphilip 148227569Sphilip#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 149227569Sphilip 150227569Sphilipstatic unsigned int 151227569Sphilipsfxge_port_wanted_fc(struct sfxge_softc *sc) 152227569Sphilip{ 153227569Sphilip return sc->port.wanted_fc; 154227569Sphilip} 155227569Sphilip 156227569Sphilipstatic unsigned int 157227569Sphilipsfxge_port_link_fc_ifm(struct sfxge_softc *sc) 158227569Sphilip{ 159227569Sphilip return 0; 160227569Sphilip} 161227569Sphilip 162227569Sphilipstatic int 163227569Sphilipsfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS) 164227569Sphilip{ 165227569Sphilip struct sfxge_softc *sc; 166227569Sphilip struct sfxge_port *port; 167227569Sphilip unsigned int fcntl; 168227569Sphilip int error; 169227569Sphilip 170227569Sphilip sc = arg1; 171227569Sphilip port = &sc->port; 172227569Sphilip 173227569Sphilip mtx_lock(&port->lock); 174227569Sphilip 175227569Sphilip if (req->newptr) { 176227569Sphilip if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0) 177227569Sphilip goto out; 178227569Sphilip 179227569Sphilip if (port->wanted_fc == fcntl) 180227569Sphilip goto out; 181227569Sphilip 182227569Sphilip port->wanted_fc = fcntl; 183227569Sphilip 184227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) 185227569Sphilip goto out; 186227569Sphilip 187227569Sphilip error = efx_mac_fcntl_set(sc->enp, port->wanted_fc, B_TRUE); 188227569Sphilip } else { 189227569Sphilip error = SYSCTL_OUT(req, &port->wanted_fc, 190227569Sphilip sizeof(port->wanted_fc)); 191227569Sphilip } 192227569Sphilip 193227569Sphilipout: 194227569Sphilip mtx_unlock(&port->lock); 195227569Sphilip 196227569Sphilip return (error); 197227569Sphilip} 198227569Sphilip 199227569Sphilipstatic int 200227569Sphilipsfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS) 201227569Sphilip{ 202227569Sphilip struct sfxge_softc *sc; 203227569Sphilip struct sfxge_port *port; 204227569Sphilip unsigned int wanted_fc, link_fc; 205227569Sphilip int error; 206227569Sphilip 207227569Sphilip sc = arg1; 208227569Sphilip port = &sc->port; 209227569Sphilip 210227569Sphilip mtx_lock(&port->lock); 211227569Sphilip if (port->init_state == SFXGE_PORT_STARTED && SFXGE_LINK_UP(sc)) 212227569Sphilip efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 213227569Sphilip else 214227569Sphilip link_fc = 0; 215227569Sphilip error = SYSCTL_OUT(req, &link_fc, sizeof(link_fc)); 216227569Sphilip mtx_unlock(&port->lock); 217227569Sphilip 218227569Sphilip return (error); 219227569Sphilip} 220227569Sphilip 221227569Sphilip#endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */ 222227569Sphilip 223227699Sphilipstatic const u_long sfxge_link_baudrate[EFX_LINK_NMODES] = { 224227699Sphilip [EFX_LINK_10HDX] = IF_Mbps(10), 225227699Sphilip [EFX_LINK_10FDX] = IF_Mbps(10), 226227699Sphilip [EFX_LINK_100HDX] = IF_Mbps(100), 227227699Sphilip [EFX_LINK_100FDX] = IF_Mbps(100), 228227699Sphilip [EFX_LINK_1000HDX] = IF_Gbps(1), 229227699Sphilip [EFX_LINK_1000FDX] = IF_Gbps(1), 230227699Sphilip [EFX_LINK_10000FDX] = MIN(IF_Gbps(10ULL), ULONG_MAX), 231227569Sphilip}; 232227569Sphilip 233227569Sphilipvoid 234227569Sphilipsfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode) 235227569Sphilip{ 236227569Sphilip struct sfxge_port *port; 237227569Sphilip int link_state; 238227569Sphilip 239227569Sphilip port = &sc->port; 240227569Sphilip 241227569Sphilip if (port->link_mode == mode) 242227569Sphilip return; 243227569Sphilip 244227569Sphilip port->link_mode = mode; 245227569Sphilip 246227569Sphilip /* Push link state update to the OS */ 247227569Sphilip link_state = (port->link_mode != EFX_LINK_DOWN ? 248227569Sphilip LINK_STATE_UP : LINK_STATE_DOWN); 249227699Sphilip sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode]; 250227569Sphilip if_link_state_change(sc->ifnet, link_state); 251227569Sphilip} 252227569Sphilip 253227569Sphilipstatic void 254227569Sphilipsfxge_mac_poll_work(void *arg, int npending) 255227569Sphilip{ 256227569Sphilip struct sfxge_softc *sc; 257227569Sphilip efx_nic_t *enp; 258227569Sphilip struct sfxge_port *port; 259227569Sphilip efx_link_mode_t mode; 260227569Sphilip 261227569Sphilip sc = (struct sfxge_softc *)arg; 262227569Sphilip enp = sc->enp; 263227569Sphilip port = &sc->port; 264227569Sphilip 265227569Sphilip mtx_lock(&port->lock); 266227569Sphilip 267227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) 268227569Sphilip goto done; 269227569Sphilip 270227569Sphilip /* This may sleep waiting for MCDI completion */ 271227569Sphilip (void)efx_port_poll(enp, &mode); 272227569Sphilip sfxge_mac_link_update(sc, mode); 273227569Sphilip 274227569Sphilipdone: 275227569Sphilip mtx_unlock(&port->lock); 276227569Sphilip} 277227569Sphilip 278227569Sphilipstatic int 279227569Sphilipsfxge_mac_filter_set_locked(struct sfxge_softc *sc) 280227569Sphilip{ 281227569Sphilip unsigned int bucket[EFX_MAC_HASH_BITS]; 282227569Sphilip struct ifnet *ifp = sc->ifnet; 283227569Sphilip struct ifmultiaddr *ifma; 284227569Sphilip struct sockaddr_dl *sa; 285227569Sphilip efx_nic_t *enp = sc->enp; 286227569Sphilip unsigned int index; 287227569Sphilip int rc; 288227569Sphilip 289227569Sphilip /* Set promisc-unicast and broadcast filter bits */ 290227569Sphilip if ((rc = efx_mac_filter_set(enp, !!(ifp->if_flags & IFF_PROMISC), 291227569Sphilip B_TRUE)) != 0) 292227569Sphilip return rc; 293227569Sphilip 294227569Sphilip /* Set multicast hash filter */ 295227569Sphilip if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { 296227569Sphilip for (index = 0; index < EFX_MAC_HASH_BITS; index++) 297227569Sphilip bucket[index] = 1; 298227569Sphilip } else { 299227569Sphilip /* Broadcast frames also go through the multicast 300227569Sphilip * filter, and the broadcast address hashes to 301227569Sphilip * 0xff. */ 302227569Sphilip bucket[0xff] = 1; 303227569Sphilip 304229613Sjhb if_maddr_rlock(ifp); 305227569Sphilip TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 306227569Sphilip if (ifma->ifma_addr->sa_family == AF_LINK) { 307227569Sphilip sa = (struct sockaddr_dl *)ifma->ifma_addr; 308227569Sphilip index = ether_crc32_le(LLADDR(sa), 6) & 0xff; 309227569Sphilip bucket[index] = 1; 310227569Sphilip } 311227569Sphilip } 312229613Sjhb if_maddr_runlock(ifp); 313227569Sphilip } 314227569Sphilip return efx_mac_hash_set(enp, bucket); 315227569Sphilip} 316227569Sphilip 317227569Sphilipint 318227569Sphilipsfxge_mac_filter_set(struct sfxge_softc *sc) 319227569Sphilip{ 320227569Sphilip struct sfxge_port *port = &sc->port; 321227569Sphilip int rc; 322227569Sphilip 323227569Sphilip mtx_lock(&port->lock); 324264772Sgnn /* 325264772Sgnn * The function may be called without softc_lock held in the 326264772Sgnn * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler 327264772Sgnn * checks IFF_DRV_RUNNING flag which implies port started, but 328264772Sgnn * it is not guaranteed to remain. softc_lock shared lock can't 329264772Sgnn * be held in the case of these ioctls processing, since it 330264772Sgnn * results in failure where kernel complains that non-sleepable 331264772Sgnn * lock is held in sleeping thread. Both problems are repeatable 332264772Sgnn * on LAG with LACP proto bring up. 333264772Sgnn */ 334264772Sgnn if (port->init_state == SFXGE_PORT_STARTED) 335264772Sgnn rc = sfxge_mac_filter_set_locked(sc); 336264772Sgnn else 337264772Sgnn rc = 0; 338227569Sphilip mtx_unlock(&port->lock); 339227569Sphilip return rc; 340227569Sphilip} 341227569Sphilip 342227569Sphilipvoid 343227569Sphilipsfxge_port_stop(struct sfxge_softc *sc) 344227569Sphilip{ 345227569Sphilip struct sfxge_port *port; 346227569Sphilip efx_nic_t *enp; 347227569Sphilip 348227569Sphilip port = &sc->port; 349227569Sphilip enp = sc->enp; 350227569Sphilip 351227569Sphilip mtx_lock(&port->lock); 352227569Sphilip 353227569Sphilip KASSERT(port->init_state == SFXGE_PORT_STARTED, 354227569Sphilip ("port not started")); 355227569Sphilip 356227569Sphilip port->init_state = SFXGE_PORT_INITIALIZED; 357227569Sphilip 358227569Sphilip port->mac_stats.update_time = 0; 359227569Sphilip 360227569Sphilip /* This may call MCDI */ 361227569Sphilip (void)efx_mac_drain(enp, B_TRUE); 362227569Sphilip 363227569Sphilip (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE); 364227569Sphilip 365227569Sphilip port->link_mode = EFX_LINK_UNKNOWN; 366227569Sphilip 367227569Sphilip /* Destroy the common code port object. */ 368227569Sphilip efx_port_fini(sc->enp); 369227569Sphilip 370227569Sphilip mtx_unlock(&port->lock); 371227569Sphilip} 372227569Sphilip 373227569Sphilipint 374227569Sphilipsfxge_port_start(struct sfxge_softc *sc) 375227569Sphilip{ 376227569Sphilip uint8_t mac_addr[ETHER_ADDR_LEN]; 377227569Sphilip struct ifnet *ifp = sc->ifnet; 378227569Sphilip struct sfxge_port *port; 379227569Sphilip efx_nic_t *enp; 380227569Sphilip size_t pdu; 381227569Sphilip int rc; 382227569Sphilip 383227569Sphilip port = &sc->port; 384227569Sphilip enp = sc->enp; 385227569Sphilip 386227569Sphilip mtx_lock(&port->lock); 387227569Sphilip 388227569Sphilip KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 389227569Sphilip ("port not initialized")); 390227569Sphilip 391227569Sphilip /* Initialize the port object in the common code. */ 392227569Sphilip if ((rc = efx_port_init(sc->enp)) != 0) 393227569Sphilip goto fail; 394227569Sphilip 395227569Sphilip /* Set the SDU */ 396227569Sphilip pdu = EFX_MAC_PDU(ifp->if_mtu); 397227569Sphilip if ((rc = efx_mac_pdu_set(enp, pdu)) != 0) 398227569Sphilip goto fail2; 399227569Sphilip 400227569Sphilip if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE)) 401227569Sphilip != 0) 402227569Sphilip goto fail2; 403227569Sphilip 404227569Sphilip /* Set the unicast address */ 405229613Sjhb if_addr_rlock(ifp); 406227569Sphilip bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr), 407227569Sphilip mac_addr, sizeof(mac_addr)); 408229613Sjhb if_addr_runlock(ifp); 409227569Sphilip if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0) 410227569Sphilip goto fail; 411227569Sphilip 412227569Sphilip sfxge_mac_filter_set_locked(sc); 413227569Sphilip 414227569Sphilip /* Update MAC stats by DMA every second */ 415227569Sphilip if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 416227569Sphilip 1000, B_FALSE)) != 0) 417227569Sphilip goto fail2; 418227569Sphilip 419227569Sphilip if ((rc = efx_mac_drain(enp, B_FALSE)) != 0) 420227569Sphilip goto fail3; 421227569Sphilip 422227569Sphilip if ((rc = efx_phy_adv_cap_set(sc->enp, sc->media.ifm_cur->ifm_data)) 423227569Sphilip != 0) 424227569Sphilip goto fail4; 425227569Sphilip 426227569Sphilip port->init_state = SFXGE_PORT_STARTED; 427227569Sphilip 428227569Sphilip /* Single poll in case there were missing initial events */ 429227569Sphilip mtx_unlock(&port->lock); 430227569Sphilip sfxge_mac_poll_work(sc, 0); 431227569Sphilip 432227569Sphilip return (0); 433227569Sphilip 434227569Sphilipfail4: 435227569Sphilip (void)efx_mac_drain(enp, B_TRUE); 436227569Sphilipfail3: 437227569Sphilip (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 438227569Sphilip 0, B_FALSE); 439227569Sphilipfail2: 440227569Sphilip efx_port_fini(sc->enp); 441227569Sphilipfail: 442227569Sphilip mtx_unlock(&port->lock); 443227569Sphilip 444227569Sphilip return (rc); 445227569Sphilip} 446227569Sphilip 447227569Sphilipstatic int 448227569Sphilipsfxge_phy_stat_update(struct sfxge_softc *sc) 449227569Sphilip{ 450227569Sphilip struct sfxge_port *port = &sc->port; 451227569Sphilip efsys_mem_t *esmp = &port->phy_stats.dma_buf; 452227569Sphilip clock_t now; 453227569Sphilip unsigned int count; 454227569Sphilip int rc; 455227569Sphilip 456227569Sphilip mtx_lock(&port->lock); 457227569Sphilip 458227569Sphilip if (port->init_state != SFXGE_PORT_STARTED) { 459227569Sphilip rc = 0; 460227569Sphilip goto out; 461227569Sphilip } 462227569Sphilip 463227569Sphilip now = ticks; 464227569Sphilip if (now - port->phy_stats.update_time < hz) { 465227569Sphilip rc = 0; 466227569Sphilip goto out; 467227569Sphilip } 468227569Sphilip 469227569Sphilip port->phy_stats.update_time = now; 470227569Sphilip 471227569Sphilip /* If we're unlucky enough to read statistics wduring the DMA, wait 472227569Sphilip * up to 10ms for it to finish (typically takes <500us) */ 473227569Sphilip for (count = 0; count < 100; ++count) { 474227569Sphilip EFSYS_PROBE1(wait, unsigned int, count); 475227569Sphilip 476227569Sphilip /* Synchronize the DMA memory for reading */ 477227569Sphilip bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 478227569Sphilip BUS_DMASYNC_POSTREAD); 479227569Sphilip 480227569Sphilip /* Try to update the cached counters */ 481227569Sphilip if ((rc = efx_phy_stats_update(sc->enp, esmp, 482227569Sphilip port->phy_stats.decode_buf)) != EAGAIN) 483227569Sphilip goto out; 484227569Sphilip 485227569Sphilip DELAY(100); 486227569Sphilip } 487227569Sphilip 488227569Sphilip rc = ETIMEDOUT; 489227569Sphilipout: 490227569Sphilip mtx_unlock(&port->lock); 491227569Sphilip return rc; 492227569Sphilip} 493227569Sphilip 494227569Sphilipstatic int 495227569Sphilipsfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS) 496227569Sphilip{ 497227569Sphilip struct sfxge_softc *sc = arg1; 498227569Sphilip unsigned int id = arg2; 499227569Sphilip int rc; 500227569Sphilip 501227569Sphilip if ((rc = sfxge_phy_stat_update(sc)) != 0) 502227569Sphilip return rc; 503227569Sphilip 504227569Sphilip return SYSCTL_OUT(req, 505227569Sphilip (uint32_t *)sc->port.phy_stats.decode_buf + id, 506227569Sphilip sizeof(uint32_t)); 507227569Sphilip} 508227569Sphilip 509227569Sphilipstatic void 510227569Sphilipsfxge_phy_stat_init(struct sfxge_softc *sc) 511227569Sphilip{ 512227569Sphilip struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 513227569Sphilip struct sysctl_oid_list *stat_list; 514227569Sphilip unsigned int id; 515227569Sphilip const char *name; 516227569Sphilip uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask; 517227569Sphilip 518227569Sphilip stat_list = SYSCTL_CHILDREN(sc->stats_node); 519227569Sphilip 520227569Sphilip /* Initialise the named stats */ 521227569Sphilip for (id = 0; id < EFX_PHY_NSTATS; id++) { 522227569Sphilip if (!(stat_mask & ((uint64_t)1 << id))) 523227569Sphilip continue; 524227569Sphilip name = efx_phy_stat_name(sc->enp, id); 525227569Sphilip SYSCTL_ADD_PROC( 526227569Sphilip ctx, stat_list, 527227569Sphilip OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD, 528227569Sphilip sc, id, sfxge_phy_stat_handler, 529227569Sphilip id == EFX_PHY_STAT_OUI ? "IX" : "IU", 530227569Sphilip ""); 531227569Sphilip } 532227569Sphilip} 533227569Sphilip 534227569Sphilipvoid 535227569Sphilipsfxge_port_fini(struct sfxge_softc *sc) 536227569Sphilip{ 537227569Sphilip struct sfxge_port *port; 538227569Sphilip efsys_mem_t *esmp; 539227569Sphilip 540227569Sphilip port = &sc->port; 541227569Sphilip esmp = &port->mac_stats.dma_buf; 542227569Sphilip 543227569Sphilip KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 544227569Sphilip ("Port not initialized")); 545227569Sphilip 546227569Sphilip port->init_state = SFXGE_PORT_UNINITIALIZED; 547227569Sphilip 548227569Sphilip port->link_mode = EFX_LINK_UNKNOWN; 549227569Sphilip 550227569Sphilip /* Finish with PHY DMA memory */ 551227569Sphilip sfxge_dma_free(&port->phy_stats.dma_buf); 552227569Sphilip free(port->phy_stats.decode_buf, M_SFXGE); 553227569Sphilip 554227569Sphilip sfxge_dma_free(esmp); 555227569Sphilip free(port->mac_stats.decode_buf, M_SFXGE); 556227569Sphilip 557227569Sphilip mtx_destroy(&port->lock); 558227569Sphilip 559227569Sphilip port->sc = NULL; 560227569Sphilip} 561227569Sphilip 562227569Sphilipint 563227569Sphilipsfxge_port_init(struct sfxge_softc *sc) 564227569Sphilip{ 565227569Sphilip struct sfxge_port *port; 566227569Sphilip struct sysctl_ctx_list *sysctl_ctx; 567227569Sphilip struct sysctl_oid *sysctl_tree; 568227569Sphilip efsys_mem_t *mac_stats_buf, *phy_stats_buf; 569227569Sphilip int rc; 570227569Sphilip 571227569Sphilip port = &sc->port; 572227569Sphilip mac_stats_buf = &port->mac_stats.dma_buf; 573227569Sphilip phy_stats_buf = &port->phy_stats.dma_buf; 574227569Sphilip 575227569Sphilip KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED, 576227569Sphilip ("Port already initialized")); 577227569Sphilip 578227569Sphilip port->sc = sc; 579227569Sphilip 580227569Sphilip mtx_init(&port->lock, "sfxge_port", NULL, MTX_DEF); 581227569Sphilip 582227569Sphilip port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t), 583227569Sphilip M_SFXGE, M_WAITOK | M_ZERO); 584227569Sphilip if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0) 585227569Sphilip goto fail; 586227569Sphilip bzero(phy_stats_buf->esm_base, phy_stats_buf->esm_size); 587227569Sphilip sfxge_phy_stat_init(sc); 588227569Sphilip 589227569Sphilip sysctl_ctx = device_get_sysctl_ctx(sc->dev); 590227569Sphilip sysctl_tree = device_get_sysctl_tree(sc->dev); 591227569Sphilip 592227569Sphilip#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 593227569Sphilip /* If flow control cannot be configured or reported through 594227569Sphilip * ifmedia, provide sysctls for it. */ 595227569Sphilip port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 596227569Sphilip SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 597227569Sphilip "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0, 598227569Sphilip sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode"); 599227569Sphilip SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 600227569Sphilip "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0, 601227569Sphilip sfxge_port_link_fc_handler, "IU", "link flow control mode"); 602227569Sphilip#endif 603227569Sphilip 604227569Sphilip port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t), 605227569Sphilip M_SFXGE, M_WAITOK | M_ZERO); 606227569Sphilip if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0) 607227569Sphilip goto fail2; 608227569Sphilip bzero(mac_stats_buf->esm_base, mac_stats_buf->esm_size); 609227569Sphilip sfxge_mac_stat_init(sc); 610227569Sphilip 611227569Sphilip port->init_state = SFXGE_PORT_INITIALIZED; 612227569Sphilip 613227569Sphilip return (0); 614227569Sphilip 615227569Sphilipfail2: 616227569Sphilip free(port->mac_stats.decode_buf, M_SFXGE); 617227569Sphilip sfxge_dma_free(phy_stats_buf); 618227569Sphilipfail: 619227569Sphilip free(port->phy_stats.decode_buf, M_SFXGE); 620227569Sphilip (void)mtx_destroy(&port->lock); 621227569Sphilip port->sc = NULL; 622227569Sphilip return rc; 623227569Sphilip} 624227569Sphilip 625227569Sphilipstatic int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { 626227569Sphilip [EFX_PHY_MEDIA_CX4] = { 627227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4, 628227569Sphilip }, 629227569Sphilip [EFX_PHY_MEDIA_KX4] = { 630227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4, 631227569Sphilip }, 632227569Sphilip [EFX_PHY_MEDIA_XFP] = { 633227569Sphilip /* Don't know the module type, but assume SR for now. */ 634227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 635227569Sphilip }, 636227569Sphilip [EFX_PHY_MEDIA_SFP_PLUS] = { 637227569Sphilip /* Don't know the module type, but assume SX/SR for now. */ 638227569Sphilip [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX, 639227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 640227569Sphilip }, 641227569Sphilip [EFX_PHY_MEDIA_BASE_T] = { 642227569Sphilip [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T, 643227569Sphilip [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T, 644227569Sphilip [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX, 645227569Sphilip [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX, 646227569Sphilip [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T, 647227569Sphilip [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T, 648227569Sphilip [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T, 649227569Sphilip }, 650227569Sphilip}; 651227569Sphilip 652227569Sphilipstatic void 653227569Sphilipsfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 654227569Sphilip{ 655227569Sphilip struct sfxge_softc *sc; 656227569Sphilip efx_phy_media_type_t medium_type; 657227569Sphilip efx_link_mode_t mode; 658227569Sphilip 659227569Sphilip sc = ifp->if_softc; 660227569Sphilip sx_xlock(&sc->softc_lock); 661227569Sphilip 662227569Sphilip ifmr->ifm_status = IFM_AVALID; 663227569Sphilip ifmr->ifm_active = IFM_ETHER; 664227569Sphilip 665227569Sphilip if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) { 666227569Sphilip ifmr->ifm_status |= IFM_ACTIVE; 667227569Sphilip 668227569Sphilip efx_phy_media_type_get(sc->enp, &medium_type); 669227569Sphilip mode = sc->port.link_mode; 670227569Sphilip ifmr->ifm_active |= sfxge_link_mode[medium_type][mode]; 671227569Sphilip ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc); 672227569Sphilip } 673227569Sphilip 674227569Sphilip sx_xunlock(&sc->softc_lock); 675227569Sphilip} 676227569Sphilip 677227569Sphilipstatic int 678227569Sphilipsfxge_media_change(struct ifnet *ifp) 679227569Sphilip{ 680227569Sphilip struct sfxge_softc *sc; 681227569Sphilip struct ifmedia_entry *ifm; 682227569Sphilip int rc; 683227569Sphilip 684227569Sphilip sc = ifp->if_softc; 685227569Sphilip ifm = sc->media.ifm_cur; 686227569Sphilip 687227569Sphilip sx_xlock(&sc->softc_lock); 688227569Sphilip 689227569Sphilip if (!SFXGE_RUNNING(sc)) { 690227569Sphilip rc = 0; 691227569Sphilip goto out; 692227569Sphilip } 693227569Sphilip 694227569Sphilip rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE); 695227569Sphilip if (rc != 0) 696227569Sphilip goto out; 697227569Sphilip 698227569Sphilip rc = efx_phy_adv_cap_set(sc->enp, ifm->ifm_data); 699227569Sphilipout: 700227569Sphilip sx_xunlock(&sc->softc_lock); 701227569Sphilip 702227569Sphilip return rc; 703227569Sphilip} 704227569Sphilip 705227569Sphilipint sfxge_port_ifmedia_init(struct sfxge_softc *sc) 706227569Sphilip{ 707227569Sphilip efx_phy_media_type_t medium_type; 708227569Sphilip uint32_t cap_mask, mode_cap_mask; 709227569Sphilip efx_link_mode_t mode; 710227569Sphilip int mode_ifm, best_mode_ifm = 0; 711227569Sphilip int rc; 712227569Sphilip 713227569Sphilip /* We need port state to initialise the ifmedia list. */ 714227569Sphilip if ((rc = efx_nic_init(sc->enp)) != 0) 715227569Sphilip goto out; 716227569Sphilip if ((rc = efx_port_init(sc->enp)) != 0) 717227569Sphilip goto out2; 718227569Sphilip 719227569Sphilip /* 720227569Sphilip * Register ifconfig callbacks for querying and setting the 721227569Sphilip * link mode and link status. 722227569Sphilip */ 723227569Sphilip ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change, 724227569Sphilip sfxge_media_status); 725227569Sphilip 726227569Sphilip /* 727227569Sphilip * Map firmware medium type and capabilities to ifmedia types. 728227569Sphilip * ifmedia does not distinguish between forcing the link mode 729227569Sphilip * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T 730227569Sphilip * require AN even if only one link mode is enabled, and for 731227569Sphilip * 100BASE-TX it is useful even if the link mode is forced. 732227569Sphilip * Therefore we never disable auto-negotiation. 733227569Sphilip * 734227569Sphilip * Also enable and advertise flow control by default. 735227569Sphilip */ 736227569Sphilip 737227569Sphilip efx_phy_media_type_get(sc->enp, &medium_type); 738227569Sphilip efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); 739227569Sphilip 740227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10HDX == EFX_PHY_CAP_10HDX + 1); 741227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10FDX == EFX_PHY_CAP_10FDX + 1); 742227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_100HDX == EFX_PHY_CAP_100HDX + 1); 743227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_100FDX == EFX_PHY_CAP_100FDX + 1); 744227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_1000HDX == EFX_PHY_CAP_1000HDX + 1); 745227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_1000FDX == EFX_PHY_CAP_1000FDX + 1); 746227569Sphilip EFX_STATIC_ASSERT(EFX_LINK_10000FDX == EFX_PHY_CAP_10000FDX + 1); 747227569Sphilip 748227569Sphilip for (mode = EFX_LINK_10HDX; mode <= EFX_LINK_10000FDX; mode++) { 749227569Sphilip mode_cap_mask = 1 << (mode - 1); 750227569Sphilip mode_ifm = sfxge_link_mode[medium_type][mode]; 751227569Sphilip 752227569Sphilip if ((cap_mask & mode_cap_mask) && mode_ifm) { 753227569Sphilip mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN); 754227569Sphilip 755227569Sphilip#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 756227569Sphilip /* No flow-control */ 757227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 758227569Sphilip 759227569Sphilip /* Respond-only. If using AN, we implicitly 760227569Sphilip * offer symmetric as well, but that doesn't 761227569Sphilip * mean we *have* to generate pause frames. 762227569Sphilip */ 763227569Sphilip mode_cap_mask |= cap_mask & ((1 << EFX_PHY_CAP_PAUSE) | 764227569Sphilip (1 << EFX_PHY_CAP_ASYM)); 765227569Sphilip mode_ifm |= IFM_ETH_RXPAUSE; 766227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 767227569Sphilip 768227569Sphilip /* Symmetric */ 769227569Sphilip mode_cap_mask &= ~(1 << EFX_PHY_CAP_ASYM); 770227569Sphilip mode_ifm |= IFM_ETH_TXPAUSE; 771227569Sphilip#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 772227569Sphilip mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); 773227569Sphilip#endif 774227569Sphilip ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); 775227569Sphilip 776227569Sphilip /* Link modes are numbered in order of speed, 777227569Sphilip * so assume the last one available is the best. 778227569Sphilip */ 779227569Sphilip best_mode_ifm = mode_ifm; 780227569Sphilip } 781227569Sphilip } 782227569Sphilip 783227569Sphilip if (cap_mask & (1 << EFX_PHY_CAP_AN)) { 784227569Sphilip /* Add autoselect mode. */ 785227569Sphilip mode_ifm = IFM_ETHER | IFM_AUTO; 786227569Sphilip ifmedia_add(&sc->media, mode_ifm, 787227569Sphilip cap_mask & ~(1 << EFX_PHY_CAP_ASYM), NULL); 788227569Sphilip best_mode_ifm = mode_ifm; 789227569Sphilip } 790227569Sphilip 791227569Sphilip if (best_mode_ifm) 792227569Sphilip ifmedia_set(&sc->media, best_mode_ifm); 793227569Sphilip 794227569Sphilip /* Now discard port state until interface is started. */ 795227569Sphilip efx_port_fini(sc->enp); 796227569Sphilipout2: 797227569Sphilip efx_nic_fini(sc->enp); 798227569Sphilipout: 799227569Sphilip return rc; 800227569Sphilip} 801