pci_pci.c revision 181789
169783Smsmith/*- 269783Smsmith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 369783Smsmith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 469783Smsmith * Copyright (c) 2000 BSDi 569783Smsmith * All rights reserved. 669783Smsmith * 769783Smsmith * Redistribution and use in source and binary forms, with or without 869783Smsmith * modification, are permitted provided that the following conditions 969783Smsmith * are met: 1069783Smsmith * 1. Redistributions of source code must retain the above copyright 1169783Smsmith * notice, this list of conditions and the following disclaimer. 1269783Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1369783Smsmith * notice, this list of conditions and the following disclaimer in the 1469783Smsmith * documentation and/or other materials provided with the distribution. 1569783Smsmith * 3. The name of the author may not be used to endorse or promote products 1669783Smsmith * derived from this software without specific prior written permission. 1769783Smsmith * 1869783Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1969783Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2069783Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2169783Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2269783Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2369783Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2469783Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569783Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2669783Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2769783Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2869783Smsmith * SUCH DAMAGE. 2969783Smsmith */ 3069783Smsmith 31119418Sobrien#include <sys/cdefs.h> 32119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/pci/pci_pci.c 181789 2008-08-16 20:18:40Z imp $"); 33119418Sobrien 3469783Smsmith/* 3569783Smsmith * PCI:PCI bridge support. 3669783Smsmith */ 3769783Smsmith 3869783Smsmith#include <sys/param.h> 3969783Smsmith#include <sys/systm.h> 4069783Smsmith#include <sys/kernel.h> 41129876Sphk#include <sys/module.h> 4269783Smsmith#include <sys/bus.h> 43107546Simp#include <machine/bus.h> 44107546Simp#include <sys/rman.h> 45106844Smdodd#include <sys/sysctl.h> 4669783Smsmith 4769783Smsmith#include <machine/resource.h> 4869783Smsmith 49119285Simp#include <dev/pci/pcivar.h> 50119285Simp#include <dev/pci/pcireg.h> 51119285Simp#include <dev/pci/pcib_private.h> 5269783Smsmith 5369783Smsmith#include "pcib_if.h" 5469783Smsmith 5569783Smsmithstatic int pcib_probe(device_t dev); 5669783Smsmith 5769783Smsmithstatic device_method_t pcib_methods[] = { 5869783Smsmith /* Device interface */ 5969783Smsmith DEVMETHOD(device_probe, pcib_probe), 6069783Smsmith DEVMETHOD(device_attach, pcib_attach), 61145661Simp DEVMETHOD(device_detach, bus_generic_detach), 6269783Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 6369783Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 6469783Smsmith DEVMETHOD(device_resume, bus_generic_resume), 6569783Smsmith 6669783Smsmith /* Bus interface */ 6769783Smsmith DEVMETHOD(bus_print_child, bus_generic_print_child), 6869783Smsmith DEVMETHOD(bus_read_ivar, pcib_read_ivar), 6969783Smsmith DEVMETHOD(bus_write_ivar, pcib_write_ivar), 7069783Smsmith DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 7169783Smsmith DEVMETHOD(bus_release_resource, bus_generic_release_resource), 7269783Smsmith DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 7369783Smsmith DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 7469783Smsmith DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 7569783Smsmith DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 7669783Smsmith 7769783Smsmith /* pcib interface */ 7869783Smsmith DEVMETHOD(pcib_maxslots, pcib_maxslots), 7969783Smsmith DEVMETHOD(pcib_read_config, pcib_read_config), 8069783Smsmith DEVMETHOD(pcib_write_config, pcib_write_config), 8169783Smsmith DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt), 82164264Sjhb DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi), 83164264Sjhb DEVMETHOD(pcib_release_msi, pcib_release_msi), 84164264Sjhb DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix), 85164264Sjhb DEVMETHOD(pcib_release_msix, pcib_release_msix), 86169221Sjhb DEVMETHOD(pcib_map_msi, pcib_map_msi), 8769783Smsmith 8869783Smsmith { 0, 0 } 8969783Smsmith}; 9069783Smsmith 91154079Sjhbstatic devclass_t pcib_devclass; 9269783Smsmith 93154079SjhbDEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc)); 9469783SmsmithDRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); 9569783Smsmith 9669783Smsmith/* 97163805Simp * Is the prefetch window open (eg, can we allocate memory in it?) 98163805Simp */ 99163805Simpstatic int 100163805Simppcib_is_prefetch_open(struct pcib_softc *sc) 101163805Simp{ 102163805Simp return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit); 103163805Simp} 104163805Simp 105163805Simp/* 106163805Simp * Is the nonprefetch window open (eg, can we allocate memory in it?) 107163805Simp */ 108163805Simpstatic int 109163805Simppcib_is_nonprefetch_open(struct pcib_softc *sc) 110163805Simp{ 111163805Simp return (sc->membase > 0 && sc->membase < sc->memlimit); 112163805Simp} 113163805Simp 114163805Simp/* 115163805Simp * Is the io window open (eg, can we allocate ports in it?) 116163805Simp */ 117163805Simpstatic int 118163805Simppcib_is_io_open(struct pcib_softc *sc) 119163805Simp{ 120163805Simp return (sc->iobase > 0 && sc->iobase < sc->iolimit); 121163805Simp} 122163805Simp 123163805Simp/* 12469783Smsmith * Generic device interface 12569783Smsmith */ 12669783Smsmithstatic int 12769783Smsmithpcib_probe(device_t dev) 12869783Smsmith{ 12969783Smsmith if ((pci_get_class(dev) == PCIC_BRIDGE) && 13069783Smsmith (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) { 13169783Smsmith device_set_desc(dev, "PCI-PCI bridge"); 13269783Smsmith return(-10000); 13369783Smsmith } 13469783Smsmith return(ENXIO); 13569783Smsmith} 13669783Smsmith 137102441Sjhbvoid 138102441Sjhbpcib_attach_common(device_t dev) 13969783Smsmith{ 14069783Smsmith struct pcib_softc *sc; 141119266Simp uint8_t iolow; 142181789Simp struct sysctl_ctx_list *sctx; 143181789Simp struct sysctl_oid *soid; 14469783Smsmith 14569783Smsmith sc = device_get_softc(dev); 14669783Smsmith sc->dev = dev; 14769783Smsmith 14869908Smsmith /* 14969908Smsmith * Get current bridge configuration. 15069908Smsmith */ 15169953Smsmith sc->command = pci_read_config(dev, PCIR_COMMAND, 1); 152172394Smarius sc->domain = pci_get_domain(dev); 153181789Simp sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1); 15469908Smsmith sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 15569908Smsmith sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 15669908Smsmith sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 15769908Smsmith sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 15869908Smsmith sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 15969783Smsmith 16069908Smsmith /* 161181789Simp * Setup sysctl reporting nodes 162181789Simp */ 163181789Simp sctx = device_get_sysctl_ctx(dev); 164181789Simp soid = device_get_sysctl_tree(dev); 165181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain", 166181789Simp CTLFLAG_RD, &sc->domain, 0, "Domain number"); 167181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus", 168181789Simp CTLFLAG_RD, &sc->pribus, 0, "Primary bus number"); 169181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus", 170181789Simp CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number"); 171181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus", 172181789Simp CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number"); 173181789Simp 174181789Simp /* 17569908Smsmith * Determine current I/O decode. 17669908Smsmith */ 17769953Smsmith if (sc->command & PCIM_CMD_PORTEN) { 17869953Smsmith iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1); 17969953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 18069953Smsmith sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2), 18169953Smsmith pci_read_config(dev, PCIR_IOBASEL_1, 1)); 18269953Smsmith } else { 18369953Smsmith sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1)); 18469953Smsmith } 18569908Smsmith 18669953Smsmith iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1); 18769953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 18869953Smsmith sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2), 18969953Smsmith pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 19069953Smsmith } else { 19169953Smsmith sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 19269953Smsmith } 19369908Smsmith } 19469908Smsmith 19569908Smsmith /* 19669908Smsmith * Determine current memory decode. 19769908Smsmith */ 19869953Smsmith if (sc->command & PCIM_CMD_MEMEN) { 19969953Smsmith sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2)); 20069953Smsmith sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 201163256Simp sc->pmembase = PCI_PPBMEMBASE(pci_read_config(dev, PCIR_PMBASEH_1, 4), 202163256Simp pci_read_config(dev, PCIR_PMBASEL_1, 2)); 203163256Simp sc->pmemlimit = PCI_PPBMEMLIMIT(pci_read_config(dev, PCIR_PMLIMITH_1, 4), 204163256Simp pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 20569953Smsmith } 20669908Smsmith 20769908Smsmith /* 20869908Smsmith * Quirk handling. 20969908Smsmith */ 21069908Smsmith switch (pci_get_devid(dev)) { 211124365Simp case 0x12258086: /* Intel 82454KX/GX (Orion) */ 21269908Smsmith { 213119266Simp uint8_t supbus; 21469908Smsmith 21569908Smsmith supbus = pci_read_config(dev, 0x41, 1); 21669908Smsmith if (supbus != 0xff) { 21769908Smsmith sc->secbus = supbus + 1; 21869908Smsmith sc->subbus = supbus + 1; 21969908Smsmith } 220124365Simp break; 22169908Smsmith } 222124365Simp 223124365Simp /* 224124365Simp * The i82380FB mobile docking controller is a PCI-PCI bridge, 225124365Simp * and it is a subtractive bridge. However, the ProgIf is wrong 226124365Simp * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 227124365Simp * happen. There's also a Toshiba bridge that behaves this 228124365Simp * way. 229124365Simp */ 230124365Simp case 0x124b8086: /* Intel 82380FB Mobile */ 231124365Simp case 0x060513d7: /* Toshiba ???? */ 232124365Simp sc->flags |= PCIB_SUBTRACTIVE; 23369908Smsmith break; 234149521Sjkim 235149521Sjkim /* Compaq R3000 BIOS sets wrong subordinate bus number. */ 236149521Sjkim case 0x00dd10de: 237149521Sjkim { 238149521Sjkim char *cp; 239149521Sjkim 240157949Sjkim if ((cp = getenv("smbios.planar.maker")) == NULL) 241149521Sjkim break; 242157949Sjkim if (strncmp(cp, "Compal", 6) != 0) { 243157949Sjkim freeenv(cp); 244149521Sjkim break; 245157949Sjkim } 246157949Sjkim freeenv(cp); 247157949Sjkim if ((cp = getenv("smbios.planar.product")) == NULL) 248157949Sjkim break; 249157949Sjkim if (strncmp(cp, "08A0", 4) != 0) { 250157949Sjkim freeenv(cp); 251157949Sjkim break; 252157949Sjkim } 253157949Sjkim freeenv(cp); 254149521Sjkim if (sc->subbus < 0xa) { 255149521Sjkim pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1); 256149521Sjkim sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 257149521Sjkim } 258149521Sjkim break; 259149521Sjkim } 26069908Smsmith } 26169908Smsmith 262165995Sjhb if (pci_msi_device_blacklisted(dev)) 263165995Sjhb sc->flags |= PCIB_DISABLE_MSI; 264165995Sjhb 265124365Simp /* 266124365Simp * Intel 815, 845 and other chipsets say they are PCI-PCI bridges, 267124365Simp * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM, 268124365Simp * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese. 269124365Simp * This means they act as if they were subtractively decoding 270124365Simp * bridges and pass all transactions. Mark them and real ProgIf 1 271124365Simp * parts as subtractive. 272124365Simp */ 273124365Simp if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 274168157Sjhb pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE) 275124365Simp sc->flags |= PCIB_SUBTRACTIVE; 276124365Simp 27769783Smsmith if (bootverbose) { 278172394Smarius device_printf(dev, " domain %d\n", sc->domain); 27969783Smsmith device_printf(dev, " secondary bus %d\n", sc->secbus); 28069783Smsmith device_printf(dev, " subordinate bus %d\n", sc->subbus); 28169783Smsmith device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit); 282163805Simp if (pcib_is_nonprefetch_open(sc)) 283163805Simp device_printf(dev, " memory decode 0x%jx-0x%jx\n", 284163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit); 285163805Simp if (pcib_is_prefetch_open(sc)) 286163805Simp device_printf(dev, " prefetched decode 0x%jx-0x%jx\n", 287163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 288163805Simp else 289163805Simp device_printf(dev, " no prefetched decode\n"); 290124365Simp if (sc->flags & PCIB_SUBTRACTIVE) 291124365Simp device_printf(dev, " Subtractively decoded bridge.\n"); 29269783Smsmith } 29369783Smsmith 29469783Smsmith /* 29569783Smsmith * XXX If the secondary bus number is zero, we should assign a bus number 29669783Smsmith * since the BIOS hasn't, then initialise the bridge. 29769783Smsmith */ 29869783Smsmith 29969783Smsmith /* 30069783Smsmith * XXX If the subordinate bus number is less than the secondary bus number, 30169783Smsmith * we should pick a better value. One sensible alternative would be to 30269783Smsmith * pick 255; the only tradeoff here is that configuration transactions 30369783Smsmith * would be more widely routed than absolutely necessary. 30469783Smsmith */ 305102441Sjhb} 30669783Smsmith 307103042Sjhbint 308102441Sjhbpcib_attach(device_t dev) 309102441Sjhb{ 310102441Sjhb struct pcib_softc *sc; 311102441Sjhb device_t child; 312102441Sjhb 313102441Sjhb pcib_attach_common(dev); 314102441Sjhb sc = device_get_softc(dev); 31569783Smsmith if (sc->secbus != 0) { 316103016Sjhb child = device_add_child(dev, "pci", sc->secbus); 31769783Smsmith if (child != NULL) 31869783Smsmith return(bus_generic_attach(dev)); 31969783Smsmith } 32069783Smsmith 32169783Smsmith /* no secondary bus; we should have fixed this */ 32269783Smsmith return(0); 32369783Smsmith} 32469783Smsmith 325102441Sjhbint 32669783Smsmithpcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 32769783Smsmith{ 32869783Smsmith struct pcib_softc *sc = device_get_softc(dev); 32969783Smsmith 33069783Smsmith switch (which) { 331172394Smarius case PCIB_IVAR_DOMAIN: 332172394Smarius *result = sc->domain; 333172394Smarius return(0); 33469783Smsmith case PCIB_IVAR_BUS: 33569783Smsmith *result = sc->secbus; 33669783Smsmith return(0); 33769783Smsmith } 33869783Smsmith return(ENOENT); 33969783Smsmith} 34069783Smsmith 341102441Sjhbint 34269783Smsmithpcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 34369783Smsmith{ 34469783Smsmith struct pcib_softc *sc = device_get_softc(dev); 34569783Smsmith 34669783Smsmith switch (which) { 347172394Smarius case PCIB_IVAR_DOMAIN: 348172394Smarius return(EINVAL); 34969783Smsmith case PCIB_IVAR_BUS: 35069783Smsmith sc->secbus = value; 351172394Smarius return(0); 35269783Smsmith } 35369783Smsmith return(ENOENT); 35469783Smsmith} 35569783Smsmith 35669783Smsmith/* 35769783Smsmith * We have to trap resource allocation requests and ensure that the bridge 35869783Smsmith * is set up to, or capable of handling them. 35969783Smsmith */ 360102441Sjhbstruct resource * 36169783Smsmithpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 362142051Simp u_long start, u_long end, u_long count, u_int flags) 36369783Smsmith{ 364124365Simp struct pcib_softc *sc = device_get_softc(dev); 365164130Sjhb const char *name, *suffix; 366124365Simp int ok; 36769783Smsmith 36869783Smsmith /* 36969783Smsmith * Fail the allocation for this range if it's not supported. 37069783Smsmith */ 371164130Sjhb name = device_get_nameunit(child); 372164130Sjhb if (name == NULL) { 373164130Sjhb name = ""; 374164130Sjhb suffix = ""; 375164130Sjhb } else 376164130Sjhb suffix = " "; 37769783Smsmith switch (type) { 37869783Smsmith case SYS_RES_IOPORT: 379107546Simp ok = 0; 380124365Simp if (!pcib_is_io_open(sc)) 381124365Simp break; 382124365Simp ok = (start >= sc->iobase && end <= sc->iolimit); 383145652Smarcel 384145652Smarcel /* 385145652Smarcel * Make sure we allow access to VGA I/O addresses when the 386145652Smarcel * bridge has the "VGA Enable" bit set. 387145652Smarcel */ 388145652Smarcel if (!ok && pci_is_vga_ioport_range(start, end)) 389145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 390145652Smarcel 391124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 392124365Simp if (!ok) { 393124365Simp if (start < sc->iobase) 394124365Simp start = sc->iobase; 395124365Simp if (end > sc->iolimit) 396124365Simp end = sc->iolimit; 397142051Simp if (start < end) 398142051Simp ok = 1; 399124365Simp } 400106844Smdodd } else { 401124365Simp ok = 1; 402128058Simp#if 1 403124365Simp if (start < sc->iobase && end > sc->iolimit) { 404124365Simp start = sc->iobase; 405124365Simp end = sc->iolimit; 406124365Simp } 407124641Simp#endif 408106844Smdodd } 409124365Simp if (end < start) { 410142051Simp device_printf(dev, "ioport: end (%lx) < start (%lx)\n", 411142051Simp end, start); 412124365Simp start = 0; 413124365Simp end = 0; 414124365Simp ok = 0; 415124365Simp } 416124365Simp if (!ok) { 417164130Sjhb device_printf(dev, "%s%srequested unsupported I/O " 418124365Simp "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n", 419164130Sjhb name, suffix, start, end, sc->iobase, sc->iolimit); 420124365Simp return (NULL); 421124365Simp } 422124365Simp if (bootverbose) 423142051Simp device_printf(dev, 424164130Sjhb "%s%srequested I/O range 0x%lx-0x%lx: in range\n", 425164130Sjhb name, suffix, start, end); 426124365Simp break; 42769783Smsmith 42869783Smsmith case SYS_RES_MEMORY: 429107546Simp ok = 0; 430107546Simp if (pcib_is_nonprefetch_open(sc)) 431124365Simp ok = ok || (start >= sc->membase && end <= sc->memlimit); 432107546Simp if (pcib_is_prefetch_open(sc)) 433124365Simp ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit); 434145652Smarcel 435145652Smarcel /* 436145652Smarcel * Make sure we allow access to VGA memory addresses when the 437145652Smarcel * bridge has the "VGA Enable" bit set. 438145652Smarcel */ 439145652Smarcel if (!ok && pci_is_vga_memory_range(start, end)) 440145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 441145652Smarcel 442124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 443124365Simp if (!ok) { 444124365Simp ok = 1; 445124365Simp if (flags & RF_PREFETCHABLE) { 446124365Simp if (pcib_is_prefetch_open(sc)) { 447124365Simp if (start < sc->pmembase) 448124365Simp start = sc->pmembase; 449124365Simp if (end > sc->pmemlimit) 450124365Simp end = sc->pmemlimit; 451124365Simp } else { 452124365Simp ok = 0; 453124365Simp } 454124365Simp } else { /* non-prefetchable */ 455124365Simp if (pcib_is_nonprefetch_open(sc)) { 456124365Simp if (start < sc->membase) 457124365Simp start = sc->membase; 458124365Simp if (end > sc->memlimit) 459124365Simp end = sc->memlimit; 460124365Simp } else { 461124365Simp ok = 0; 462124365Simp } 463124365Simp } 464107546Simp } 465107546Simp } else if (!ok) { 466124365Simp ok = 1; /* subtractive bridge: always ok */ 467128058Simp#if 1 468124365Simp if (pcib_is_nonprefetch_open(sc)) { 469124365Simp if (start < sc->membase && end > sc->memlimit) { 470124365Simp start = sc->membase; 471124365Simp end = sc->memlimit; 472124365Simp } 473124365Simp } 474124365Simp if (pcib_is_prefetch_open(sc)) { 475124365Simp if (start < sc->pmembase && end > sc->pmemlimit) { 476124365Simp start = sc->pmembase; 477124365Simp end = sc->pmemlimit; 478124365Simp } 479124365Simp } 480124641Simp#endif 481106844Smdodd } 482124365Simp if (end < start) { 483142051Simp device_printf(dev, "memory: end (%lx) < start (%lx)\n", 484142051Simp end, start); 485124365Simp start = 0; 486124365Simp end = 0; 487124365Simp ok = 0; 488124365Simp } 489124365Simp if (!ok && bootverbose) 490124365Simp device_printf(dev, 491164130Sjhb "%s%srequested unsupported memory range %#lx-%#lx " 492163805Simp "(decoding %#jx-%#jx, %#jx-%#jx)\n", 493164130Sjhb name, suffix, start, end, 494163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit, 495163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 496124365Simp if (!ok) 497124365Simp return (NULL); 498124365Simp if (bootverbose) 499164130Sjhb device_printf(dev,"%s%srequested memory range " 500142051Simp "0x%lx-0x%lx: good\n", 501164130Sjhb name, suffix, start, end); 502124365Simp break; 50369908Smsmith 50469783Smsmith default: 505124365Simp break; 50669783Smsmith } 507124365Simp /* 508124365Simp * Bridge is OK decoding this resource, so pass it up. 509124365Simp */ 510142051Simp return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 511142051Simp count, flags)); 51269783Smsmith} 51369783Smsmith 51469783Smsmith/* 51569783Smsmith * PCIB interface. 51669783Smsmith */ 517102441Sjhbint 51869783Smsmithpcib_maxslots(device_t dev) 51969783Smsmith{ 52069908Smsmith return(PCI_SLOTMAX); 52169783Smsmith} 52269783Smsmith 52369783Smsmith/* 52469783Smsmith * Since we are a child of a PCI bus, its parent must support the pcib interface. 52569783Smsmith */ 526119266Simpuint32_t 52769783Smsmithpcib_read_config(device_t dev, int b, int s, int f, int reg, int width) 52869783Smsmith{ 52969783Smsmith return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); 53069783Smsmith} 53169783Smsmith 532102441Sjhbvoid 533119266Simppcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width) 53469783Smsmith{ 53569783Smsmith PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); 53669783Smsmith} 53769783Smsmith 53869783Smsmith/* 53969783Smsmith * Route an interrupt across a PCI bridge. 54069783Smsmith */ 541109229Sbennoint 54269783Smsmithpcib_route_interrupt(device_t pcib, device_t dev, int pin) 54369783Smsmith{ 54469783Smsmith device_t bus; 54569783Smsmith int parent_intpin; 54669783Smsmith int intnum; 54769783Smsmith 54869783Smsmith /* 54969783Smsmith * 55069783Smsmith * The PCI standard defines a swizzle of the child-side device/intpin to 55169783Smsmith * the parent-side intpin as follows. 55269783Smsmith * 55369783Smsmith * device = device on child bus 55469783Smsmith * child_intpin = intpin on child bus slot (0-3) 55569783Smsmith * parent_intpin = intpin on parent bus slot (0-3) 55669783Smsmith * 55769783Smsmith * parent_intpin = (device + child_intpin) % 4 55869783Smsmith */ 559115234Sticso parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4; 56069783Smsmith 56169783Smsmith /* 56269783Smsmith * Our parent is a PCI bus. Its parent must export the pcib interface 56369783Smsmith * which includes the ability to route interrupts. 56469783Smsmith */ 56569783Smsmith bus = device_get_parent(pcib); 56669783Smsmith intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 567131398Sjhb if (PCI_INTERRUPT_VALID(intnum) && bootverbose) { 568102977Sjhb device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 569102977Sjhb pci_get_slot(dev), 'A' + pin - 1, intnum); 57090554Smsmith } 57169783Smsmith return(intnum); 57269783Smsmith} 573107172Sjhb 574169221Sjhb/* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */ 575164264Sjhbint 576164264Sjhbpcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) 577164264Sjhb{ 578169902Sgallatin struct pcib_softc *sc = device_get_softc(pcib); 579164264Sjhb device_t bus; 580164264Sjhb 581165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 582165995Sjhb return (ENXIO); 583164264Sjhb bus = device_get_parent(pcib); 584164264Sjhb return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 585164264Sjhb irqs)); 586164264Sjhb} 587164264Sjhb 588169221Sjhb/* Pass request to release MSI/MSI-X messages up to the parent bridge. */ 589164264Sjhbint 590164264Sjhbpcib_release_msi(device_t pcib, device_t dev, int count, int *irqs) 591164264Sjhb{ 592164264Sjhb device_t bus; 593164264Sjhb 594164264Sjhb bus = device_get_parent(pcib); 595164264Sjhb return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs)); 596164264Sjhb} 597164264Sjhb 598164264Sjhb/* Pass request to alloc an MSI-X message up to the parent bridge. */ 599164264Sjhbint 600169221Sjhbpcib_alloc_msix(device_t pcib, device_t dev, int *irq) 601164264Sjhb{ 602169902Sgallatin struct pcib_softc *sc = device_get_softc(pcib); 603164264Sjhb device_t bus; 604164264Sjhb 605165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 606165995Sjhb return (ENXIO); 607164264Sjhb bus = device_get_parent(pcib); 608169221Sjhb return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 609164264Sjhb} 610164264Sjhb 611169221Sjhb/* Pass request to release an MSI-X message up to the parent bridge. */ 612166176Sjhbint 613169221Sjhbpcib_release_msix(device_t pcib, device_t dev, int irq) 614166176Sjhb{ 615166176Sjhb device_t bus; 616166176Sjhb 617166176Sjhb bus = device_get_parent(pcib); 618169221Sjhb return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq)); 619166176Sjhb} 620166176Sjhb 621169221Sjhb/* Pass request to map MSI/MSI-X message up to parent bridge. */ 622164264Sjhbint 623169221Sjhbpcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 624169221Sjhb uint32_t *data) 625164264Sjhb{ 626164264Sjhb device_t bus; 627180753Sluoqi int error; 628164264Sjhb 629164264Sjhb bus = device_get_parent(pcib); 630180753Sluoqi error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data); 631180753Sluoqi if (error) 632180753Sluoqi return (error); 633180753Sluoqi 634180753Sluoqi pci_ht_map_msi(pcib, *addr); 635180753Sluoqi return (0); 636164264Sjhb} 637164264Sjhb 638107172Sjhb/* 639107172Sjhb * Try to read the bus number of a host-PCI bridge using appropriate config 640107172Sjhb * registers. 641107172Sjhb */ 642107172Sjhbint 643107172Sjhbhost_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 644119266Simp uint8_t *busnum) 645107172Sjhb{ 646119266Simp uint32_t id; 647107172Sjhb 648107172Sjhb id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 649107248Sjhb if (id == 0xffffffff) 650107172Sjhb return (0); 651107172Sjhb 652107172Sjhb switch (id) { 653107172Sjhb case 0x12258086: 654107172Sjhb /* Intel 824?? */ 655107172Sjhb /* XXX This is a guess */ 656107172Sjhb /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 657107172Sjhb *busnum = bus; 658107172Sjhb break; 659107172Sjhb case 0x84c48086: 660107172Sjhb /* Intel 82454KX/GX (Orion) */ 661107172Sjhb *busnum = read_config(bus, slot, func, 0x4a, 1); 662107172Sjhb break; 663107172Sjhb case 0x84ca8086: 664107172Sjhb /* 665107172Sjhb * For the 450nx chipset, there is a whole bundle of 666107172Sjhb * things pretending to be host bridges. The MIOC will 667107172Sjhb * be seen first and isn't really a pci bridge (the 668107172Sjhb * actual busses are attached to the PXB's). We need to 669107172Sjhb * read the registers of the MIOC to figure out the 670107172Sjhb * bus numbers for the PXB channels. 671107172Sjhb * 672107172Sjhb * Since the MIOC doesn't have a pci bus attached, we 673107172Sjhb * pretend it wasn't there. 674107172Sjhb */ 675107172Sjhb return (0); 676107172Sjhb case 0x84cb8086: 677107172Sjhb switch (slot) { 678107172Sjhb case 0x12: 679107172Sjhb /* Intel 82454NX PXB#0, Bus#A */ 680107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd0, 1); 681107172Sjhb break; 682107172Sjhb case 0x13: 683107172Sjhb /* Intel 82454NX PXB#0, Bus#B */ 684107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 685107172Sjhb break; 686107172Sjhb case 0x14: 687107172Sjhb /* Intel 82454NX PXB#1, Bus#A */ 688107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd3, 1); 689107172Sjhb break; 690107172Sjhb case 0x15: 691107172Sjhb /* Intel 82454NX PXB#1, Bus#B */ 692107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 693107172Sjhb break; 694107172Sjhb } 695107172Sjhb break; 696107172Sjhb 697107172Sjhb /* ServerWorks -- vendor 0x1166 */ 698107172Sjhb case 0x00051166: 699107172Sjhb case 0x00061166: 700107172Sjhb case 0x00081166: 701107172Sjhb case 0x00091166: 702107172Sjhb case 0x00101166: 703107172Sjhb case 0x00111166: 704107172Sjhb case 0x00171166: 705107172Sjhb case 0x01011166: 706107172Sjhb case 0x010f1014: 707107172Sjhb case 0x02011166: 708107172Sjhb case 0x03021014: 709107172Sjhb *busnum = read_config(bus, slot, func, 0x44, 1); 710107172Sjhb break; 711144110Sjhb 712144110Sjhb /* Compaq/HP -- vendor 0x0e11 */ 713144110Sjhb case 0x60100e11: 714144110Sjhb *busnum = read_config(bus, slot, func, 0xc8, 1); 715144110Sjhb break; 716107172Sjhb default: 717107172Sjhb /* Don't know how to read bus number. */ 718107172Sjhb return 0; 719107172Sjhb } 720107172Sjhb 721107172Sjhb return 1; 722107172Sjhb} 723