tlphyreg.h revision 139749
1/* $NetBSD: tlphyreg.h,v 1.1 1998/08/10 23:59:58 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: head/sys/dev/mii/tlphyreg.h 139749 2005-01-06 01:43:34Z imp $ 32 */ 33 34#ifndef _DEV_MII_TLPHYREG_H_ 35#define _DEV_MII_TLPHYREG_H_ 36 37/* 38 * Registers for the TI ThunderLAN internal PHY. 39 */ 40 41#define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */ 42#define ID_10BASETAUI 0x0001 /* 10baseT/AUI PHY */ 43 44#define MII_TLPHY_CTRL 0x11 /* Control regiseter */ 45#define CTRL_ILINK 0x8000 /* Ignore link */ 46#define CTRL_SWPOL 0x4000 /* swap polarity */ 47#define CTRL_AUISEL 0x2000 /* Select AUI */ 48#define CTRL_SQEEN 0x1000 /* Enable SQE */ 49#define CTRL_NFEW 0x0004 /* Not far end wrap */ 50#define CTRL_INTEN 0x0002 /* Interrupts enable */ 51#define CTRL_TINT 0x0001 /* Test Interrupts */ 52 53#define MII_TLPHY_ST 0x12 /* Status register */ 54#define ST_MII_INT 0x8000 /* MII interrupt */ 55#define ST_PHOK 0x4000 /* Power high OK */ 56#define ST_POLOK 0x2000 /* Polarity OK */ 57#define ST_TPE 0x1000 /* Twisted pair energy */ 58 59#endif /* _DEV_MII_TLPHYREG_H_ */ 60