atphy.c revision 217412 
1/*-
2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/mii/atphy.c 217412 2011-01-14 19:16:59Z marius $");
30
31/*
32 * Driver for the Attansic/Atheros F1 10/100/1000 PHY.
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/socket.h>
40#include <sys/bus.h>
41
42#include <net/if.h>
43#include <net/if_media.h>
44
45#include <dev/mii/mii.h>
46#include <dev/mii/miivar.h>
47#include "miidevs.h"
48
49#include <dev/mii/atphyreg.h>
50
51#include "miibus_if.h"
52
53static int atphy_probe(device_t);
54static int atphy_attach(device_t);
55
56struct atphy_softc {
57	struct mii_softc mii_sc;
58	int mii_oui;
59	int mii_model;
60	int mii_rev;
61};
62
63static device_method_t atphy_methods[] = {
64	/* Device interface. */
65	DEVMETHOD(device_probe,		atphy_probe),
66	DEVMETHOD(device_attach,	atphy_attach),
67	DEVMETHOD(device_detach,	mii_phy_detach),
68	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
69	{ NULL, NULL }
70};
71
72static devclass_t atphy_devclass;
73static driver_t atphy_driver = {
74	"atphy",
75	atphy_methods,
76	sizeof(struct atphy_softc)
77};
78
79DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0);
80
81static int	atphy_service(struct mii_softc *, struct mii_data *, int);
82static void	atphy_status(struct mii_softc *);
83static void	atphy_reset(struct mii_softc *);
84static uint16_t	atphy_anar(struct ifmedia_entry *);
85static int	atphy_setmedia(struct mii_softc *, int);
86
87static const struct mii_phydesc atphys[] = {
88	MII_PHY_DESC(ATHEROS, F1),
89	MII_PHY_DESC(ATHEROS, F1_7),
90	MII_PHY_DESC(ATHEROS, F2),
91	MII_PHY_END
92};
93
94static int
95atphy_probe(device_t dev)
96{
97
98	return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT));
99}
100
101static int
102atphy_attach(device_t dev)
103{
104	struct atphy_softc *asc;
105	struct mii_softc *sc;
106	struct mii_attach_args *ma;
107	struct mii_data *mii;
108
109	asc = device_get_softc(dev);
110	sc = &asc->mii_sc;
111	ma = device_get_ivars(dev);
112	sc->mii_dev = device_get_parent(dev);
113	mii = ma->mii_data;
114	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
115
116	sc->mii_flags = miibus_get_flags(dev);
117	sc->mii_inst = mii->mii_instance++;
118	sc->mii_phy = ma->mii_phyno;
119	sc->mii_service = atphy_service;
120	sc->mii_pdata = mii;
121
122	asc->mii_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
123	asc->mii_model = MII_MODEL(ma->mii_id2);
124	asc->mii_rev = MII_REV(ma->mii_id2);
125	if (bootverbose)
126		device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
127		    asc->mii_oui, asc->mii_model, asc->mii_rev);
128
129	atphy_reset(sc);
130
131	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
132	if (sc->mii_capabilities & BMSR_EXTSTAT)
133		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
134	device_printf(dev, " ");
135	mii_phy_add_media(sc);
136	printf("\n");
137
138	MIIBUS_MEDIAINIT(sc->mii_dev);
139	return (0);
140}
141
142static int
143atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
144{
145	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
146	uint16_t anar, bmcr, bmsr;
147
148	switch (cmd) {
149	case MII_POLLSTAT:
150		break;
151
152	case MII_MEDIACHG:
153		/*
154		 * If the interface is not up, don't do anything.
155		 */
156		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
157			break;
158
159		if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
160		    IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
161			atphy_setmedia(sc, ife->ifm_media);
162			break;
163		}
164
165		bmcr = 0;
166		switch (IFM_SUBTYPE(ife->ifm_media)) {
167		case IFM_100_TX:
168			bmcr = BMCR_S100;
169			break;
170		case IFM_10_T:
171			bmcr = BMCR_S10;
172			break;
173		case IFM_NONE:
174			bmcr = PHY_READ(sc, MII_BMCR);
175			/*
176			 * XXX
177			 * Due to an unknown reason powering down PHY resulted
178			 * in unexpected results such as inaccessibility of
179			 * hardware of freshly rebooted system. Disable
180			 * powering down PHY until I got more information for
181			 * Attansic/Atheros PHY hardwares.
182			 */
183			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
184			goto done;
185		default:
186			return (EINVAL);
187		}
188
189		anar = atphy_anar(ife);
190		if ((ife->ifm_media & IFM_FDX) != 0) {
191			bmcr |= BMCR_FDX;
192			if ((ife->ifm_media & IFM_FLOW) != 0 ||
193			    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
194				anar |= ANAR_PAUSE_TOWARDS;
195		}
196
197		if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
198		    EXTSR_1000THDX)) != 0)
199			PHY_WRITE(sc, MII_100T2CR, 0);
200		PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
201
202		/*
203		 * Reset the PHY so all changes take effect.
204		 */
205		PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
206		    BMCR_STARTNEG);
207done:
208		break;
209
210	case MII_TICK:
211		/*
212		 * Is the interface even up?
213		 */
214		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
215			return (0);
216
217		/*
218		 * Only used for autonegotiation.
219		 */
220		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
221			sc->mii_ticks = 0;
222			break;
223		}
224
225		/*
226		 * Check for link.
227		 * Read the status register twice; BMSR_LINK is latch-low.
228		 */
229		bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
230		if (bmsr & BMSR_LINK) {
231			sc->mii_ticks = 0;
232			break;
233		}
234
235		/* Announce link loss right after it happens. */
236		if (sc->mii_ticks++ == 0)
237			break;
238		if (sc->mii_ticks <= sc->mii_anegticks)
239			return (0);
240
241		sc->mii_ticks = 0;
242		atphy_setmedia(sc, ife->ifm_media);
243		break;
244	}
245
246	/* Update the media status. */
247	atphy_status(sc);
248
249	/* Callback if something changed. */
250	mii_phy_update(sc, cmd);
251	return (0);
252}
253
254static void
255atphy_status(struct mii_softc *sc)
256{
257	struct mii_data *mii = sc->mii_pdata;
258	uint32_t bmsr, bmcr, ssr;
259
260	mii->mii_media_status = IFM_AVALID;
261	mii->mii_media_active = IFM_ETHER;
262
263	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
264	if ((bmsr & BMSR_LINK) != 0)
265		mii->mii_media_status |= IFM_ACTIVE;
266
267	bmcr = PHY_READ(sc, MII_BMCR);
268	if ((bmcr & BMCR_ISO) != 0) {
269		mii->mii_media_active |= IFM_NONE;
270		mii->mii_media_status = 0;
271		return;
272	}
273
274	if ((bmcr & BMCR_LOOP) != 0)
275		mii->mii_media_active |= IFM_LOOP;
276
277	ssr = PHY_READ(sc, ATPHY_SSR);
278	if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
279		/* Erg, still trying, I guess... */
280		mii->mii_media_active |= IFM_NONE;
281		return;
282	}
283
284	switch (ssr & ATPHY_SSR_SPEED_MASK) {
285	case ATPHY_SSR_1000MBS:
286		mii->mii_media_active |= IFM_1000_T;
287		/*
288		 * atphy(4) has a valid link so reset mii_ticks.
289		 * Resetting mii_ticks is needed in order to
290		 * detect link loss after auto-negotiation.
291		 */
292		sc->mii_ticks = 0;
293		break;
294	case ATPHY_SSR_100MBS:
295		mii->mii_media_active |= IFM_100_TX;
296		sc->mii_ticks = 0;
297		break;
298	case ATPHY_SSR_10MBS:
299		mii->mii_media_active |= IFM_10_T;
300		sc->mii_ticks = 0;
301		break;
302	default:
303		mii->mii_media_active |= IFM_NONE;
304		return;
305	}
306
307	if ((ssr & ATPHY_SSR_DUPLEX) != 0)
308		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
309	else
310		mii->mii_media_active |= IFM_HDX;
311
312	if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
313	    (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
314		mii->mii_media_active |= IFM_ETH_MASTER;
315}
316
317static void
318atphy_reset(struct mii_softc *sc)
319{
320	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
321	struct atphy_softc *asc;
322	uint32_t reg;
323	int i;
324
325	asc = (struct atphy_softc *)sc;
326
327	/* Take PHY out of power down mode. */
328	PHY_WRITE(sc, 29, 0x29);
329	PHY_WRITE(sc, 30, 0);
330
331	reg = PHY_READ(sc, ATPHY_SCR);
332	/* Enable automatic crossover. */
333	reg |= ATPHY_SCR_AUTO_X_MODE;
334	/* Disable power down. */
335	reg &= ~ATPHY_SCR_MAC_PDOWN;
336	/* Enable CRS on Tx. */
337	reg |= ATPHY_SCR_ASSERT_CRS_ON_TX;
338	/* Auto correction for reversed cable polarity. */
339	reg |= ATPHY_SCR_POLARITY_REVERSAL;
340	PHY_WRITE(sc, ATPHY_SCR, reg);
341
342	/* Workaround F1 bug to reset phy. */
343	atphy_setmedia(sc, ife == NULL ? IFM_AUTO : ife->ifm_media);
344
345	for (i = 0; i < 1000; i++) {
346		DELAY(1);
347		if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
348			break;
349	}
350}
351
352static uint16_t
353atphy_anar(struct ifmedia_entry *ife)
354{
355	uint16_t anar;
356
357	anar = 0;
358	switch (IFM_SUBTYPE(ife->ifm_media)) {
359	case IFM_AUTO:
360		anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
361		return (anar);
362	case IFM_1000_T:
363		return (anar);
364	case IFM_100_TX:
365		anar |= ANAR_TX;
366		break;
367	case IFM_10_T:
368		anar |= ANAR_10;
369		break;
370	default:
371		return (0);
372	}
373
374	if ((ife->ifm_media & IFM_FDX) != 0) {
375		if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
376			anar |= ANAR_TX_FD;
377		else
378			anar |= ANAR_10_FD;
379	}
380
381	return (anar);
382}
383
384static int
385atphy_setmedia(struct mii_softc *sc, int media)
386{
387	uint16_t anar;
388
389	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
390	if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) &&
391	    ((media & IFM_FLOW) != 0 ||
392	    (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
393		anar |= ANAR_PAUSE_TOWARDS;
394	PHY_WRITE(sc, MII_ANAR, anar);
395	if ((sc->mii_extcapabilities &
396	     (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
397		PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
398		    GTCR_ADV_1000THDX);
399	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
400
401	return (EJUSTRETURN);
402}
403